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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright 2015-2017 Google, Inc
0004  *
0005  * USB Type-C Port Controller Interface.
0006  */
0007 
0008 #include <linux/delay.h>
0009 #include <linux/kernel.h>
0010 #include <linux/module.h>
0011 #include <linux/i2c.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/property.h>
0014 #include <linux/regmap.h>
0015 #include <linux/usb/pd.h>
0016 #include <linux/usb/tcpci.h>
0017 #include <linux/usb/tcpm.h>
0018 #include <linux/usb/typec.h>
0019 
0020 #define PD_RETRY_COUNT_DEFAULT          3
0021 #define PD_RETRY_COUNT_3_0_OR_HIGHER        2
0022 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500
0023 #define VSINKPD_MIN_IR_DROP_MV          750
0024 #define VSRC_NEW_MIN_PERCENT            95
0025 #define VSRC_VALID_MIN_MV           500
0026 #define VPPS_NEW_MIN_PERCENT            95
0027 #define VPPS_VALID_MIN_MV           100
0028 #define VSINKDISCONNECT_PD_MIN_PERCENT      90
0029 
0030 #define tcpc_presenting_rd(reg, cc) \
0031     (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
0032      (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \
0033       (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT)))
0034 
0035 struct tcpci {
0036     struct device *dev;
0037 
0038     struct tcpm_port *port;
0039 
0040     struct regmap *regmap;
0041 
0042     bool controls_vbus;
0043 
0044     struct tcpc_dev tcpc;
0045     struct tcpci_data *data;
0046 };
0047 
0048 struct tcpci_chip {
0049     struct tcpci *tcpci;
0050     struct tcpci_data data;
0051 };
0052 
0053 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci)
0054 {
0055     return tcpci->port;
0056 }
0057 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port);
0058 
0059 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
0060 {
0061     return container_of(tcpc, struct tcpci, tcpc);
0062 }
0063 
0064 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
0065 {
0066     return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
0067 }
0068 
0069 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
0070 {
0071     return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
0072 }
0073 
0074 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
0075 {
0076     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0077     bool vconn_pres;
0078     enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1;
0079     unsigned int reg;
0080     int ret;
0081 
0082     ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
0083     if (ret < 0)
0084         return ret;
0085 
0086     vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES);
0087     if (vconn_pres) {
0088         ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, &reg);
0089         if (ret < 0)
0090             return ret;
0091 
0092         if (reg & TCPC_TCPC_CTRL_ORIENTATION)
0093             polarity = TYPEC_POLARITY_CC2;
0094     }
0095 
0096     switch (cc) {
0097     case TYPEC_CC_RA:
0098         reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
0099             (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
0100         break;
0101     case TYPEC_CC_RD:
0102         reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
0103             (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
0104         break;
0105     case TYPEC_CC_RP_DEF:
0106         reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
0107             (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
0108             (TCPC_ROLE_CTRL_RP_VAL_DEF <<
0109              TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0110         break;
0111     case TYPEC_CC_RP_1_5:
0112         reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
0113             (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
0114             (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
0115              TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0116         break;
0117     case TYPEC_CC_RP_3_0:
0118         reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
0119             (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
0120             (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
0121              TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0122         break;
0123     case TYPEC_CC_OPEN:
0124     default:
0125         reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
0126             (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
0127         break;
0128     }
0129 
0130     if (vconn_pres) {
0131         if (polarity == TYPEC_POLARITY_CC2) {
0132             reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
0133             reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT);
0134         } else {
0135             reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
0136             reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
0137         }
0138     }
0139 
0140     ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
0141     if (ret < 0)
0142         return ret;
0143 
0144     return 0;
0145 }
0146 
0147 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc,
0148               enum typec_cc_polarity polarity)
0149 {
0150     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0151     unsigned int reg;
0152     int ret;
0153 
0154     ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &reg);
0155     if (ret < 0)
0156         return ret;
0157 
0158     /*
0159      * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on
0160      * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2.
0161      */
0162     if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >>
0163          TCPC_ROLE_CTRL_CC2_SHIFT) !=
0164         ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >>
0165          TCPC_ROLE_CTRL_CC1_SHIFT))
0166         return 0;
0167 
0168     return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ?
0169                   TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT :
0170                   TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT,
0171                   TCPC_ROLE_CTRL_CC_OPEN);
0172 }
0173 
0174 static int tcpci_start_toggling(struct tcpc_dev *tcpc,
0175                 enum typec_port_type port_type,
0176                 enum typec_cc_status cc)
0177 {
0178     int ret;
0179     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0180     unsigned int reg = TCPC_ROLE_CTRL_DRP;
0181 
0182     if (port_type != TYPEC_PORT_DRP)
0183         return -EOPNOTSUPP;
0184 
0185     /* Handle vendor drp toggling */
0186     if (tcpci->data->start_drp_toggling) {
0187         ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
0188         if (ret < 0)
0189             return ret;
0190     }
0191 
0192     switch (cc) {
0193     default:
0194     case TYPEC_CC_RP_DEF:
0195         reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
0196             TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0197         break;
0198     case TYPEC_CC_RP_1_5:
0199         reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
0200             TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0201         break;
0202     case TYPEC_CC_RP_3_0:
0203         reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
0204             TCPC_ROLE_CTRL_RP_VAL_SHIFT);
0205         break;
0206     }
0207 
0208     if (cc == TYPEC_CC_RD)
0209         reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
0210                (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
0211     else
0212         reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
0213                (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
0214     ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
0215     if (ret < 0)
0216         return ret;
0217     return regmap_write(tcpci->regmap, TCPC_COMMAND,
0218                 TCPC_CMD_LOOK4CONNECTION);
0219 }
0220 
0221 static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
0222 {
0223     switch (cc) {
0224     case 0x1:
0225         return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
0226     case 0x2:
0227         return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
0228     case 0x3:
0229         if (sink)
0230             return TYPEC_CC_RP_3_0;
0231         fallthrough;
0232     case 0x0:
0233     default:
0234         return TYPEC_CC_OPEN;
0235     }
0236 }
0237 
0238 static int tcpci_get_cc(struct tcpc_dev *tcpc,
0239             enum typec_cc_status *cc1, enum typec_cc_status *cc2)
0240 {
0241     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0242     unsigned int reg, role_control;
0243     int ret;
0244 
0245     ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control);
0246     if (ret < 0)
0247         return ret;
0248 
0249     ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, &reg);
0250     if (ret < 0)
0251         return ret;
0252 
0253     *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
0254                  TCPC_CC_STATUS_CC1_MASK,
0255                  reg & TCPC_CC_STATUS_TERM ||
0256                  tcpc_presenting_rd(role_control, CC1));
0257     *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
0258                  TCPC_CC_STATUS_CC2_MASK,
0259                  reg & TCPC_CC_STATUS_TERM ||
0260                  tcpc_presenting_rd(role_control, CC2));
0261 
0262     return 0;
0263 }
0264 
0265 static int tcpci_set_polarity(struct tcpc_dev *tcpc,
0266                   enum typec_cc_polarity polarity)
0267 {
0268     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0269     unsigned int reg;
0270     int ret;
0271     enum typec_cc_status cc1, cc2;
0272 
0273     /* Obtain Rp setting from role control */
0274     ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &reg);
0275     if (ret < 0)
0276         return ret;
0277 
0278     ret = tcpci_get_cc(tcpc, &cc1, &cc2);
0279     if (ret < 0)
0280         return ret;
0281 
0282     /*
0283      * When port has drp toggling enabled, ROLE_CONTROL would only have the initial
0284      * terminations for the toggling and does not indicate the final cc
0285      * terminations when ConnectionResult is 0 i.e. drp toggling stops and
0286      * the connection is resolved. Infer port role from TCPC_CC_STATUS based on the
0287      * terminations seen. The port role is then used to set the cc terminations.
0288      */
0289     if (reg & TCPC_ROLE_CTRL_DRP) {
0290         /* Disable DRP for the OPEN setting to take effect */
0291         reg = reg & ~TCPC_ROLE_CTRL_DRP;
0292 
0293         if (polarity == TYPEC_POLARITY_CC2) {
0294             reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
0295             /* Local port is source */
0296             if (cc2 == TYPEC_CC_RD)
0297                 /* Role control would have the Rp setting when DRP was enabled */
0298                 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
0299             else
0300                 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
0301         } else {
0302             reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
0303             /* Local port is source */
0304             if (cc1 == TYPEC_CC_RD)
0305                 /* Role control would have the Rp setting when DRP was enabled */
0306                 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
0307             else
0308                 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
0309         }
0310     }
0311 
0312     if (polarity == TYPEC_POLARITY_CC2)
0313         reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
0314     else
0315         reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
0316     ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
0317     if (ret < 0)
0318         return ret;
0319 
0320     return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
0321                (polarity == TYPEC_POLARITY_CC2) ?
0322                TCPC_TCPC_CTRL_ORIENTATION : 0);
0323 }
0324 
0325 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable)
0326 {
0327     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0328 
0329     if (tcpci->data->set_partner_usb_comm_capable)
0330         tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable);
0331 }
0332 
0333 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
0334 {
0335     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0336     int ret;
0337 
0338     /* Handle vendor set vconn */
0339     if (tcpci->data->set_vconn) {
0340         ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
0341         if (ret < 0)
0342             return ret;
0343     }
0344 
0345     return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL,
0346                 TCPC_POWER_CTRL_VCONN_ENABLE,
0347                 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
0348 }
0349 
0350 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable)
0351 {
0352     struct tcpci *tcpci = tcpc_to_tcpci(dev);
0353     int ret;
0354 
0355     ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE,
0356                  enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0);
0357     return ret;
0358 }
0359 
0360 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
0361                            bool pps_active, u32 requested_vbus_voltage_mv)
0362 {
0363     struct tcpci *tcpci = tcpc_to_tcpci(dev);
0364     unsigned int pwr_ctrl, threshold = 0;
0365     int ret;
0366 
0367     /*
0368      * Indicates that vbus is going to go away due PR_SWAP, hard reset etc.
0369      * Do not discharge vbus here.
0370      */
0371     if (requested_vbus_voltage_mv == 0)
0372         goto write_thresh;
0373 
0374     ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl);
0375     if (ret < 0)
0376         return ret;
0377 
0378     if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) {
0379         /* To prevent disconnect when the source is fast role swap is capable. */
0380         threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
0381     } else if (mode == TYPEC_PWR_MODE_PD) {
0382         if (pps_active)
0383             threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
0384                      VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) *
0385                      VSINKDISCONNECT_PD_MIN_PERCENT / 100;
0386         else
0387             threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
0388                      VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) *
0389                      VSINKDISCONNECT_PD_MIN_PERCENT / 100;
0390     } else {
0391         /* 3.5V for non-pd sink */
0392         threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
0393     }
0394 
0395     threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV;
0396 
0397     if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX)
0398         return -EINVAL;
0399 
0400 write_thresh:
0401     return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold);
0402 }
0403 
0404 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable)
0405 {
0406     struct tcpci *tcpci = tcpc_to_tcpci(dev);
0407     int ret;
0408 
0409     /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */
0410     ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c);
0411     if (ret < 0)
0412         return ret;
0413 
0414     ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ?
0415                  TCPC_FAST_ROLE_SWAP_EN : 0);
0416 
0417     return ret;
0418 }
0419 
0420 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev)
0421 {
0422     struct tcpci *tcpci = tcpc_to_tcpci(dev);
0423 
0424     if (tcpci->data->frs_sourcing_vbus)
0425         tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data);
0426 }
0427 
0428 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable)
0429 {
0430     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0431 
0432     return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM,
0433                  enable ? TCPC_TCPC_CTRL_BIST_TM : 0);
0434 }
0435 
0436 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
0437                enum typec_role role, enum typec_data_role data)
0438 {
0439     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0440     unsigned int reg;
0441     int ret;
0442 
0443     reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
0444     if (role == TYPEC_SOURCE)
0445         reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
0446     if (data == TYPEC_HOST)
0447         reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
0448     ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
0449     if (ret < 0)
0450         return ret;
0451 
0452     return 0;
0453 }
0454 
0455 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
0456 {
0457     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0458     unsigned int reg = 0;
0459     int ret;
0460 
0461     if (enable)
0462         reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
0463     ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
0464     if (ret < 0)
0465         return ret;
0466 
0467     return 0;
0468 }
0469 
0470 static int tcpci_get_vbus(struct tcpc_dev *tcpc)
0471 {
0472     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0473     unsigned int reg;
0474     int ret;
0475 
0476     ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
0477     if (ret < 0)
0478         return ret;
0479 
0480     return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
0481 }
0482 
0483 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc)
0484 {
0485     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0486     unsigned int reg;
0487     int ret;
0488 
0489     ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &reg);
0490     if (ret < 0)
0491         return false;
0492 
0493     return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V);
0494 }
0495 
0496 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
0497 {
0498     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0499     int ret;
0500 
0501     if (tcpci->data->set_vbus) {
0502         ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink);
0503         /* Bypass when ret > 0 */
0504         if (ret != 0)
0505             return ret < 0 ? ret : 0;
0506     }
0507 
0508     /* Disable both source and sink first before enabling anything */
0509 
0510     if (!source) {
0511         ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
0512                    TCPC_CMD_DISABLE_SRC_VBUS);
0513         if (ret < 0)
0514             return ret;
0515     }
0516 
0517     if (!sink) {
0518         ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
0519                    TCPC_CMD_DISABLE_SINK_VBUS);
0520         if (ret < 0)
0521             return ret;
0522     }
0523 
0524     if (source) {
0525         ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
0526                    TCPC_CMD_SRC_VBUS_DEFAULT);
0527         if (ret < 0)
0528             return ret;
0529     }
0530 
0531     if (sink) {
0532         ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
0533                    TCPC_CMD_SINK_VBUS);
0534         if (ret < 0)
0535             return ret;
0536     }
0537 
0538     return 0;
0539 }
0540 
0541 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type,
0542                  const struct pd_message *msg, unsigned int negotiated_rev)
0543 {
0544     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0545     u16 header = msg ? le16_to_cpu(msg->header) : 0;
0546     unsigned int reg, cnt;
0547     int ret;
0548 
0549     cnt = msg ? pd_header_cnt(header) * 4 : 0;
0550     /**
0551      * TCPCI spec forbids direct access of TCPC_TX_DATA.
0552      * But, since some of the chipsets offer this capability,
0553      * it's fair to support both.
0554      */
0555     if (tcpci->data->TX_BUF_BYTE_x_hidden) {
0556         u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,};
0557         u8 pos = 0;
0558 
0559         /* Payload + header + TCPC_TX_BYTE_CNT */
0560         buf[pos++] = cnt + 2;
0561 
0562         if (msg)
0563             memcpy(&buf[pos], &msg->header, sizeof(msg->header));
0564 
0565         pos += sizeof(header);
0566 
0567         if (cnt > 0)
0568             memcpy(&buf[pos], msg->payload, cnt);
0569 
0570         pos += cnt;
0571         ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos);
0572         if (ret < 0)
0573             return ret;
0574     } else {
0575         ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
0576         if (ret < 0)
0577             return ret;
0578 
0579         ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
0580         if (ret < 0)
0581             return ret;
0582 
0583         if (cnt > 0) {
0584             ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt);
0585             if (ret < 0)
0586                 return ret;
0587         }
0588     }
0589 
0590     /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */
0591     reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT)
0592            << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT);
0593     ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
0594     if (ret < 0)
0595         return ret;
0596 
0597     return 0;
0598 }
0599 
0600 static int tcpci_init(struct tcpc_dev *tcpc)
0601 {
0602     struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
0603     unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
0604     unsigned int reg;
0605     int ret;
0606 
0607     while (time_before_eq(jiffies, timeout)) {
0608         ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
0609         if (ret < 0)
0610             return ret;
0611         if (!(reg & TCPC_POWER_STATUS_UNINIT))
0612             break;
0613         usleep_range(10000, 20000);
0614     }
0615     if (time_after(jiffies, timeout))
0616         return -ETIMEDOUT;
0617 
0618     /* Handle vendor init */
0619     if (tcpci->data->init) {
0620         ret = tcpci->data->init(tcpci, tcpci->data);
0621         if (ret < 0)
0622             return ret;
0623     }
0624 
0625     /* Clear all events */
0626     ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
0627     if (ret < 0)
0628         return ret;
0629 
0630     if (tcpci->controls_vbus)
0631         reg = TCPC_POWER_STATUS_VBUS_PRES;
0632     else
0633         reg = 0;
0634     ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
0635     if (ret < 0)
0636         return ret;
0637 
0638     /* Enable Vbus detection */
0639     ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
0640                TCPC_CMD_ENABLE_VBUS_DETECT);
0641     if (ret < 0)
0642         return ret;
0643 
0644     reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
0645         TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
0646         TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
0647     if (tcpci->controls_vbus)
0648         reg |= TCPC_ALERT_POWER_STATUS;
0649     /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */
0650     if (tcpci->data->vbus_vsafe0v) {
0651         reg |= TCPC_ALERT_EXTENDED_STATUS;
0652         ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK,
0653                    TCPC_EXTENDED_STATUS_VSAFE0V);
0654         if (ret < 0)
0655             return ret;
0656     }
0657     return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
0658 }
0659 
0660 irqreturn_t tcpci_irq(struct tcpci *tcpci)
0661 {
0662     u16 status;
0663     int ret;
0664     unsigned int raw;
0665 
0666     tcpci_read16(tcpci, TCPC_ALERT, &status);
0667 
0668     /*
0669      * Clear alert status for everything except RX_STATUS, which shouldn't
0670      * be cleared until we have successfully retrieved message.
0671      */
0672     if (status & ~TCPC_ALERT_RX_STATUS)
0673         tcpci_write16(tcpci, TCPC_ALERT,
0674                   status & ~TCPC_ALERT_RX_STATUS);
0675 
0676     if (status & TCPC_ALERT_CC_STATUS)
0677         tcpm_cc_change(tcpci->port);
0678 
0679     if (status & TCPC_ALERT_POWER_STATUS) {
0680         regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw);
0681         /*
0682          * If power status mask has been reset, then the TCPC
0683          * has reset.
0684          */
0685         if (raw == 0xff)
0686             tcpm_tcpc_reset(tcpci->port);
0687         else
0688             tcpm_vbus_change(tcpci->port);
0689     }
0690 
0691     if (status & TCPC_ALERT_RX_STATUS) {
0692         struct pd_message msg;
0693         unsigned int cnt, payload_cnt;
0694         u16 header;
0695 
0696         regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
0697         /*
0698          * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
0699          * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
0700          * defined in table 4-36 as one greater than the number of
0701          * bytes received. And that number includes the header. So:
0702          */
0703         if (cnt > 3)
0704             payload_cnt = cnt - (1 + sizeof(msg.header));
0705         else
0706             payload_cnt = 0;
0707 
0708         tcpci_read16(tcpci, TCPC_RX_HDR, &header);
0709         msg.header = cpu_to_le16(header);
0710 
0711         if (WARN_ON(payload_cnt > sizeof(msg.payload)))
0712             payload_cnt = sizeof(msg.payload);
0713 
0714         if (payload_cnt > 0)
0715             regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
0716                     &msg.payload, payload_cnt);
0717 
0718         /* Read complete, clear RX status alert bit */
0719         tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
0720 
0721         tcpm_pd_receive(tcpci->port, &msg);
0722     }
0723 
0724     if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) {
0725         ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw);
0726         if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V))
0727             tcpm_vbus_change(tcpci->port);
0728     }
0729 
0730     if (status & TCPC_ALERT_RX_HARD_RST)
0731         tcpm_pd_hard_reset(tcpci->port);
0732 
0733     if (status & TCPC_ALERT_TX_SUCCESS)
0734         tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
0735     else if (status & TCPC_ALERT_TX_DISCARDED)
0736         tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
0737     else if (status & TCPC_ALERT_TX_FAILED)
0738         tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
0739 
0740     return IRQ_HANDLED;
0741 }
0742 EXPORT_SYMBOL_GPL(tcpci_irq);
0743 
0744 static irqreturn_t _tcpci_irq(int irq, void *dev_id)
0745 {
0746     struct tcpci_chip *chip = dev_id;
0747 
0748     return tcpci_irq(chip->tcpci);
0749 }
0750 
0751 static const struct regmap_config tcpci_regmap_config = {
0752     .reg_bits = 8,
0753     .val_bits = 8,
0754 
0755     .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
0756 };
0757 
0758 static int tcpci_parse_config(struct tcpci *tcpci)
0759 {
0760     tcpci->controls_vbus = true; /* XXX */
0761 
0762     tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev,
0763                              "connector");
0764     if (!tcpci->tcpc.fwnode) {
0765         dev_err(tcpci->dev, "Can't find connector node.\n");
0766         return -EINVAL;
0767     }
0768 
0769     return 0;
0770 }
0771 
0772 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data)
0773 {
0774     struct tcpci *tcpci;
0775     int err;
0776 
0777     tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
0778     if (!tcpci)
0779         return ERR_PTR(-ENOMEM);
0780 
0781     tcpci->dev = dev;
0782     tcpci->data = data;
0783     tcpci->regmap = data->regmap;
0784 
0785     tcpci->tcpc.init = tcpci_init;
0786     tcpci->tcpc.get_vbus = tcpci_get_vbus;
0787     tcpci->tcpc.set_vbus = tcpci_set_vbus;
0788     tcpci->tcpc.set_cc = tcpci_set_cc;
0789     tcpci->tcpc.apply_rc = tcpci_apply_rc;
0790     tcpci->tcpc.get_cc = tcpci_get_cc;
0791     tcpci->tcpc.set_polarity = tcpci_set_polarity;
0792     tcpci->tcpc.set_vconn = tcpci_set_vconn;
0793     tcpci->tcpc.start_toggling = tcpci_start_toggling;
0794 
0795     tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
0796     tcpci->tcpc.set_roles = tcpci_set_roles;
0797     tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
0798     tcpci->tcpc.set_bist_data = tcpci_set_bist_data;
0799     tcpci->tcpc.enable_frs = tcpci_enable_frs;
0800     tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus;
0801     tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable;
0802 
0803     if (tcpci->data->auto_discharge_disconnect) {
0804         tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge;
0805         tcpci->tcpc.set_auto_vbus_discharge_threshold =
0806             tcpci_set_auto_vbus_discharge_threshold;
0807         regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE,
0808                    TCPC_POWER_CTRL_BLEED_DISCHARGE);
0809     }
0810 
0811     if (tcpci->data->vbus_vsafe0v)
0812         tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v;
0813 
0814     err = tcpci_parse_config(tcpci);
0815     if (err < 0)
0816         return ERR_PTR(err);
0817 
0818     tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
0819     if (IS_ERR(tcpci->port))
0820         return ERR_CAST(tcpci->port);
0821 
0822     return tcpci;
0823 }
0824 EXPORT_SYMBOL_GPL(tcpci_register_port);
0825 
0826 void tcpci_unregister_port(struct tcpci *tcpci)
0827 {
0828     tcpm_unregister_port(tcpci->port);
0829 }
0830 EXPORT_SYMBOL_GPL(tcpci_unregister_port);
0831 
0832 static int tcpci_probe(struct i2c_client *client,
0833                const struct i2c_device_id *i2c_id)
0834 {
0835     struct tcpci_chip *chip;
0836     int err;
0837     u16 val = 0;
0838 
0839     chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
0840     if (!chip)
0841         return -ENOMEM;
0842 
0843     chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
0844     if (IS_ERR(chip->data.regmap))
0845         return PTR_ERR(chip->data.regmap);
0846 
0847     i2c_set_clientdata(client, chip);
0848 
0849     /* Disable chip interrupts before requesting irq */
0850     err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val,
0851                    sizeof(u16));
0852     if (err < 0)
0853         return err;
0854 
0855     chip->tcpci = tcpci_register_port(&client->dev, &chip->data);
0856     if (IS_ERR(chip->tcpci))
0857         return PTR_ERR(chip->tcpci);
0858 
0859     err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
0860                     _tcpci_irq,
0861                     IRQF_ONESHOT | IRQF_TRIGGER_LOW,
0862                     dev_name(&client->dev), chip);
0863     if (err < 0) {
0864         tcpci_unregister_port(chip->tcpci);
0865         return err;
0866     }
0867 
0868     return 0;
0869 }
0870 
0871 static int tcpci_remove(struct i2c_client *client)
0872 {
0873     struct tcpci_chip *chip = i2c_get_clientdata(client);
0874     int err;
0875 
0876     /* Disable chip interrupts before unregistering port */
0877     err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
0878     if (err < 0)
0879         dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err));
0880 
0881     tcpci_unregister_port(chip->tcpci);
0882 
0883     return 0;
0884 }
0885 
0886 static const struct i2c_device_id tcpci_id[] = {
0887     { "tcpci", 0 },
0888     { }
0889 };
0890 MODULE_DEVICE_TABLE(i2c, tcpci_id);
0891 
0892 #ifdef CONFIG_OF
0893 static const struct of_device_id tcpci_of_match[] = {
0894     { .compatible = "nxp,ptn5110", },
0895     {},
0896 };
0897 MODULE_DEVICE_TABLE(of, tcpci_of_match);
0898 #endif
0899 
0900 static struct i2c_driver tcpci_i2c_driver = {
0901     .driver = {
0902         .name = "tcpci",
0903         .of_match_table = of_match_ptr(tcpci_of_match),
0904     },
0905     .probe = tcpci_probe,
0906     .remove = tcpci_remove,
0907     .id_table = tcpci_id,
0908 };
0909 module_i2c_driver(tcpci_i2c_driver);
0910 
0911 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
0912 MODULE_LICENSE("GPL");
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