usb/serial/io_ti.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*****************************************************************************
0003  *
0004  *  Copyright (C) 1997-2002 Inside Out Networks, Inc.
0005  *
0006  *  Feb-16-2001 DMI Added I2C structure definitions
0007  *  May-29-2002 gkh Ported to Linux
0008  *
0009  *
0010  ******************************************************************************/
0011
0012 #ifndef _IO_TI_H_
0013 #define _IO_TI_H_
0014
0015 /* Address Space */
0016 #define DTK_ADDR_SPACE_XDATA        0x03    /* Addr is placed in XDATA space */
0017 #define DTK_ADDR_SPACE_I2C_TYPE_II  0x82    /* Addr is placed in I2C area */
0018 #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83    /* Addr is placed in I2C area */
0019
0020 /* UART Defines */
0021 #define UMPMEM_BASE_UART1       0xFFA0  /* UMP UART1 base address */
0022 #define UMPMEM_BASE_UART2       0xFFB0  /* UMP UART2 base address */
0023 #define UMPMEM_OFFS_UART_LSR        0x05    /* UMP UART LSR register offset */
0024
0025 /* Bits per character */
0026 #define UMP_UART_CHAR5BITS      0x00
0027 #define UMP_UART_CHAR6BITS      0x01
0028 #define UMP_UART_CHAR7BITS      0x02
0029 #define UMP_UART_CHAR8BITS      0x03
0030
0031 /* Parity */
0032 #define UMP_UART_NOPARITY       0x00
0033 #define UMP_UART_ODDPARITY      0x01
0034 #define UMP_UART_EVENPARITY     0x02
0035 #define UMP_UART_MARKPARITY     0x03
0036 #define UMP_UART_SPACEPARITY        0x04
0037
0038 /* Stop bits */
0039 #define UMP_UART_STOPBIT1       0x00
0040 #define UMP_UART_STOPBIT15      0x01
0041 #define UMP_UART_STOPBIT2       0x02
0042
0043 /* Line status register masks */
0044 #define UMP_UART_LSR_OV_MASK        0x01
0045 #define UMP_UART_LSR_PE_MASK        0x02
0046 #define UMP_UART_LSR_FE_MASK        0x04
0047 #define UMP_UART_LSR_BR_MASK        0x08
0048 #define UMP_UART_LSR_ER_MASK        0x0F
0049 #define UMP_UART_LSR_RX_MASK        0x10
0050 #define UMP_UART_LSR_TX_MASK        0x20
0051
0052 #define UMP_UART_LSR_DATA_MASK      (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK)
0053
0054 /* Port Settings Constants) */
0055 #define UMP_MASK_UART_FLAGS_RTS_FLOW        0x0001
0056 #define UMP_MASK_UART_FLAGS_RTS_DISABLE     0x0002
0057 #define UMP_MASK_UART_FLAGS_PARITY      0x0008
0058 #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW  0x0010
0059 #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW  0x0020
0060 #define UMP_MASK_UART_FLAGS_OUT_X       0x0040
0061 #define UMP_MASK_UART_FLAGS_OUT_XA      0x0080
0062 #define UMP_MASK_UART_FLAGS_IN_X        0x0100
0063 #define UMP_MASK_UART_FLAGS_DTR_FLOW        0x0800
0064 #define UMP_MASK_UART_FLAGS_DTR_DISABLE     0x1000
0065 #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT  0x2000
0066 #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR   0x4000
0067
0068 #define UMP_DMA_MODE_CONTINOUS          0x01
0069 #define UMP_PIPE_TRANS_TIMEOUT_ENA      0x80
0070 #define UMP_PIPE_TRANSFER_MODE_MASK     0x03
0071 #define UMP_PIPE_TRANS_TIMEOUT_MASK     0x7C
0072
0073 /* Purge port Direction Mask Bits */
0074 #define UMP_PORT_DIR_OUT            0x01
0075 #define UMP_PORT_DIR_IN             0x02
0076
0077 /* Address of Port 0 */
0078 #define UMPM_UART1_PORT             0x03
0079
0080 /* Commands */
0081 #define UMPC_SET_CONFIG         0x05
0082 #define UMPC_OPEN_PORT          0x06
0083 #define UMPC_CLOSE_PORT         0x07
0084 #define UMPC_START_PORT         0x08
0085 #define UMPC_STOP_PORT          0x09
0086 #define UMPC_TEST_PORT          0x0A
0087 #define UMPC_PURGE_PORT         0x0B
0088
0089 /* Force the Firmware to complete the current Read */
0090 #define UMPC_COMPLETE_READ      0x80
0091 /* Force UMP back into BOOT Mode */
0092 #define UMPC_HARDWARE_RESET     0x81
0093 /*
0094  * Copy current download image to type 0xf2 record in 16k I2C
0095  * firmware will change 0xff record to type 2 record when complete
0096  */
0097 #define UMPC_COPY_DNLD_TO_I2C       0x82
0098
0099 /*
0100  * Special function register commands
0101  * wIndex is register address
0102  * wValue is MSB/LSB mask/data
0103  */
0104 #define UMPC_WRITE_SFR          0x83    /* Write SFR Register */
0105
0106 /* wIndex is register address */
0107 #define UMPC_READ_SFR           0x84    /* Read SRF Register */
0108
0109 /* Set or Clear DTR (wValue bit 0 Set/Clear)    wIndex ModuleID (port) */
0110 #define UMPC_SET_CLR_DTR        0x85
0111
0112 /* Set or Clear RTS (wValue bit 0 Set/Clear)    wIndex ModuleID (port) */
0113 #define UMPC_SET_CLR_RTS        0x86
0114
0115 /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
0116 #define UMPC_SET_CLR_LOOPBACK       0x87
0117
0118 /* Set or Clear BREAK (wValue bit 0 Set/Clear)  wIndex ModuleID (port) */
0119 #define UMPC_SET_CLR_BREAK      0x88
0120
0121 /* Read MSR wIndex ModuleID (port) */
0122 #define UMPC_READ_MSR           0x89
0123
0124 /* Toolkit commands */
0125 /* Read-write group */
0126 #define UMPC_MEMORY_READ        0x92
0127 #define UMPC_MEMORY_WRITE       0x93
0128
0129 /*
0130  *  UMP DMA Definitions
0131  */
0132 #define UMPD_OEDB1_ADDRESS      0xFF08
0133 #define UMPD_OEDB2_ADDRESS      0xFF10
0134
0135 struct out_endpoint_desc_block {
0136     u8 Configuration;
0137     u8 XBufAddr;
0138     u8 XByteCount;
0139     u8 Unused1;
0140     u8 Unused2;
0141     u8 YBufAddr;
0142     u8 YByteCount;
0143     u8 BufferSize;
0144 };
0145
0146
0147 /*
0148  * TYPE DEFINITIONS
0149  * Structures for Firmware commands
0150  */
0151 /* UART settings */
0152 struct ump_uart_config {
0153     u16 wBaudRate;      /* Baud rate                        */
0154     u16 wFlags;     /* Bitmap mask of flags             */
0155     u8 bDataBits;       /* 5..8 - data bits per character   */
0156     u8 bParity;     /* Parity settings                  */
0157     u8 bStopBits;       /* Stop bits settings               */
0158     char cXon;      /* XON character                    */
0159     char cXoff;     /* XOFF character                   */
0160     u8 bUartMode;       /* Will be updated when a user      */
0161                 /* interface is defined             */
0162 };
0163
0164
0165 /*
0166  * TYPE DEFINITIONS
0167  * Structures for USB interrupts
0168  */
0169 /* Interrupt packet structure */
0170 struct ump_interrupt {
0171     u8 bICode;          /* Interrupt code (interrupt num)   */
0172     u8 bIInfo;          /* Interrupt information            */
0173 };
0174
0175
0176 #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 6) & 0x01)
0177 #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
0178 #define TIUMP_INTERRUPT_CODE_LSR    0x03
0179 #define TIUMP_INTERRUPT_CODE_MSR    0x04
0180
0181 #endif