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0001 /* SPDX-License-Identifier: GPL-2.0+ */ 0002 /************************************************************************ 0003 * 0004 * IONSP.H Definitions for I/O Networks Serial Protocol 0005 * 0006 * Copyright (C) 1997-1998 Inside Out Networks, Inc. 0007 * 0008 * These definitions are used by both kernel-mode driver and the 0009 * peripheral firmware and MUST be kept in sync. 0010 * 0011 ************************************************************************/ 0012 0013 /************************************************************************ 0014 0015 The data to and from all ports on the peripheral is multiplexed 0016 through a single endpoint pair (EP1 since it supports 64-byte 0017 MaxPacketSize). Therefore, the data, commands, and status for 0018 each port must be preceded by a short header identifying the 0019 destination port. The header also identifies the bytes that follow 0020 as data or as command/status info. 0021 0022 Header format, first byte: 0023 0024 CLLLLPPP 0025 -------- 0026 | | |------ Port Number: 0-7 0027 | |--------- Length: MSB bits of length 0028 |----------- Data/Command: 0 = Data header 0029 1 = Cmd / Status (Cmd if OUT, Status if IN) 0030 0031 This gives 2 possible formats: 0032 0033 0034 Data header: 0LLLLPPP LLLLLLLL 0035 ============ 0036 0037 Where (LLLL,LLLLLLL) is 12-bit length of data that follows for 0038 port number (PPP). The length is 0-based (0-FFF means 0-4095 0039 bytes). The ~4K limit allows the host driver (which deals in 0040 transfer requests instead of individual packets) to write a 0041 large chunk of data in a single request. Note, however, that 0042 the length must always be <= the current TxCredits for a given 0043 port due to buffering limitations on the peripheral. 0044 0045 0046 Cmd/Status header: 1ccccPPP [ CCCCCCCC, Params ]... 0047 ================== 0048 0049 Where (cccc) or (cccc,CCCCCCCC) is the cmd or status identifier. 0050 Frequently-used values are encoded as (cccc), longer ones using 0051 (cccc,CCCCCCCC). Subsequent bytes are optional parameters and are 0052 specific to the cmd or status code. This may include a length 0053 for command and status codes that need variable-length parameters. 0054 0055 0056 In addition, we use another interrupt pipe (endpoint) which the host polls 0057 periodically for flow control information. The peripheral, when there has 0058 been a change, sends the following 10-byte packet: 0059 0060 RRRRRRRRRRRRRRRR 0061 T0T0T0T0T0T0T0T0 0062 T1T1T1T1T1T1T1T1 0063 T2T2T2T2T2T2T2T2 0064 T3T3T3T3T3T3T3T3 0065 0066 The first field is the 16-bit RxBytesAvail field, which indicates the 0067 number of bytes which may be read by the host from EP1. This is necessary: 0068 (a) because OSR2.1 has a bug which causes data loss if the peripheral returns 0069 fewer bytes than the host expects to read, and (b) because, on Microsoft 0070 platforms at least, an outstanding read posted on EP1 consumes about 35% of 0071 the CPU just polling the device for data. 0072 0073 The next 4 fields are the 16-bit TxCredits for each port, which indicate how 0074 many bytes the host is allowed to send on EP1 for transmit to a given port. 0075 After an OPEN_PORT command, the Edgeport sends the initial TxCredits for that 0076 port. 0077 0078 All 16-bit fields are sent in little-endian (Intel) format. 0079 0080 ************************************************************************/ 0081 0082 // 0083 // Define format of InterruptStatus packet returned from the 0084 // Interrupt pipe 0085 // 0086 0087 struct int_status_pkt { 0088 __u16 RxBytesAvail; // Additional bytes available to 0089 // be read from Bulk IN pipe 0090 __u16 TxCredits[MAX_RS232_PORTS]; // Additional space available in 0091 // given port's TxBuffer 0092 }; 0093 0094 0095 #define GET_INT_STATUS_SIZE(NumPorts) (sizeof(__u16) + (sizeof(__u16) * (NumPorts))) 0096 0097 0098 0099 // 0100 // Define cmd/status header values and macros to extract them. 0101 // 0102 // Data: 0LLLLPPP LLLLLLLL 0103 // Cmd/Stat: 1ccccPPP CCCCCCCC 0104 0105 #define IOSP_DATA_HDR_SIZE 2 0106 #define IOSP_CMD_HDR_SIZE 2 0107 0108 #define IOSP_MAX_DATA_LENGTH 0x0FFF // 12 bits -> 4K 0109 0110 #define IOSP_PORT_MASK 0x07 // Mask to isolate port number 0111 #define IOSP_CMD_STAT_BIT 0x80 // If set, this is command/status header 0112 0113 #define IS_CMD_STAT_HDR(Byte1) ((Byte1) & IOSP_CMD_STAT_BIT) 0114 #define IS_DATA_HDR(Byte1) (!IS_CMD_STAT_HDR(Byte1)) 0115 0116 #define IOSP_GET_HDR_PORT(Byte1) ((__u8) ((Byte1) & IOSP_PORT_MASK)) 0117 #define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) (((__u16)((Byte1) & 0x78)) << 5) | (Byte2)) 0118 #define IOSP_GET_STATUS_CODE(Byte1) ((__u8) (((Byte1) & 0x78) >> 3)) 0119 0120 0121 // 0122 // These macros build the 1st and 2nd bytes for a data header 0123 // 0124 #define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78)))) 0125 #define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len)) 0126 0127 0128 // 0129 // These macros build the 1st and 2nd bytes for a command header 0130 // 0131 #define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) (IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3)))) 0132 0133 0134 //-------------------------------------------------------------- 0135 // 0136 // Define values for commands and command parameters 0137 // (sent from Host to Edgeport) 0138 // 0139 // 1ccccPPP P1P1P1P1 [ P2P2P2P2P2 ]... 0140 // 0141 // cccc: 00-07 2-byte commands. Write UART register 0-7 with 0142 // value in P1. See 16650.H for definitions of 0143 // UART register numbers and contents. 0144 // 0145 // 08-0B 3-byte commands: ==== P1 ==== ==== P2 ==== 0146 // 08 available for expansion 0147 // 09 1-param commands Command Code Param 0148 // 0A available for expansion 0149 // 0B available for expansion 0150 // 0151 // 0C-0D 4-byte commands. P1 = extended cmd and P2,P3 = params 0152 // Currently unimplemented. 0153 // 0154 // 0E-0F N-byte commands: P1 = num bytes after P1 (ie, TotalLen - 2) 0155 // P2 = extended cmd, P3..Pn = parameters. 0156 // Currently unimplemented. 0157 // 0158 0159 #define IOSP_WRITE_UART_REG(n) ((n) & 0x07) // UartReg[ n ] := P1 0160 0161 // Register numbers and contents 0162 // defined in 16554.H. 0163 0164 // 0x08 // Available for expansion. 0165 #define IOSP_EXT_CMD 0x09 // P1 = Command code (defined below) 0166 0167 // P2 = Parameter 0168 0169 // 0170 // Extended Command values, used with IOSP_EXT_CMD, may 0171 // or may not use parameter P2. 0172 // 0173 0174 #define IOSP_CMD_OPEN_PORT 0x00 // Enable ints, init UART. (NO PARAM) 0175 #define IOSP_CMD_CLOSE_PORT 0x01 // Disable ints, flush buffers. (NO PARAM) 0176 #define IOSP_CMD_CHASE_PORT 0x02 // Wait for Edgeport TX buffers to empty. (NO PARAM) 0177 #define IOSP_CMD_SET_RX_FLOW 0x03 // Set Rx Flow Control in Edgeport 0178 #define IOSP_CMD_SET_TX_FLOW 0x04 // Set Tx Flow Control in Edgeport 0179 #define IOSP_CMD_SET_XON_CHAR 0x05 // Set XON Character in Edgeport 0180 #define IOSP_CMD_SET_XOFF_CHAR 0x06 // Set XOFF Character in Edgeport 0181 #define IOSP_CMD_RX_CHECK_REQ 0x07 // Request Edgeport to insert a Checkpoint into 0182 0183 // the receive data stream (Parameter = 1 byte sequence number) 0184 0185 #define IOSP_CMD_SET_BREAK 0x08 // Turn on the BREAK (LCR bit 6) 0186 #define IOSP_CMD_CLEAR_BREAK 0x09 // Turn off the BREAK (LCR bit 6) 0187 0188 0189 // 0190 // Define macros to simplify building of IOSP cmds 0191 // 0192 0193 #define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \ 0194 do { \ 0195 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \ 0196 IOSP_WRITE_UART_REG(Reg)); \ 0197 (*(ppBuf))[1] = (Val); \ 0198 \ 0199 *ppBuf += 2; \ 0200 *pLen += 2; \ 0201 } while (0) 0202 0203 #define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \ 0204 do { \ 0205 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), IOSP_EXT_CMD); \ 0206 (*(ppBuf))[1] = (ExtCmd); \ 0207 (*(ppBuf))[2] = (Param); \ 0208 \ 0209 *ppBuf += 3; \ 0210 *pLen += 3; \ 0211 } while (0) 0212 0213 0214 0215 //-------------------------------------------------------------- 0216 // 0217 // Define format of flow control commands 0218 // (sent from Host to Edgeport) 0219 // 0220 // 11001PPP FlowCmd FlowTypes 0221 // 0222 // Note that the 'FlowTypes' parameter is a bit mask; that is, 0223 // more than one flow control type can be active at the same time. 0224 // FlowTypes = 0 means 'no flow control'. 0225 // 0226 0227 // 0228 // IOSP_CMD_SET_RX_FLOW 0229 // 0230 // Tells Edgeport how it can stop incoming UART data 0231 // 0232 // Example for Port 0 0233 // P0 = 11001000 0234 // P1 = IOSP_CMD_SET_RX_FLOW 0235 // P2 = Bit mask as follows: 0236 0237 #define IOSP_RX_FLOW_RTS 0x01 // Edgeport drops RTS to stop incoming data 0238 #define IOSP_RX_FLOW_DTR 0x02 // Edgeport drops DTR to stop incoming data 0239 #define IOSP_RX_FLOW_DSR_SENSITIVITY 0x04 // Ignores Rx data unless DSR high 0240 0241 // Not currently implemented by firmware. 0242 #define IOSP_RX_FLOW_XON_XOFF 0x08 // Edgeport sends XOFF char to stop incoming data. 0243 0244 // Host must have previously programmed the 0245 // XON/XOFF values with SET_XON/SET_XOFF 0246 // before enabling this bit. 0247 0248 // 0249 // IOSP_CMD_SET_TX_FLOW 0250 // 0251 // Tells Edgeport what signal(s) will stop it from transmitting UART data 0252 // 0253 // Example for Port 0 0254 // P0 = 11001000 0255 // P1 = IOSP_CMD_SET_TX_FLOW 0256 // P2 = Bit mask as follows: 0257 0258 #define IOSP_TX_FLOW_CTS 0x01 // Edgeport stops Tx if CTS low 0259 #define IOSP_TX_FLOW_DSR 0x02 // Edgeport stops Tx if DSR low 0260 #define IOSP_TX_FLOW_DCD 0x04 // Edgeport stops Tx if DCD low 0261 #define IOSP_TX_FLOW_XON_XOFF 0x08 // Edgeport stops Tx upon receiving XOFF char. 0262 0263 // Host must have previously programmed the 0264 // XON/XOFF values with SET_XON/SET_XOFF 0265 // before enabling this bit. 0266 #define IOSP_TX_FLOW_XOFF_CONTINUE 0x10 // If not set, Edgeport stops Tx when 0267 0268 // sending XOFF in order to fix broken 0269 // systems that interpret the next 0270 // received char as XON. 0271 // If set, Edgeport continues Tx 0272 // normally after transmitting XOFF. 0273 // Not currently implemented by firmware. 0274 #define IOSP_TX_TOGGLE_RTS 0x20 // Edgeport drives RTS as a true half-duplex 0275 0276 // Request-to-Send signal: it is raised before 0277 // beginning transmission and lowered after 0278 // the last Tx char leaves the UART. 0279 // Not currently implemented by firmware. 0280 0281 // 0282 // IOSP_CMD_SET_XON_CHAR 0283 // 0284 // Sets the character which Edgeport transmits/interprets as XON. 0285 // Note: This command MUST be sent before sending a SET_RX_FLOW or 0286 // SET_TX_FLOW with the XON_XOFF bit set. 0287 // 0288 // Example for Port 0 0289 // P0 = 11001000 0290 // P1 = IOSP_CMD_SET_XON_CHAR 0291 // P2 = 0x11 0292 0293 0294 // 0295 // IOSP_CMD_SET_XOFF_CHAR 0296 // 0297 // Sets the character which Edgeport transmits/interprets as XOFF. 0298 // Note: This command must be sent before sending a SET_RX_FLOW or 0299 // SET_TX_FLOW with the XON_XOFF bit set. 0300 // 0301 // Example for Port 0 0302 // P0 = 11001000 0303 // P1 = IOSP_CMD_SET_XOFF_CHAR 0304 // P2 = 0x13 0305 0306 0307 // 0308 // IOSP_CMD_RX_CHECK_REQ 0309 // 0310 // This command is used to assist in the implementation of the 0311 // IOCTL_SERIAL_PURGE Windows IOCTL. 0312 // This IOSP command tries to place a marker at the end of the RX 0313 // queue in the Edgeport. If the Edgeport RX queue is full then 0314 // the Check will be discarded. 0315 // It is up to the device driver to timeout waiting for the 0316 // RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is 0317 // sure that all data has been received from the edgeport and 0318 // may now purge any internal RX buffers. 0319 // Note tat the sequence numbers may be used to detect lost 0320 // CHECK_REQs. 0321 0322 // Example for Port 0 0323 // P0 = 11001000 0324 // P1 = IOSP_CMD_RX_CHECK_REQ 0325 // P2 = Sequence number 0326 0327 0328 // Response will be: 0329 // P1 = IOSP_EXT_RX_CHECK_RSP 0330 // P2 = Request Sequence number 0331 0332 0333 0334 //-------------------------------------------------------------- 0335 // 0336 // Define values for status and status parameters 0337 // (received by Host from Edgeport) 0338 // 0339 // 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]... 0340 // 0341 // ssss: 00-07 2-byte status. ssss identifies which UART register 0342 // has changed value, and the new value is in P1. 0343 // Note that the ssss values do not correspond to the 0344 // 16554 register numbers given in 16554.H. Instead, 0345 // see below for definitions of the ssss numbers 0346 // used in this status message. 0347 // 0348 // 08-0B 3-byte status: ==== P1 ==== ==== P2 ==== 0349 // 08 LSR_DATA: New LSR Errored byte 0350 // 09 1-param responses Response Code Param 0351 // 0A OPEN_RSP: InitialMsr TxBufferSize 0352 // 0B available for expansion 0353 // 0354 // 0C-0D 4-byte status. P1 = extended status code and P2,P3 = params 0355 // Not currently implemented. 0356 // 0357 // 0E-0F N-byte status: P1 = num bytes after P1 (ie, TotalLen - 2) 0358 // P2 = extended status, P3..Pn = parameters. 0359 // Not currently implemented. 0360 // 0361 0362 /**************************************************** 0363 * SSSS values for 2-byte status messages (0-8) 0364 ****************************************************/ 0365 0366 #define IOSP_STATUS_LSR 0x00 // P1 is new value of LSR register. 0367 0368 // Bits defined in 16554.H. Edgeport 0369 // returns this in order to report 0370 // line status errors (overrun, 0371 // parity, framing, break). This form 0372 // is used when a errored receive data 0373 // character was NOT present in the 0374 // UART when the LSR error occurred 0375 // (ie, when LSR bit 0 = 0). 0376 0377 #define IOSP_STATUS_MSR 0x01 // P1 is new value of MSR register. 0378 0379 // Bits defined in 16554.H. Edgeport 0380 // returns this in order to report 0381 // changes in modem status lines 0382 // (CTS, DSR, RI, CD) 0383 // 0384 0385 // 0x02 // Available for future expansion 0386 // 0x03 // 0387 // 0x04 // 0388 // 0x05 // 0389 // 0x06 // 0390 // 0x07 // 0391 0392 0393 /**************************************************** 0394 * SSSS values for 3-byte status messages (8-A) 0395 ****************************************************/ 0396 0397 #define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR) 0398 0399 // P2 is errored character read from 0400 // RxFIFO after LSR reported an error. 0401 0402 #define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2. 0403 0404 0405 // Response Codes (P1 values) for 3-byte status messages 0406 0407 #define IOSP_EXT_STATUS_CHASE_RSP 0 // Reply to CHASE_PORT cmd. P2 is outcome: 0408 #define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully 0409 #define IOSP_EXT_STATUS_CHASE_FAIL 1 // P2 = 1: Timed out (stuck due to flow 0410 0411 // control from remote device). 0412 0413 #define IOSP_EXT_STATUS_RX_CHECK_RSP 1 // Reply to RX_CHECK cmd. P2 is sequence number 0414 0415 0416 #define IOSP_STATUS_OPEN_RSP 0x0A // Reply to OPEN_PORT cmd. 0417 0418 // P1 is Initial MSR value 0419 // P2 is encoded TxBuffer Size: 0420 // TxBufferSize = (P2 + 1) * 64 0421 0422 // 0x0B // Available for future expansion 0423 0424 #define GET_TX_BUFFER_SIZE(P2) (((P2) + 1) * 64) 0425 0426 0427 0428 0429 /**************************************************** 0430 * SSSS values for 4-byte status messages 0431 ****************************************************/ 0432 0433 #define IOSP_EXT4_STATUS 0x0C // Extended status code in P1, 0434 0435 // Params in P2, P3 0436 // Currently unimplemented. 0437 0438 // 0x0D // Currently unused, available. 0439 0440 0441 0442 // 0443 // Macros to parse status messages 0444 // 0445 0446 #define IOSP_GET_STATUS_LEN(code) ((code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4)) 0447 0448 #define IOSP_STATUS_IS_2BYTE(code) ((code) < 0x08) 0449 #define IOSP_STATUS_IS_3BYTE(code) (((code) >= 0x08) && ((code) <= 0x0B)) 0450 #define IOSP_STATUS_IS_4BYTE(code) (((code) >= 0x0C) && ((code) <= 0x0D)) 0451
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