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0001 // SPDX-License-Identifier: GPL-1.0+
0002 /*
0003  * Renesas USB driver
0004  *
0005  * Copyright (C) 2011 Renesas Solutions Corp.
0006  * Copyright (C) 2019 Renesas Electronics Corporation
0007  * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
0008  */
0009 #include <linux/delay.h>
0010 #include <linux/io.h>
0011 #include <linux/scatterlist.h>
0012 #include "common.h"
0013 #include "pipe.h"
0014 
0015 #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
0016 
0017 #define usbhsf_fifo_is_busy(f)  ((f)->pipe) /* see usbhs_pipe_select_fifo */
0018 
0019 /*
0020  *      packet initialize
0021  */
0022 void usbhs_pkt_init(struct usbhs_pkt *pkt)
0023 {
0024     INIT_LIST_HEAD(&pkt->node);
0025 }
0026 
0027 /*
0028  *      packet control function
0029  */
0030 static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
0031 {
0032     struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
0033     struct device *dev = usbhs_priv_to_dev(priv);
0034 
0035     dev_err(dev, "null handler\n");
0036 
0037     return -EINVAL;
0038 }
0039 
0040 static const struct usbhs_pkt_handle usbhsf_null_handler = {
0041     .prepare = usbhsf_null_handle,
0042     .try_run = usbhsf_null_handle,
0043 };
0044 
0045 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
0046             void (*done)(struct usbhs_priv *priv,
0047                  struct usbhs_pkt *pkt),
0048             void *buf, int len, int zero, int sequence)
0049 {
0050     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0051     struct device *dev = usbhs_priv_to_dev(priv);
0052     unsigned long flags;
0053 
0054     if (!done) {
0055         dev_err(dev, "no done function\n");
0056         return;
0057     }
0058 
0059     /********************  spin lock ********************/
0060     usbhs_lock(priv, flags);
0061 
0062     if (!pipe->handler) {
0063         dev_err(dev, "no handler function\n");
0064         pipe->handler = &usbhsf_null_handler;
0065     }
0066 
0067     list_move_tail(&pkt->node, &pipe->list);
0068 
0069     /*
0070      * each pkt must hold own handler.
0071      * because handler might be changed by its situation.
0072      * dma handler -> pio handler.
0073      */
0074     pkt->pipe   = pipe;
0075     pkt->buf    = buf;
0076     pkt->handler    = pipe->handler;
0077     pkt->length = len;
0078     pkt->zero   = zero;
0079     pkt->actual = 0;
0080     pkt->done   = done;
0081     pkt->sequence   = sequence;
0082 
0083     usbhs_unlock(priv, flags);
0084     /********************  spin unlock ******************/
0085 }
0086 
0087 static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
0088 {
0089     list_del_init(&pkt->node);
0090 }
0091 
0092 struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
0093 {
0094     return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
0095 }
0096 
0097 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
0098                  struct usbhs_fifo *fifo);
0099 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
0100                         struct usbhs_pkt *pkt);
0101 #define usbhsf_dma_map(p)   __usbhsf_dma_map_ctrl(p, 1)
0102 #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
0103 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
0104 static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable);
0105 static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable);
0106 struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
0107 {
0108     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0109     struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
0110     unsigned long flags;
0111 
0112     /********************  spin lock ********************/
0113     usbhs_lock(priv, flags);
0114 
0115     usbhs_pipe_disable(pipe);
0116 
0117     if (!pkt)
0118         pkt = __usbhsf_pkt_get(pipe);
0119 
0120     if (pkt) {
0121         struct dma_chan *chan = NULL;
0122 
0123         if (fifo)
0124             chan = usbhsf_dma_chan_get(fifo, pkt);
0125         if (chan) {
0126             dmaengine_terminate_all(chan);
0127             usbhsf_dma_unmap(pkt);
0128         } else {
0129             if (usbhs_pipe_is_dir_in(pipe))
0130                 usbhsf_rx_irq_ctrl(pipe, 0);
0131             else
0132                 usbhsf_tx_irq_ctrl(pipe, 0);
0133         }
0134 
0135         usbhs_pipe_clear_without_sequence(pipe, 0, 0);
0136         usbhs_pipe_running(pipe, 0);
0137 
0138         __usbhsf_pkt_del(pkt);
0139     }
0140 
0141     if (fifo)
0142         usbhsf_fifo_unselect(pipe, fifo);
0143 
0144     usbhs_unlock(priv, flags);
0145     /********************  spin unlock ******************/
0146 
0147     return pkt;
0148 }
0149 
0150 enum {
0151     USBHSF_PKT_PREPARE,
0152     USBHSF_PKT_TRY_RUN,
0153     USBHSF_PKT_DMA_DONE,
0154 };
0155 
0156 static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
0157 {
0158     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0159     struct usbhs_pkt *pkt;
0160     struct device *dev = usbhs_priv_to_dev(priv);
0161     int (*func)(struct usbhs_pkt *pkt, int *is_done);
0162     unsigned long flags;
0163     int ret = 0;
0164     int is_done = 0;
0165 
0166     /********************  spin lock ********************/
0167     usbhs_lock(priv, flags);
0168 
0169     pkt = __usbhsf_pkt_get(pipe);
0170     if (!pkt) {
0171         ret = -EINVAL;
0172         goto __usbhs_pkt_handler_end;
0173     }
0174 
0175     switch (type) {
0176     case USBHSF_PKT_PREPARE:
0177         func = pkt->handler->prepare;
0178         break;
0179     case USBHSF_PKT_TRY_RUN:
0180         func = pkt->handler->try_run;
0181         break;
0182     case USBHSF_PKT_DMA_DONE:
0183         func = pkt->handler->dma_done;
0184         break;
0185     default:
0186         dev_err(dev, "unknown pkt handler\n");
0187         goto __usbhs_pkt_handler_end;
0188     }
0189 
0190     if (likely(func))
0191         ret = func(pkt, &is_done);
0192 
0193     if (is_done)
0194         __usbhsf_pkt_del(pkt);
0195 
0196 __usbhs_pkt_handler_end:
0197     usbhs_unlock(priv, flags);
0198     /********************  spin unlock ******************/
0199 
0200     if (is_done) {
0201         pkt->done(priv, pkt);
0202         usbhs_pkt_start(pipe);
0203     }
0204 
0205     return ret;
0206 }
0207 
0208 void usbhs_pkt_start(struct usbhs_pipe *pipe)
0209 {
0210     usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
0211 }
0212 
0213 /*
0214  *      irq enable/disable function
0215  */
0216 #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
0217 #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
0218 #define usbhsf_irq_callback_ctrl(pipe, status, enable)          \
0219     ({                              \
0220         struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
0221         struct usbhs_mod *mod = usbhs_mod_get_current(priv);    \
0222         u16 status = (1 << usbhs_pipe_number(pipe));        \
0223         if (!mod)                       \
0224             return;                     \
0225         if (enable)                     \
0226             mod->status |= status;              \
0227         else                            \
0228             mod->status &= ~status;             \
0229         usbhs_irq_callback_update(priv, mod);           \
0230     })
0231 
0232 static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
0233 {
0234     /*
0235      * And DCP pipe can NOT use "ready interrupt" for "send"
0236      * it should use "empty" interrupt.
0237      * see
0238      *   "Operation" - "Interrupt Function" - "BRDY Interrupt"
0239      *
0240      * on the other hand, normal pipe can use "ready interrupt" for "send"
0241      * even though it is single/double buffer
0242      */
0243     if (usbhs_pipe_is_dcp(pipe))
0244         usbhsf_irq_empty_ctrl(pipe, enable);
0245     else
0246         usbhsf_irq_ready_ctrl(pipe, enable);
0247 }
0248 
0249 static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
0250 {
0251     usbhsf_irq_ready_ctrl(pipe, enable);
0252 }
0253 
0254 /*
0255  *      FIFO ctrl
0256  */
0257 static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
0258                    struct usbhs_fifo *fifo)
0259 {
0260     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0261 
0262     usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
0263 }
0264 
0265 static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
0266                    struct usbhs_fifo *fifo)
0267 {
0268     /* The FIFO port is accessible */
0269     if (usbhs_read(priv, fifo->ctr) & FRDY)
0270         return 0;
0271 
0272     return -EBUSY;
0273 }
0274 
0275 static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
0276                   struct usbhs_fifo *fifo)
0277 {
0278     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0279     int ret = 0;
0280 
0281     if (!usbhs_pipe_is_dcp(pipe)) {
0282         /*
0283          * This driver checks the pipe condition first to avoid -EBUSY
0284          * from usbhsf_fifo_barrier() if the pipe is RX direction and
0285          * empty.
0286          */
0287         if (usbhs_pipe_is_dir_in(pipe))
0288             ret = usbhs_pipe_is_accessible(pipe);
0289         if (!ret)
0290             ret = usbhsf_fifo_barrier(priv, fifo);
0291     }
0292 
0293     /*
0294      * if non-DCP pipe, this driver should set BCLR when
0295      * usbhsf_fifo_barrier() returns 0.
0296      */
0297     if (!ret)
0298         usbhs_write(priv, fifo->ctr, BCLR);
0299 }
0300 
0301 static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
0302                    struct usbhs_fifo *fifo)
0303 {
0304     return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
0305 }
0306 
0307 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
0308                  struct usbhs_fifo *fifo)
0309 {
0310     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0311 
0312     usbhs_pipe_select_fifo(pipe, NULL);
0313     usbhs_write(priv, fifo->sel, 0);
0314 }
0315 
0316 static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
0317                   struct usbhs_fifo *fifo,
0318                   int write)
0319 {
0320     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0321     struct device *dev = usbhs_priv_to_dev(priv);
0322     int timeout = 1024;
0323     u16 mask = ((1 << 5) | 0xF);        /* mask of ISEL | CURPIPE */
0324     u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
0325 
0326     if (usbhs_pipe_is_busy(pipe) ||
0327         usbhsf_fifo_is_busy(fifo))
0328         return -EBUSY;
0329 
0330     if (usbhs_pipe_is_dcp(pipe)) {
0331         base |= (1 == write) << 5;  /* ISEL */
0332 
0333         if (usbhs_mod_is_host(priv))
0334             usbhs_dcp_dir_for_host(pipe, write);
0335     }
0336 
0337     /* "base" will be used below  */
0338     usbhs_write(priv, fifo->sel, base | MBW_32);
0339 
0340     /* check ISEL and CURPIPE value */
0341     while (timeout--) {
0342         if (base == (mask & usbhs_read(priv, fifo->sel))) {
0343             usbhs_pipe_select_fifo(pipe, fifo);
0344             return 0;
0345         }
0346         udelay(10);
0347     }
0348 
0349     dev_err(dev, "fifo select error\n");
0350 
0351     return -EIO;
0352 }
0353 
0354 /*
0355  *      DCP status stage
0356  */
0357 static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
0358 {
0359     struct usbhs_pipe *pipe = pkt->pipe;
0360     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0361     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
0362     struct device *dev = usbhs_priv_to_dev(priv);
0363     int ret;
0364 
0365     usbhs_pipe_disable(pipe);
0366 
0367     ret = usbhsf_fifo_select(pipe, fifo, 1);
0368     if (ret < 0) {
0369         dev_err(dev, "%s() failed\n", __func__);
0370         return ret;
0371     }
0372 
0373     usbhs_pipe_sequence_data1(pipe); /* DATA1 */
0374 
0375     usbhsf_fifo_clear(pipe, fifo);
0376     usbhsf_send_terminator(pipe, fifo);
0377 
0378     usbhsf_fifo_unselect(pipe, fifo);
0379 
0380     usbhsf_tx_irq_ctrl(pipe, 1);
0381     usbhs_pipe_enable(pipe);
0382 
0383     return ret;
0384 }
0385 
0386 static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
0387 {
0388     struct usbhs_pipe *pipe = pkt->pipe;
0389     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0390     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
0391     struct device *dev = usbhs_priv_to_dev(priv);
0392     int ret;
0393 
0394     usbhs_pipe_disable(pipe);
0395 
0396     ret = usbhsf_fifo_select(pipe, fifo, 0);
0397     if (ret < 0) {
0398         dev_err(dev, "%s() fail\n", __func__);
0399         return ret;
0400     }
0401 
0402     usbhs_pipe_sequence_data1(pipe); /* DATA1 */
0403     usbhsf_fifo_clear(pipe, fifo);
0404 
0405     usbhsf_fifo_unselect(pipe, fifo);
0406 
0407     usbhsf_rx_irq_ctrl(pipe, 1);
0408     usbhs_pipe_enable(pipe);
0409 
0410     return ret;
0411 
0412 }
0413 
0414 static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
0415 {
0416     struct usbhs_pipe *pipe = pkt->pipe;
0417 
0418     if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
0419         usbhsf_tx_irq_ctrl(pipe, 0);
0420     else
0421         usbhsf_rx_irq_ctrl(pipe, 0);
0422 
0423     pkt->actual = pkt->length;
0424     *is_done = 1;
0425 
0426     return 0;
0427 }
0428 
0429 const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
0430     .prepare = usbhs_dcp_dir_switch_to_write,
0431     .try_run = usbhs_dcp_dir_switch_done,
0432 };
0433 
0434 const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
0435     .prepare = usbhs_dcp_dir_switch_to_read,
0436     .try_run = usbhs_dcp_dir_switch_done,
0437 };
0438 
0439 /*
0440  *      DCP data stage (push)
0441  */
0442 static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
0443 {
0444     struct usbhs_pipe *pipe = pkt->pipe;
0445 
0446     usbhs_pipe_sequence_data1(pipe); /* DATA1 */
0447 
0448     /*
0449      * change handler to PIO push
0450      */
0451     pkt->handler = &usbhs_fifo_pio_push_handler;
0452 
0453     return pkt->handler->prepare(pkt, is_done);
0454 }
0455 
0456 const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
0457     .prepare = usbhsf_dcp_data_stage_try_push,
0458 };
0459 
0460 /*
0461  *      DCP data stage (pop)
0462  */
0463 static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
0464                          int *is_done)
0465 {
0466     struct usbhs_pipe *pipe = pkt->pipe;
0467     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0468     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
0469 
0470     if (usbhs_pipe_is_busy(pipe))
0471         return 0;
0472 
0473     /*
0474      * prepare pop for DCP should
0475      *  - change DCP direction,
0476      *  - clear fifo
0477      *  - DATA1
0478      */
0479     usbhs_pipe_disable(pipe);
0480 
0481     usbhs_pipe_sequence_data1(pipe); /* DATA1 */
0482 
0483     usbhsf_fifo_select(pipe, fifo, 0);
0484     usbhsf_fifo_clear(pipe, fifo);
0485     usbhsf_fifo_unselect(pipe, fifo);
0486 
0487     /*
0488      * change handler to PIO pop
0489      */
0490     pkt->handler = &usbhs_fifo_pio_pop_handler;
0491 
0492     return pkt->handler->prepare(pkt, is_done);
0493 }
0494 
0495 const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
0496     .prepare = usbhsf_dcp_data_stage_prepare_pop,
0497 };
0498 
0499 /*
0500  *      PIO push handler
0501  */
0502 static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
0503 {
0504     struct usbhs_pipe *pipe = pkt->pipe;
0505     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0506     struct device *dev = usbhs_priv_to_dev(priv);
0507     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
0508     void __iomem *addr = priv->base + fifo->port;
0509     u8 *buf;
0510     int maxp = usbhs_pipe_get_maxpacket(pipe);
0511     int total_len;
0512     int i, ret, len;
0513     int is_short;
0514 
0515     usbhs_pipe_data_sequence(pipe, pkt->sequence);
0516     pkt->sequence = -1; /* -1 sequence will be ignored */
0517 
0518     usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
0519 
0520     ret = usbhsf_fifo_select(pipe, fifo, 1);
0521     if (ret < 0)
0522         return 0;
0523 
0524     ret = usbhs_pipe_is_accessible(pipe);
0525     if (ret < 0) {
0526         /* inaccessible pipe is not an error */
0527         ret = 0;
0528         goto usbhs_fifo_write_busy;
0529     }
0530 
0531     ret = usbhsf_fifo_barrier(priv, fifo);
0532     if (ret < 0)
0533         goto usbhs_fifo_write_busy;
0534 
0535     buf     = pkt->buf    + pkt->actual;
0536     len     = pkt->length - pkt->actual;
0537     len     = min(len, maxp);
0538     total_len   = len;
0539     is_short    = total_len < maxp;
0540 
0541     /*
0542      * FIXME
0543      *
0544      * 32-bit access only
0545      */
0546     if (len >= 4 && !((unsigned long)buf & 0x03)) {
0547         iowrite32_rep(addr, buf, len / 4);
0548         len %= 4;
0549         buf += total_len - len;
0550     }
0551 
0552     /* the rest operation */
0553     if (usbhs_get_dparam(priv, cfifo_byte_addr)) {
0554         for (i = 0; i < len; i++)
0555             iowrite8(buf[i], addr + (i & 0x03));
0556     } else {
0557         for (i = 0; i < len; i++)
0558             iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
0559     }
0560 
0561     /*
0562      * variable update
0563      */
0564     pkt->actual += total_len;
0565 
0566     if (pkt->actual < pkt->length)
0567         *is_done = 0;       /* there are remainder data */
0568     else if (is_short)
0569         *is_done = 1;       /* short packet */
0570     else
0571         *is_done = !pkt->zero;  /* send zero packet ? */
0572 
0573     /*
0574      * pipe/irq handling
0575      */
0576     if (is_short)
0577         usbhsf_send_terminator(pipe, fifo);
0578 
0579     usbhsf_tx_irq_ctrl(pipe, !*is_done);
0580     usbhs_pipe_running(pipe, !*is_done);
0581     usbhs_pipe_enable(pipe);
0582 
0583     dev_dbg(dev, "  send %d (%d/ %d/ %d/ %d)\n",
0584         usbhs_pipe_number(pipe),
0585         pkt->length, pkt->actual, *is_done, pkt->zero);
0586 
0587     usbhsf_fifo_unselect(pipe, fifo);
0588 
0589     return 0;
0590 
0591 usbhs_fifo_write_busy:
0592     usbhsf_fifo_unselect(pipe, fifo);
0593 
0594     /*
0595      * pipe is busy.
0596      * retry in interrupt
0597      */
0598     usbhsf_tx_irq_ctrl(pipe, 1);
0599     usbhs_pipe_running(pipe, 1);
0600 
0601     return ret;
0602 }
0603 
0604 static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
0605 {
0606     if (usbhs_pipe_is_running(pkt->pipe))
0607         return 0;
0608 
0609     return usbhsf_pio_try_push(pkt, is_done);
0610 }
0611 
0612 const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
0613     .prepare = usbhsf_pio_prepare_push,
0614     .try_run = usbhsf_pio_try_push,
0615 };
0616 
0617 /*
0618  *      PIO pop handler
0619  */
0620 static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
0621 {
0622     struct usbhs_pipe *pipe = pkt->pipe;
0623     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0624     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
0625 
0626     if (usbhs_pipe_is_busy(pipe))
0627         return 0;
0628 
0629     if (usbhs_pipe_is_running(pipe))
0630         return 0;
0631 
0632     /*
0633      * pipe enable to prepare packet receive
0634      */
0635     usbhs_pipe_data_sequence(pipe, pkt->sequence);
0636     pkt->sequence = -1; /* -1 sequence will be ignored */
0637 
0638     if (usbhs_pipe_is_dcp(pipe))
0639         usbhsf_fifo_clear(pipe, fifo);
0640 
0641     usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
0642     usbhs_pipe_enable(pipe);
0643     usbhs_pipe_running(pipe, 1);
0644     usbhsf_rx_irq_ctrl(pipe, 1);
0645 
0646     return 0;
0647 }
0648 
0649 static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
0650 {
0651     struct usbhs_pipe *pipe = pkt->pipe;
0652     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0653     struct device *dev = usbhs_priv_to_dev(priv);
0654     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
0655     void __iomem *addr = priv->base + fifo->port;
0656     u8 *buf;
0657     u32 data = 0;
0658     int maxp = usbhs_pipe_get_maxpacket(pipe);
0659     int rcv_len, len;
0660     int i, ret;
0661     int total_len = 0;
0662 
0663     ret = usbhsf_fifo_select(pipe, fifo, 0);
0664     if (ret < 0)
0665         return 0;
0666 
0667     ret = usbhsf_fifo_barrier(priv, fifo);
0668     if (ret < 0)
0669         goto usbhs_fifo_read_busy;
0670 
0671     rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
0672 
0673     buf     = pkt->buf    + pkt->actual;
0674     len     = pkt->length - pkt->actual;
0675     len     = min(len, rcv_len);
0676     total_len   = len;
0677 
0678     /*
0679      * update actual length first here to decide disable pipe.
0680      * if this pipe keeps BUF status and all data were popped,
0681      * then, next interrupt/token will be issued again
0682      */
0683     pkt->actual += total_len;
0684 
0685     if ((pkt->actual == pkt->length) || /* receive all data */
0686         (total_len < maxp)) {       /* short packet */
0687         *is_done = 1;
0688         usbhsf_rx_irq_ctrl(pipe, 0);
0689         usbhs_pipe_running(pipe, 0);
0690         /*
0691          * If function mode, since this controller is possible to enter
0692          * Control Write status stage at this timing, this driver
0693          * should not disable the pipe. If such a case happens, this
0694          * controller is not able to complete the status stage.
0695          */
0696         if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
0697             usbhs_pipe_disable(pipe);   /* disable pipe first */
0698     }
0699 
0700     /*
0701      * Buffer clear if Zero-Length packet
0702      *
0703      * see
0704      * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
0705      */
0706     if (0 == rcv_len) {
0707         pkt->zero = 1;
0708         usbhsf_fifo_clear(pipe, fifo);
0709         goto usbhs_fifo_read_end;
0710     }
0711 
0712     /*
0713      * FIXME
0714      *
0715      * 32-bit access only
0716      */
0717     if (len >= 4 && !((unsigned long)buf & 0x03)) {
0718         ioread32_rep(addr, buf, len / 4);
0719         len %= 4;
0720         buf += total_len - len;
0721     }
0722 
0723     /* the rest operation */
0724     for (i = 0; i < len; i++) {
0725         if (!(i & 0x03))
0726             data = ioread32(addr);
0727 
0728         buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
0729     }
0730 
0731 usbhs_fifo_read_end:
0732     dev_dbg(dev, "  recv %d (%d/ %d/ %d/ %d)\n",
0733         usbhs_pipe_number(pipe),
0734         pkt->length, pkt->actual, *is_done, pkt->zero);
0735 
0736 usbhs_fifo_read_busy:
0737     usbhsf_fifo_unselect(pipe, fifo);
0738 
0739     return ret;
0740 }
0741 
0742 const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
0743     .prepare = usbhsf_prepare_pop,
0744     .try_run = usbhsf_pio_try_pop,
0745 };
0746 
0747 /*
0748  *      DCP ctrol statge handler
0749  */
0750 static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
0751 {
0752     usbhs_dcp_control_transfer_done(pkt->pipe);
0753 
0754     *is_done = 1;
0755 
0756     return 0;
0757 }
0758 
0759 const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
0760     .prepare = usbhsf_ctrl_stage_end,
0761     .try_run = usbhsf_ctrl_stage_end,
0762 };
0763 
0764 /*
0765  *      DMA fifo functions
0766  */
0767 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
0768                         struct usbhs_pkt *pkt)
0769 {
0770     if (&usbhs_fifo_dma_push_handler == pkt->handler)
0771         return fifo->tx_chan;
0772 
0773     if (&usbhs_fifo_dma_pop_handler == pkt->handler)
0774         return fifo->rx_chan;
0775 
0776     return NULL;
0777 }
0778 
0779 static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
0780                           struct usbhs_pkt *pkt)
0781 {
0782     struct usbhs_fifo *fifo;
0783     int i;
0784 
0785     usbhs_for_each_dfifo(priv, fifo, i) {
0786         if (usbhsf_dma_chan_get(fifo, pkt) &&
0787             !usbhsf_fifo_is_busy(fifo))
0788             return fifo;
0789     }
0790 
0791     return NULL;
0792 }
0793 
0794 #define usbhsf_dma_start(p, f)  __usbhsf_dma_ctrl(p, f, DREQE)
0795 #define usbhsf_dma_stop(p, f)   __usbhsf_dma_ctrl(p, f, 0)
0796 static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
0797                   struct usbhs_fifo *fifo,
0798                   u16 dreqe)
0799 {
0800     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0801 
0802     usbhs_bset(priv, fifo->sel, DREQE, dreqe);
0803 }
0804 
0805 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
0806 {
0807     struct usbhs_pipe *pipe = pkt->pipe;
0808     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0809     struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
0810     struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
0811     struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
0812 
0813     return info->dma_map_ctrl(chan->device->dev, pkt, map);
0814 }
0815 
0816 static void usbhsf_dma_complete(void *arg,
0817                 const struct dmaengine_result *result);
0818 static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt)
0819 {
0820     struct usbhs_pipe *pipe = pkt->pipe;
0821     struct usbhs_fifo *fifo;
0822     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0823     struct dma_async_tx_descriptor *desc;
0824     struct dma_chan *chan;
0825     struct device *dev = usbhs_priv_to_dev(priv);
0826     enum dma_transfer_direction dir;
0827     dma_cookie_t cookie;
0828 
0829     fifo = usbhs_pipe_to_fifo(pipe);
0830     if (!fifo)
0831         return;
0832 
0833     chan = usbhsf_dma_chan_get(fifo, pkt);
0834     dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
0835 
0836     desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
0837                     pkt->trans, dir,
0838                     DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
0839     if (!desc)
0840         return;
0841 
0842     desc->callback_result   = usbhsf_dma_complete;
0843     desc->callback_param    = pkt;
0844 
0845     cookie = dmaengine_submit(desc);
0846     if (cookie < 0) {
0847         dev_err(dev, "Failed to submit dma descriptor\n");
0848         return;
0849     }
0850 
0851     dev_dbg(dev, "  %s %d (%d/ %d)\n",
0852         fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
0853 
0854     usbhs_pipe_running(pipe, 1);
0855     usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
0856     dma_async_issue_pending(chan);
0857     usbhsf_dma_start(pipe, fifo);
0858     usbhs_pipe_enable(pipe);
0859 }
0860 
0861 static void xfer_work(struct work_struct *work)
0862 {
0863     struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
0864     struct usbhs_pipe *pipe = pkt->pipe;
0865     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0866     unsigned long flags;
0867 
0868     usbhs_lock(priv, flags);
0869     usbhsf_dma_xfer_preparing(pkt);
0870     usbhs_unlock(priv, flags);
0871 }
0872 
0873 /*
0874  *      DMA push handler
0875  */
0876 static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
0877 {
0878     struct usbhs_pipe *pipe = pkt->pipe;
0879     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0880     struct usbhs_fifo *fifo;
0881     int len = pkt->length - pkt->actual;
0882     int ret;
0883     uintptr_t align_mask;
0884 
0885     if (usbhs_pipe_is_busy(pipe))
0886         return 0;
0887 
0888     /* use PIO if packet is less than pio_dma_border or pipe is DCP */
0889     if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
0890         usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
0891         goto usbhsf_pio_prepare_push;
0892 
0893     /* check data length if this driver don't use USB-DMAC */
0894     if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
0895         goto usbhsf_pio_prepare_push;
0896 
0897     /* check buffer alignment */
0898     align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
0899                     USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
0900     if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
0901         goto usbhsf_pio_prepare_push;
0902 
0903     /* return at this time if the pipe is running */
0904     if (usbhs_pipe_is_running(pipe))
0905         return 0;
0906 
0907     /* get enable DMA fifo */
0908     fifo = usbhsf_get_dma_fifo(priv, pkt);
0909     if (!fifo)
0910         goto usbhsf_pio_prepare_push;
0911 
0912     ret = usbhsf_fifo_select(pipe, fifo, 0);
0913     if (ret < 0)
0914         goto usbhsf_pio_prepare_push;
0915 
0916     if (usbhsf_dma_map(pkt) < 0)
0917         goto usbhsf_pio_prepare_push_unselect;
0918 
0919     pkt->trans = len;
0920 
0921     usbhsf_tx_irq_ctrl(pipe, 0);
0922     /* FIXME: Workaound for usb dmac that driver can be used in atomic */
0923     if (usbhs_get_dparam(priv, has_usb_dmac)) {
0924         usbhsf_dma_xfer_preparing(pkt);
0925     } else {
0926         INIT_WORK(&pkt->work, xfer_work);
0927         schedule_work(&pkt->work);
0928     }
0929 
0930     return 0;
0931 
0932 usbhsf_pio_prepare_push_unselect:
0933     usbhsf_fifo_unselect(pipe, fifo);
0934 usbhsf_pio_prepare_push:
0935     /*
0936      * change handler to PIO
0937      */
0938     pkt->handler = &usbhs_fifo_pio_push_handler;
0939 
0940     return pkt->handler->prepare(pkt, is_done);
0941 }
0942 
0943 static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
0944 {
0945     struct usbhs_pipe *pipe = pkt->pipe;
0946     int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
0947 
0948     pkt->actual += pkt->trans;
0949 
0950     if (pkt->actual < pkt->length)
0951         *is_done = 0;       /* there are remainder data */
0952     else if (is_short)
0953         *is_done = 1;       /* short packet */
0954     else
0955         *is_done = !pkt->zero;  /* send zero packet? */
0956 
0957     usbhs_pipe_running(pipe, !*is_done);
0958 
0959     usbhsf_dma_stop(pipe, pipe->fifo);
0960     usbhsf_dma_unmap(pkt);
0961     usbhsf_fifo_unselect(pipe, pipe->fifo);
0962 
0963     if (!*is_done) {
0964         /* change handler to PIO */
0965         pkt->handler = &usbhs_fifo_pio_push_handler;
0966         return pkt->handler->try_run(pkt, is_done);
0967     }
0968 
0969     return 0;
0970 }
0971 
0972 const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
0973     .prepare    = usbhsf_dma_prepare_push,
0974     .dma_done   = usbhsf_dma_push_done,
0975 };
0976 
0977 /*
0978  *      DMA pop handler
0979  */
0980 
0981 static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
0982                           int *is_done)
0983 {
0984     return usbhsf_prepare_pop(pkt, is_done);
0985 }
0986 
0987 static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
0988                         int *is_done)
0989 {
0990     struct usbhs_pipe *pipe = pkt->pipe;
0991     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
0992     struct usbhs_fifo *fifo;
0993     int ret;
0994 
0995     if (usbhs_pipe_is_busy(pipe))
0996         return 0;
0997 
0998     /* use PIO if packet is less than pio_dma_border or pipe is DCP */
0999     if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
1000         usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
1001         goto usbhsf_pio_prepare_pop;
1002 
1003     fifo = usbhsf_get_dma_fifo(priv, pkt);
1004     if (!fifo)
1005         goto usbhsf_pio_prepare_pop;
1006 
1007     if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
1008         goto usbhsf_pio_prepare_pop;
1009 
1010     /* return at this time if the pipe is running */
1011     if (usbhs_pipe_is_running(pipe))
1012         return 0;
1013 
1014     usbhs_pipe_config_change_bfre(pipe, 1);
1015 
1016     ret = usbhsf_fifo_select(pipe, fifo, 0);
1017     if (ret < 0)
1018         goto usbhsf_pio_prepare_pop;
1019 
1020     if (usbhsf_dma_map(pkt) < 0)
1021         goto usbhsf_pio_prepare_pop_unselect;
1022 
1023     /* DMA */
1024 
1025     /*
1026      * usbhs_fifo_dma_pop_handler :: prepare
1027      * enabled irq to come here.
1028      * but it is no longer needed for DMA. disable it.
1029      */
1030     usbhsf_rx_irq_ctrl(pipe, 0);
1031 
1032     pkt->trans = pkt->length;
1033 
1034     usbhsf_dma_xfer_preparing(pkt);
1035 
1036     return 0;
1037 
1038 usbhsf_pio_prepare_pop_unselect:
1039     usbhsf_fifo_unselect(pipe, fifo);
1040 usbhsf_pio_prepare_pop:
1041 
1042     /*
1043      * change handler to PIO
1044      */
1045     pkt->handler = &usbhs_fifo_pio_pop_handler;
1046     usbhs_pipe_config_change_bfre(pipe, 0);
1047 
1048     return pkt->handler->prepare(pkt, is_done);
1049 }
1050 
1051 static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1052 {
1053     struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1054 
1055     if (usbhs_get_dparam(priv, has_usb_dmac))
1056         return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1057     else
1058         return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1059 }
1060 
1061 static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1062 {
1063     struct usbhs_pipe *pipe = pkt->pipe;
1064     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1065     struct usbhs_fifo *fifo;
1066     int len, ret;
1067 
1068     if (usbhs_pipe_is_busy(pipe))
1069         return 0;
1070 
1071     if (usbhs_pipe_is_dcp(pipe))
1072         goto usbhsf_pio_prepare_pop;
1073 
1074     /* get enable DMA fifo */
1075     fifo = usbhsf_get_dma_fifo(priv, pkt);
1076     if (!fifo)
1077         goto usbhsf_pio_prepare_pop;
1078 
1079     if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
1080         goto usbhsf_pio_prepare_pop;
1081 
1082     ret = usbhsf_fifo_select(pipe, fifo, 0);
1083     if (ret < 0)
1084         goto usbhsf_pio_prepare_pop;
1085 
1086     /* use PIO if packet is less than pio_dma_border */
1087     len = usbhsf_fifo_rcv_len(priv, fifo);
1088     len = min(pkt->length - pkt->actual, len);
1089     if (len & 0x7) /* 8byte alignment */
1090         goto usbhsf_pio_prepare_pop_unselect;
1091 
1092     if (len < usbhs_get_dparam(priv, pio_dma_border))
1093         goto usbhsf_pio_prepare_pop_unselect;
1094 
1095     ret = usbhsf_fifo_barrier(priv, fifo);
1096     if (ret < 0)
1097         goto usbhsf_pio_prepare_pop_unselect;
1098 
1099     if (usbhsf_dma_map(pkt) < 0)
1100         goto usbhsf_pio_prepare_pop_unselect;
1101 
1102     /* DMA */
1103 
1104     /*
1105      * usbhs_fifo_dma_pop_handler :: prepare
1106      * enabled irq to come here.
1107      * but it is no longer needed for DMA. disable it.
1108      */
1109     usbhsf_rx_irq_ctrl(pipe, 0);
1110 
1111     pkt->trans = len;
1112 
1113     INIT_WORK(&pkt->work, xfer_work);
1114     schedule_work(&pkt->work);
1115 
1116     return 0;
1117 
1118 usbhsf_pio_prepare_pop_unselect:
1119     usbhsf_fifo_unselect(pipe, fifo);
1120 usbhsf_pio_prepare_pop:
1121 
1122     /*
1123      * change handler to PIO
1124      */
1125     pkt->handler = &usbhs_fifo_pio_pop_handler;
1126 
1127     return pkt->handler->try_run(pkt, is_done);
1128 }
1129 
1130 static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1131 {
1132     struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1133 
1134     BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1135 
1136     return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1137 }
1138 
1139 static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1140 {
1141     struct usbhs_pipe *pipe = pkt->pipe;
1142     int maxp = usbhs_pipe_get_maxpacket(pipe);
1143 
1144     usbhsf_dma_stop(pipe, pipe->fifo);
1145     usbhsf_dma_unmap(pkt);
1146     usbhsf_fifo_unselect(pipe, pipe->fifo);
1147 
1148     pkt->actual += pkt->trans;
1149 
1150     if ((pkt->actual == pkt->length) || /* receive all data */
1151         (pkt->trans < maxp)) {      /* short packet */
1152         *is_done = 1;
1153         usbhs_pipe_running(pipe, 0);
1154     } else {
1155         /* re-enable */
1156         usbhs_pipe_running(pipe, 0);
1157         usbhsf_prepare_pop(pkt, is_done);
1158     }
1159 
1160     return 0;
1161 }
1162 
1163 static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1164                        struct dma_chan *chan, int dtln)
1165 {
1166     struct usbhs_pipe *pipe = pkt->pipe;
1167     size_t received_size;
1168     int maxp = usbhs_pipe_get_maxpacket(pipe);
1169 
1170     received_size = pkt->length - pkt->dma_result->residue;
1171 
1172     if (dtln) {
1173         received_size -= USBHS_USB_DMAC_XFER_SIZE;
1174         received_size &= ~(maxp - 1);
1175         received_size += dtln;
1176     }
1177 
1178     return received_size;
1179 }
1180 
1181 static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1182                          int *is_done)
1183 {
1184     struct usbhs_pipe *pipe = pkt->pipe;
1185     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1186     struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1187     struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1188     int rcv_len;
1189 
1190     /*
1191      * Since the driver disables rx_irq in DMA mode, the interrupt handler
1192      * cannot the BRDYSTS. So, the function clears it here because the
1193      * driver may use PIO mode next time.
1194      */
1195     usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1196 
1197     rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1198     usbhsf_fifo_clear(pipe, fifo);
1199     pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1200 
1201     usbhs_pipe_running(pipe, 0);
1202     usbhsf_dma_stop(pipe, fifo);
1203     usbhsf_dma_unmap(pkt);
1204     usbhsf_fifo_unselect(pipe, pipe->fifo);
1205 
1206     /* The driver can assume the rx transaction is always "done" */
1207     *is_done = 1;
1208 
1209     return 0;
1210 }
1211 
1212 static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1213 {
1214     struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1215 
1216     if (usbhs_get_dparam(priv, has_usb_dmac))
1217         return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1218     else
1219         return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1220 }
1221 
1222 const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
1223     .prepare    = usbhsf_dma_prepare_pop,
1224     .try_run    = usbhsf_dma_try_pop,
1225     .dma_done   = usbhsf_dma_pop_done
1226 };
1227 
1228 /*
1229  *      DMA setting
1230  */
1231 static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1232 {
1233     struct sh_dmae_slave *slave = param;
1234 
1235     /*
1236      * FIXME
1237      *
1238      * usbhs doesn't recognize id = 0 as valid DMA
1239      */
1240     if (0 == slave->shdma_slave.slave_id)
1241         return false;
1242 
1243     chan->private = slave;
1244 
1245     return true;
1246 }
1247 
1248 static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1249 {
1250     if (fifo->tx_chan)
1251         dma_release_channel(fifo->tx_chan);
1252     if (fifo->rx_chan)
1253         dma_release_channel(fifo->rx_chan);
1254 
1255     fifo->tx_chan = NULL;
1256     fifo->rx_chan = NULL;
1257 }
1258 
1259 static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
1260 {
1261     dma_cap_mask_t mask;
1262 
1263     dma_cap_zero(mask);
1264     dma_cap_set(DMA_SLAVE, mask);
1265     fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1266                         &fifo->tx_slave);
1267 
1268     dma_cap_zero(mask);
1269     dma_cap_set(DMA_SLAVE, mask);
1270     fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1271                         &fifo->rx_slave);
1272 }
1273 
1274 static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1275                    int channel)
1276 {
1277     char name[16];
1278 
1279     /*
1280      * To avoid complex handing for DnFIFOs, the driver uses each
1281      * DnFIFO as TX or RX direction (not bi-direction).
1282      * So, the driver uses odd channels for TX, even channels for RX.
1283      */
1284     snprintf(name, sizeof(name), "ch%d", channel);
1285     if (channel & 1) {
1286         fifo->tx_chan = dma_request_chan(dev, name);
1287         if (IS_ERR(fifo->tx_chan))
1288             fifo->tx_chan = NULL;
1289     } else {
1290         fifo->rx_chan = dma_request_chan(dev, name);
1291         if (IS_ERR(fifo->rx_chan))
1292             fifo->rx_chan = NULL;
1293     }
1294 }
1295 
1296 static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1297                 int channel)
1298 {
1299     struct device *dev = usbhs_priv_to_dev(priv);
1300 
1301     if (dev_of_node(dev))
1302         usbhsf_dma_init_dt(dev, fifo, channel);
1303     else
1304         usbhsf_dma_init_pdev(fifo);
1305 
1306     if (fifo->tx_chan || fifo->rx_chan)
1307         dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
1308              fifo->name,
1309              fifo->tx_chan ? "[TX]" : "    ",
1310              fifo->rx_chan ? "[RX]" : "    ");
1311 }
1312 
1313 /*
1314  *      irq functions
1315  */
1316 static int usbhsf_irq_empty(struct usbhs_priv *priv,
1317                 struct usbhs_irq_state *irq_state)
1318 {
1319     struct usbhs_pipe *pipe;
1320     struct device *dev = usbhs_priv_to_dev(priv);
1321     int i, ret;
1322 
1323     if (!irq_state->bempsts) {
1324         dev_err(dev, "debug %s !!\n", __func__);
1325         return -EIO;
1326     }
1327 
1328     dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1329 
1330     /*
1331      * search interrupted "pipe"
1332      * not "uep".
1333      */
1334     usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1335         if (!(irq_state->bempsts & (1 << i)))
1336             continue;
1337 
1338         ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1339         if (ret < 0)
1340             dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1341     }
1342 
1343     return 0;
1344 }
1345 
1346 static int usbhsf_irq_ready(struct usbhs_priv *priv,
1347                 struct usbhs_irq_state *irq_state)
1348 {
1349     struct usbhs_pipe *pipe;
1350     struct device *dev = usbhs_priv_to_dev(priv);
1351     int i, ret;
1352 
1353     if (!irq_state->brdysts) {
1354         dev_err(dev, "debug %s !!\n", __func__);
1355         return -EIO;
1356     }
1357 
1358     dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1359 
1360     /*
1361      * search interrupted "pipe"
1362      * not "uep".
1363      */
1364     usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1365         if (!(irq_state->brdysts & (1 << i)))
1366             continue;
1367 
1368         ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1369         if (ret < 0)
1370             dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1371     }
1372 
1373     return 0;
1374 }
1375 
1376 static void usbhsf_dma_complete(void *arg,
1377                 const struct dmaengine_result *result)
1378 {
1379     struct usbhs_pkt *pkt = arg;
1380     struct usbhs_pipe *pipe = pkt->pipe;
1381     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1382     struct device *dev = usbhs_priv_to_dev(priv);
1383     int ret;
1384 
1385     pkt->dma_result = result;
1386     ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
1387     if (ret < 0)
1388         dev_err(dev, "dma_complete run_error %d : %d\n",
1389             usbhs_pipe_number(pipe), ret);
1390 }
1391 
1392 void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1393 {
1394     struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1395     struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1396 
1397     /* clear DCP FIFO of transmission */
1398     if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1399         return;
1400     usbhsf_fifo_clear(pipe, fifo);
1401     usbhsf_fifo_unselect(pipe, fifo);
1402 
1403     /* clear DCP FIFO of reception */
1404     if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1405         return;
1406     usbhsf_fifo_clear(pipe, fifo);
1407     usbhsf_fifo_unselect(pipe, fifo);
1408 }
1409 
1410 /*
1411  *      fifo init
1412  */
1413 void usbhs_fifo_init(struct usbhs_priv *priv)
1414 {
1415     struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1416     struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
1417     struct usbhs_fifo *dfifo;
1418     int i;
1419 
1420     mod->irq_empty      = usbhsf_irq_empty;
1421     mod->irq_ready      = usbhsf_irq_ready;
1422     mod->irq_bempsts    = 0;
1423     mod->irq_brdysts    = 0;
1424 
1425     cfifo->pipe = NULL;
1426     usbhs_for_each_dfifo(priv, dfifo, i)
1427         dfifo->pipe = NULL;
1428 }
1429 
1430 void usbhs_fifo_quit(struct usbhs_priv *priv)
1431 {
1432     struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1433 
1434     mod->irq_empty      = NULL;
1435     mod->irq_ready      = NULL;
1436     mod->irq_bempsts    = 0;
1437     mod->irq_brdysts    = 0;
1438 }
1439 
1440 #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port)      \
1441 do {                                    \
1442     fifo = usbhsf_get_dnfifo(priv, channel);            \
1443     fifo->name  = "D"#channel"FIFO";                \
1444     fifo->port  = fifo_port;                    \
1445     fifo->sel   = D##channel##FIFOSEL;              \
1446     fifo->ctr   = D##channel##FIFOCTR;              \
1447     fifo->tx_slave.shdma_slave.slave_id =               \
1448             usbhs_get_dparam(priv, d##channel##_tx_id); \
1449     fifo->rx_slave.shdma_slave.slave_id =               \
1450             usbhs_get_dparam(priv, d##channel##_rx_id); \
1451     usbhsf_dma_init(priv, fifo, channel);               \
1452 } while (0)
1453 
1454 #define USBHS_DFIFO_INIT(priv, fifo, channel)               \
1455         __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1456 #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel)           \
1457         __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1458 
1459 int usbhs_fifo_probe(struct usbhs_priv *priv)
1460 {
1461     struct usbhs_fifo *fifo;
1462 
1463     /* CFIFO */
1464     fifo = usbhsf_get_cfifo(priv);
1465     fifo->name  = "CFIFO";
1466     fifo->port  = CFIFO;
1467     fifo->sel   = CFIFOSEL;
1468     fifo->ctr   = CFIFOCTR;
1469 
1470     /* DFIFO */
1471     USBHS_DFIFO_INIT(priv, fifo, 0);
1472     USBHS_DFIFO_INIT(priv, fifo, 1);
1473     USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1474     USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
1475 
1476     return 0;
1477 }
1478 
1479 void usbhs_fifo_remove(struct usbhs_priv *priv)
1480 {
1481     struct usbhs_fifo *fifo;
1482     int i;
1483 
1484     usbhs_for_each_dfifo(priv, fifo, i)
1485         usbhsf_dma_quit(priv, fifo);
1486 }