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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
0004  * Author: Chao Xie <chao.xie@marvell.com>
0005  *     Neil Zhang <zhangwm@marvell.com>
0006  */
0007 
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/io.h>
0011 #include <linux/iopoll.h>
0012 #include <linux/uaccess.h>
0013 #include <linux/device.h>
0014 #include <linux/proc_fs.h>
0015 #include <linux/clk.h>
0016 #include <linux/workqueue.h>
0017 #include <linux/platform_device.h>
0018 
0019 #include <linux/usb.h>
0020 #include <linux/usb/ch9.h>
0021 #include <linux/usb/otg.h>
0022 #include <linux/usb/gadget.h>
0023 #include <linux/usb/hcd.h>
0024 #include <linux/platform_data/mv_usb.h>
0025 
0026 #include "phy-mv-usb.h"
0027 
0028 #define DRIVER_DESC "Marvell USB OTG transceiver driver"
0029 
0030 MODULE_DESCRIPTION(DRIVER_DESC);
0031 MODULE_LICENSE("GPL");
0032 
0033 static const char driver_name[] = "mv-otg";
0034 
0035 static char *state_string[] = {
0036     "undefined",
0037     "b_idle",
0038     "b_srp_init",
0039     "b_peripheral",
0040     "b_wait_acon",
0041     "b_host",
0042     "a_idle",
0043     "a_wait_vrise",
0044     "a_wait_bcon",
0045     "a_host",
0046     "a_suspend",
0047     "a_peripheral",
0048     "a_wait_vfall",
0049     "a_vbus_err"
0050 };
0051 
0052 static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
0053 {
0054     struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy);
0055     if (mvotg->pdata->set_vbus == NULL)
0056         return -ENODEV;
0057 
0058     return mvotg->pdata->set_vbus(on);
0059 }
0060 
0061 static int mv_otg_set_host(struct usb_otg *otg,
0062                struct usb_bus *host)
0063 {
0064     otg->host = host;
0065 
0066     return 0;
0067 }
0068 
0069 static int mv_otg_set_peripheral(struct usb_otg *otg,
0070                  struct usb_gadget *gadget)
0071 {
0072     otg->gadget = gadget;
0073 
0074     return 0;
0075 }
0076 
0077 static void mv_otg_run_state_machine(struct mv_otg *mvotg,
0078                      unsigned long delay)
0079 {
0080     dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
0081     if (!mvotg->qwork)
0082         return;
0083 
0084     queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
0085 }
0086 
0087 static void mv_otg_timer_await_bcon(struct timer_list *t)
0088 {
0089     struct mv_otg *mvotg = from_timer(mvotg, t,
0090                       otg_ctrl.timer[A_WAIT_BCON_TIMER]);
0091 
0092     mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
0093 
0094     dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
0095 
0096     if (spin_trylock(&mvotg->wq_lock)) {
0097         mv_otg_run_state_machine(mvotg, 0);
0098         spin_unlock(&mvotg->wq_lock);
0099     }
0100 }
0101 
0102 static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
0103 {
0104     struct timer_list *timer;
0105 
0106     if (id >= OTG_TIMER_NUM)
0107         return -EINVAL;
0108 
0109     timer = &mvotg->otg_ctrl.timer[id];
0110 
0111     if (timer_pending(timer))
0112         del_timer(timer);
0113 
0114     return 0;
0115 }
0116 
0117 static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
0118                 unsigned long interval)
0119 {
0120     struct timer_list *timer;
0121 
0122     if (id >= OTG_TIMER_NUM)
0123         return -EINVAL;
0124 
0125     timer = &mvotg->otg_ctrl.timer[id];
0126     if (timer_pending(timer)) {
0127         dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
0128         return -EBUSY;
0129     }
0130 
0131     timer->expires = jiffies + interval;
0132     add_timer(timer);
0133 
0134     return 0;
0135 }
0136 
0137 static int mv_otg_reset(struct mv_otg *mvotg)
0138 {
0139     u32 tmp;
0140     int ret;
0141 
0142     /* Stop the controller */
0143     tmp = readl(&mvotg->op_regs->usbcmd);
0144     tmp &= ~USBCMD_RUN_STOP;
0145     writel(tmp, &mvotg->op_regs->usbcmd);
0146 
0147     /* Reset the controller to get default values */
0148     writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
0149 
0150     ret = readl_poll_timeout_atomic(&mvotg->op_regs->usbcmd, tmp,
0151                 (tmp & USBCMD_CTRL_RESET), 10, 10000);
0152     if (ret < 0) {
0153         dev_err(&mvotg->pdev->dev,
0154             "Wait for RESET completed TIMEOUT\n");
0155         return ret;
0156     }
0157 
0158     writel(0x0, &mvotg->op_regs->usbintr);
0159     tmp = readl(&mvotg->op_regs->usbsts);
0160     writel(tmp, &mvotg->op_regs->usbsts);
0161 
0162     return 0;
0163 }
0164 
0165 static void mv_otg_init_irq(struct mv_otg *mvotg)
0166 {
0167     u32 otgsc;
0168 
0169     mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
0170         | OTGSC_INTR_A_VBUS_VALID;
0171     mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
0172         | OTGSC_INTSTS_A_VBUS_VALID;
0173 
0174     if (mvotg->pdata->vbus == NULL) {
0175         mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
0176             | OTGSC_INTR_B_SESSION_END;
0177         mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
0178             | OTGSC_INTSTS_B_SESSION_END;
0179     }
0180 
0181     if (mvotg->pdata->id == NULL) {
0182         mvotg->irq_en |= OTGSC_INTR_USB_ID;
0183         mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
0184     }
0185 
0186     otgsc = readl(&mvotg->op_regs->otgsc);
0187     otgsc |= mvotg->irq_en;
0188     writel(otgsc, &mvotg->op_regs->otgsc);
0189 }
0190 
0191 static void mv_otg_start_host(struct mv_otg *mvotg, int on)
0192 {
0193 #ifdef CONFIG_USB
0194     struct usb_otg *otg = mvotg->phy.otg;
0195     struct usb_hcd *hcd;
0196 
0197     if (!otg->host)
0198         return;
0199 
0200     dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
0201 
0202     hcd = bus_to_hcd(otg->host);
0203 
0204     if (on) {
0205         usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
0206         device_wakeup_enable(hcd->self.controller);
0207     } else {
0208         usb_remove_hcd(hcd);
0209     }
0210 #endif /* CONFIG_USB */
0211 }
0212 
0213 static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
0214 {
0215     struct usb_otg *otg = mvotg->phy.otg;
0216 
0217     if (!otg->gadget)
0218         return;
0219 
0220     dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
0221 
0222     if (on)
0223         usb_gadget_vbus_connect(otg->gadget);
0224     else
0225         usb_gadget_vbus_disconnect(otg->gadget);
0226 }
0227 
0228 static void otg_clock_enable(struct mv_otg *mvotg)
0229 {
0230     clk_prepare_enable(mvotg->clk);
0231 }
0232 
0233 static void otg_clock_disable(struct mv_otg *mvotg)
0234 {
0235     clk_disable_unprepare(mvotg->clk);
0236 }
0237 
0238 static int mv_otg_enable_internal(struct mv_otg *mvotg)
0239 {
0240     int retval = 0;
0241 
0242     if (mvotg->active)
0243         return 0;
0244 
0245     dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
0246 
0247     otg_clock_enable(mvotg);
0248     if (mvotg->pdata->phy_init) {
0249         retval = mvotg->pdata->phy_init(mvotg->phy_regs);
0250         if (retval) {
0251             dev_err(&mvotg->pdev->dev,
0252                 "init phy error %d\n", retval);
0253             otg_clock_disable(mvotg);
0254             return retval;
0255         }
0256     }
0257     mvotg->active = 1;
0258 
0259     return 0;
0260 
0261 }
0262 
0263 static int mv_otg_enable(struct mv_otg *mvotg)
0264 {
0265     if (mvotg->clock_gating)
0266         return mv_otg_enable_internal(mvotg);
0267 
0268     return 0;
0269 }
0270 
0271 static void mv_otg_disable_internal(struct mv_otg *mvotg)
0272 {
0273     if (mvotg->active) {
0274         dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
0275         if (mvotg->pdata->phy_deinit)
0276             mvotg->pdata->phy_deinit(mvotg->phy_regs);
0277         otg_clock_disable(mvotg);
0278         mvotg->active = 0;
0279     }
0280 }
0281 
0282 static void mv_otg_disable(struct mv_otg *mvotg)
0283 {
0284     if (mvotg->clock_gating)
0285         mv_otg_disable_internal(mvotg);
0286 }
0287 
0288 static void mv_otg_update_inputs(struct mv_otg *mvotg)
0289 {
0290     struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
0291     u32 otgsc;
0292 
0293     otgsc = readl(&mvotg->op_regs->otgsc);
0294 
0295     if (mvotg->pdata->vbus) {
0296         if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
0297             otg_ctrl->b_sess_vld = 1;
0298             otg_ctrl->b_sess_end = 0;
0299         } else {
0300             otg_ctrl->b_sess_vld = 0;
0301             otg_ctrl->b_sess_end = 1;
0302         }
0303     } else {
0304         otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
0305         otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
0306     }
0307 
0308     if (mvotg->pdata->id)
0309         otg_ctrl->id = !!mvotg->pdata->id->poll();
0310     else
0311         otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
0312 
0313     if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
0314         otg_ctrl->a_bus_req = 1;
0315 
0316     otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
0317     otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
0318 
0319     dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
0320     dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
0321     dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
0322     dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
0323     dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
0324     dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
0325 }
0326 
0327 static void mv_otg_update_state(struct mv_otg *mvotg)
0328 {
0329     struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
0330     int old_state = mvotg->phy.otg->state;
0331 
0332     switch (old_state) {
0333     case OTG_STATE_UNDEFINED:
0334         mvotg->phy.otg->state = OTG_STATE_B_IDLE;
0335         fallthrough;
0336     case OTG_STATE_B_IDLE:
0337         if (otg_ctrl->id == 0)
0338             mvotg->phy.otg->state = OTG_STATE_A_IDLE;
0339         else if (otg_ctrl->b_sess_vld)
0340             mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL;
0341         break;
0342     case OTG_STATE_B_PERIPHERAL:
0343         if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
0344             mvotg->phy.otg->state = OTG_STATE_B_IDLE;
0345         break;
0346     case OTG_STATE_A_IDLE:
0347         if (otg_ctrl->id)
0348             mvotg->phy.otg->state = OTG_STATE_B_IDLE;
0349         else if (!(otg_ctrl->a_bus_drop) &&
0350              (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
0351             mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
0352         break;
0353     case OTG_STATE_A_WAIT_VRISE:
0354         if (otg_ctrl->a_vbus_vld)
0355             mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
0356         break;
0357     case OTG_STATE_A_WAIT_BCON:
0358         if (otg_ctrl->id || otg_ctrl->a_bus_drop
0359             || otg_ctrl->a_wait_bcon_timeout) {
0360             mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
0361             mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
0362             mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
0363             otg_ctrl->a_bus_req = 0;
0364         } else if (!otg_ctrl->a_vbus_vld) {
0365             mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
0366             mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
0367             mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
0368         } else if (otg_ctrl->b_conn) {
0369             mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
0370             mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
0371             mvotg->phy.otg->state = OTG_STATE_A_HOST;
0372         }
0373         break;
0374     case OTG_STATE_A_HOST:
0375         if (otg_ctrl->id || !otg_ctrl->b_conn
0376             || otg_ctrl->a_bus_drop)
0377             mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
0378         else if (!otg_ctrl->a_vbus_vld)
0379             mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
0380         break;
0381     case OTG_STATE_A_WAIT_VFALL:
0382         if (otg_ctrl->id
0383             || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
0384             || otg_ctrl->a_bus_req)
0385             mvotg->phy.otg->state = OTG_STATE_A_IDLE;
0386         break;
0387     case OTG_STATE_A_VBUS_ERR:
0388         if (otg_ctrl->id || otg_ctrl->a_clr_err
0389             || otg_ctrl->a_bus_drop) {
0390             otg_ctrl->a_clr_err = 0;
0391             mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
0392         }
0393         break;
0394     default:
0395         break;
0396     }
0397 }
0398 
0399 static void mv_otg_work(struct work_struct *work)
0400 {
0401     struct mv_otg *mvotg;
0402     struct usb_otg *otg;
0403     int old_state;
0404 
0405     mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
0406 
0407 run:
0408     /* work queue is single thread, or we need spin_lock to protect */
0409     otg = mvotg->phy.otg;
0410     old_state = otg->state;
0411 
0412     if (!mvotg->active)
0413         return;
0414 
0415     mv_otg_update_inputs(mvotg);
0416     mv_otg_update_state(mvotg);
0417 
0418     if (old_state != mvotg->phy.otg->state) {
0419         dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
0420              state_string[old_state],
0421              state_string[mvotg->phy.otg->state]);
0422 
0423         switch (mvotg->phy.otg->state) {
0424         case OTG_STATE_B_IDLE:
0425             otg->default_a = 0;
0426             if (old_state == OTG_STATE_B_PERIPHERAL)
0427                 mv_otg_start_periphrals(mvotg, 0);
0428             mv_otg_reset(mvotg);
0429             mv_otg_disable(mvotg);
0430             usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE);
0431             break;
0432         case OTG_STATE_B_PERIPHERAL:
0433             mv_otg_enable(mvotg);
0434             mv_otg_start_periphrals(mvotg, 1);
0435             usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED);
0436             break;
0437         case OTG_STATE_A_IDLE:
0438             otg->default_a = 1;
0439             mv_otg_enable(mvotg);
0440             if (old_state == OTG_STATE_A_WAIT_VFALL)
0441                 mv_otg_start_host(mvotg, 0);
0442             mv_otg_reset(mvotg);
0443             break;
0444         case OTG_STATE_A_WAIT_VRISE:
0445             mv_otg_set_vbus(otg, 1);
0446             break;
0447         case OTG_STATE_A_WAIT_BCON:
0448             if (old_state != OTG_STATE_A_HOST)
0449                 mv_otg_start_host(mvotg, 1);
0450             mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
0451                      T_A_WAIT_BCON);
0452             /*
0453              * Now, we directly enter A_HOST. So set b_conn = 1
0454              * here. In fact, it need host driver to notify us.
0455              */
0456             mvotg->otg_ctrl.b_conn = 1;
0457             break;
0458         case OTG_STATE_A_HOST:
0459             break;
0460         case OTG_STATE_A_WAIT_VFALL:
0461             /*
0462              * Now, we has exited A_HOST. So set b_conn = 0
0463              * here. In fact, it need host driver to notify us.
0464              */
0465             mvotg->otg_ctrl.b_conn = 0;
0466             mv_otg_set_vbus(otg, 0);
0467             break;
0468         case OTG_STATE_A_VBUS_ERR:
0469             break;
0470         default:
0471             break;
0472         }
0473         goto run;
0474     }
0475 }
0476 
0477 static irqreturn_t mv_otg_irq(int irq, void *dev)
0478 {
0479     struct mv_otg *mvotg = dev;
0480     u32 otgsc;
0481 
0482     otgsc = readl(&mvotg->op_regs->otgsc);
0483     writel(otgsc, &mvotg->op_regs->otgsc);
0484 
0485     /*
0486      * if we have vbus, then the vbus detection for B-device
0487      * will be done by mv_otg_inputs_irq().
0488      */
0489     if (mvotg->pdata->vbus)
0490         if ((otgsc & OTGSC_STS_USB_ID) &&
0491             !(otgsc & OTGSC_INTSTS_USB_ID))
0492             return IRQ_NONE;
0493 
0494     if ((otgsc & mvotg->irq_status) == 0)
0495         return IRQ_NONE;
0496 
0497     mv_otg_run_state_machine(mvotg, 0);
0498 
0499     return IRQ_HANDLED;
0500 }
0501 
0502 static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
0503 {
0504     struct mv_otg *mvotg = dev;
0505 
0506     /* The clock may disabled at this time */
0507     if (!mvotg->active) {
0508         mv_otg_enable(mvotg);
0509         mv_otg_init_irq(mvotg);
0510     }
0511 
0512     mv_otg_run_state_machine(mvotg, 0);
0513 
0514     return IRQ_HANDLED;
0515 }
0516 
0517 static ssize_t
0518 a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
0519 {
0520     struct mv_otg *mvotg = dev_get_drvdata(dev);
0521     return scnprintf(buf, PAGE_SIZE, "%d\n",
0522              mvotg->otg_ctrl.a_bus_req);
0523 }
0524 
0525 static ssize_t
0526 a_bus_req_store(struct device *dev, struct device_attribute *attr,
0527           const char *buf, size_t count)
0528 {
0529     struct mv_otg *mvotg = dev_get_drvdata(dev);
0530 
0531     if (count > 2)
0532         return -1;
0533 
0534     /* We will use this interface to change to A device */
0535     if (mvotg->phy.otg->state != OTG_STATE_B_IDLE
0536         && mvotg->phy.otg->state != OTG_STATE_A_IDLE)
0537         return -1;
0538 
0539     /* The clock may disabled and we need to set irq for ID detected */
0540     mv_otg_enable(mvotg);
0541     mv_otg_init_irq(mvotg);
0542 
0543     if (buf[0] == '1') {
0544         mvotg->otg_ctrl.a_bus_req = 1;
0545         mvotg->otg_ctrl.a_bus_drop = 0;
0546         dev_dbg(&mvotg->pdev->dev,
0547             "User request: a_bus_req = 1\n");
0548 
0549         if (spin_trylock(&mvotg->wq_lock)) {
0550             mv_otg_run_state_machine(mvotg, 0);
0551             spin_unlock(&mvotg->wq_lock);
0552         }
0553     }
0554 
0555     return count;
0556 }
0557 
0558 static DEVICE_ATTR_RW(a_bus_req);
0559 
0560 static ssize_t
0561 a_clr_err_store(struct device *dev, struct device_attribute *attr,
0562           const char *buf, size_t count)
0563 {
0564     struct mv_otg *mvotg = dev_get_drvdata(dev);
0565     if (!mvotg->phy.otg->default_a)
0566         return -1;
0567 
0568     if (count > 2)
0569         return -1;
0570 
0571     if (buf[0] == '1') {
0572         mvotg->otg_ctrl.a_clr_err = 1;
0573         dev_dbg(&mvotg->pdev->dev,
0574             "User request: a_clr_err = 1\n");
0575     }
0576 
0577     if (spin_trylock(&mvotg->wq_lock)) {
0578         mv_otg_run_state_machine(mvotg, 0);
0579         spin_unlock(&mvotg->wq_lock);
0580     }
0581 
0582     return count;
0583 }
0584 
0585 static DEVICE_ATTR_WO(a_clr_err);
0586 
0587 static ssize_t
0588 a_bus_drop_show(struct device *dev, struct device_attribute *attr,
0589            char *buf)
0590 {
0591     struct mv_otg *mvotg = dev_get_drvdata(dev);
0592     return scnprintf(buf, PAGE_SIZE, "%d\n",
0593              mvotg->otg_ctrl.a_bus_drop);
0594 }
0595 
0596 static ssize_t
0597 a_bus_drop_store(struct device *dev, struct device_attribute *attr,
0598            const char *buf, size_t count)
0599 {
0600     struct mv_otg *mvotg = dev_get_drvdata(dev);
0601     if (!mvotg->phy.otg->default_a)
0602         return -1;
0603 
0604     if (count > 2)
0605         return -1;
0606 
0607     if (buf[0] == '0') {
0608         mvotg->otg_ctrl.a_bus_drop = 0;
0609         dev_dbg(&mvotg->pdev->dev,
0610             "User request: a_bus_drop = 0\n");
0611     } else if (buf[0] == '1') {
0612         mvotg->otg_ctrl.a_bus_drop = 1;
0613         mvotg->otg_ctrl.a_bus_req = 0;
0614         dev_dbg(&mvotg->pdev->dev,
0615             "User request: a_bus_drop = 1\n");
0616         dev_dbg(&mvotg->pdev->dev,
0617             "User request: and a_bus_req = 0\n");
0618     }
0619 
0620     if (spin_trylock(&mvotg->wq_lock)) {
0621         mv_otg_run_state_machine(mvotg, 0);
0622         spin_unlock(&mvotg->wq_lock);
0623     }
0624 
0625     return count;
0626 }
0627 
0628 static DEVICE_ATTR_RW(a_bus_drop);
0629 
0630 static struct attribute *inputs_attrs[] = {
0631     &dev_attr_a_bus_req.attr,
0632     &dev_attr_a_clr_err.attr,
0633     &dev_attr_a_bus_drop.attr,
0634     NULL,
0635 };
0636 
0637 static const struct attribute_group inputs_attr_group = {
0638     .name = "inputs",
0639     .attrs = inputs_attrs,
0640 };
0641 
0642 static const struct attribute_group *mv_otg_groups[] = {
0643     &inputs_attr_group,
0644     NULL,
0645 };
0646 
0647 static int mv_otg_remove(struct platform_device *pdev)
0648 {
0649     struct mv_otg *mvotg = platform_get_drvdata(pdev);
0650 
0651     if (mvotg->qwork)
0652         destroy_workqueue(mvotg->qwork);
0653 
0654     mv_otg_disable(mvotg);
0655 
0656     usb_remove_phy(&mvotg->phy);
0657 
0658     return 0;
0659 }
0660 
0661 static int mv_otg_probe(struct platform_device *pdev)
0662 {
0663     struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
0664     struct mv_otg *mvotg;
0665     struct usb_otg *otg;
0666     struct resource *r;
0667     int retval = 0, i;
0668 
0669     if (pdata == NULL) {
0670         dev_err(&pdev->dev, "failed to get platform data\n");
0671         return -ENODEV;
0672     }
0673 
0674     mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
0675     if (!mvotg)
0676         return -ENOMEM;
0677 
0678     otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
0679     if (!otg)
0680         return -ENOMEM;
0681 
0682     platform_set_drvdata(pdev, mvotg);
0683 
0684     mvotg->pdev = pdev;
0685     mvotg->pdata = pdata;
0686 
0687     mvotg->clk = devm_clk_get(&pdev->dev, NULL);
0688     if (IS_ERR(mvotg->clk))
0689         return PTR_ERR(mvotg->clk);
0690 
0691     mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
0692     if (!mvotg->qwork) {
0693         dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
0694         return -ENOMEM;
0695     }
0696 
0697     INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
0698 
0699     /* OTG common part */
0700     mvotg->pdev = pdev;
0701     mvotg->phy.dev = &pdev->dev;
0702     mvotg->phy.otg = otg;
0703     mvotg->phy.label = driver_name;
0704 
0705     otg->state = OTG_STATE_UNDEFINED;
0706     otg->usb_phy = &mvotg->phy;
0707     otg->set_host = mv_otg_set_host;
0708     otg->set_peripheral = mv_otg_set_peripheral;
0709     otg->set_vbus = mv_otg_set_vbus;
0710 
0711     for (i = 0; i < OTG_TIMER_NUM; i++)
0712         timer_setup(&mvotg->otg_ctrl.timer[i],
0713                 mv_otg_timer_await_bcon, 0);
0714 
0715     r = platform_get_resource_byname(mvotg->pdev,
0716                      IORESOURCE_MEM, "phyregs");
0717     if (r == NULL) {
0718         dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
0719         retval = -ENODEV;
0720         goto err_destroy_workqueue;
0721     }
0722 
0723     mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
0724     if (mvotg->phy_regs == NULL) {
0725         dev_err(&pdev->dev, "failed to map phy I/O memory\n");
0726         retval = -EFAULT;
0727         goto err_destroy_workqueue;
0728     }
0729 
0730     r = platform_get_resource_byname(mvotg->pdev,
0731                      IORESOURCE_MEM, "capregs");
0732     if (r == NULL) {
0733         dev_err(&pdev->dev, "no I/O memory resource defined\n");
0734         retval = -ENODEV;
0735         goto err_destroy_workqueue;
0736     }
0737 
0738     mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
0739     if (mvotg->cap_regs == NULL) {
0740         dev_err(&pdev->dev, "failed to map I/O memory\n");
0741         retval = -EFAULT;
0742         goto err_destroy_workqueue;
0743     }
0744 
0745     /* we will acces controller register, so enable the udc controller */
0746     retval = mv_otg_enable_internal(mvotg);
0747     if (retval) {
0748         dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
0749         goto err_destroy_workqueue;
0750     }
0751 
0752     mvotg->op_regs =
0753         (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
0754             + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
0755 
0756     if (pdata->id) {
0757         retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
0758                         NULL, mv_otg_inputs_irq,
0759                         IRQF_ONESHOT, "id", mvotg);
0760         if (retval) {
0761             dev_info(&pdev->dev,
0762                  "Failed to request irq for ID\n");
0763             pdata->id = NULL;
0764         }
0765     }
0766 
0767     if (pdata->vbus) {
0768         mvotg->clock_gating = 1;
0769         retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
0770                         NULL, mv_otg_inputs_irq,
0771                         IRQF_ONESHOT, "vbus", mvotg);
0772         if (retval) {
0773             dev_info(&pdev->dev,
0774                  "Failed to request irq for VBUS, "
0775                  "disable clock gating\n");
0776             mvotg->clock_gating = 0;
0777             pdata->vbus = NULL;
0778         }
0779     }
0780 
0781     if (pdata->disable_otg_clock_gating)
0782         mvotg->clock_gating = 0;
0783 
0784     mv_otg_reset(mvotg);
0785     mv_otg_init_irq(mvotg);
0786 
0787     r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
0788     if (r == NULL) {
0789         dev_err(&pdev->dev, "no IRQ resource defined\n");
0790         retval = -ENODEV;
0791         goto err_disable_clk;
0792     }
0793 
0794     mvotg->irq = r->start;
0795     if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
0796             driver_name, mvotg)) {
0797         dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
0798             mvotg->irq);
0799         mvotg->irq = 0;
0800         retval = -ENODEV;
0801         goto err_disable_clk;
0802     }
0803 
0804     retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
0805     if (retval < 0) {
0806         dev_err(&pdev->dev, "can't register transceiver, %d\n",
0807             retval);
0808         goto err_disable_clk;
0809     }
0810 
0811     spin_lock_init(&mvotg->wq_lock);
0812     if (spin_trylock(&mvotg->wq_lock)) {
0813         mv_otg_run_state_machine(mvotg, 2 * HZ);
0814         spin_unlock(&mvotg->wq_lock);
0815     }
0816 
0817     dev_info(&pdev->dev,
0818          "successful probe OTG device %s clock gating.\n",
0819          mvotg->clock_gating ? "with" : "without");
0820 
0821     return 0;
0822 
0823 err_disable_clk:
0824     mv_otg_disable_internal(mvotg);
0825 err_destroy_workqueue:
0826     destroy_workqueue(mvotg->qwork);
0827 
0828     return retval;
0829 }
0830 
0831 #ifdef CONFIG_PM
0832 static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
0833 {
0834     struct mv_otg *mvotg = platform_get_drvdata(pdev);
0835 
0836     if (mvotg->phy.otg->state != OTG_STATE_B_IDLE) {
0837         dev_info(&pdev->dev,
0838              "OTG state is not B_IDLE, it is %d!\n",
0839              mvotg->phy.otg->state);
0840         return -EAGAIN;
0841     }
0842 
0843     if (!mvotg->clock_gating)
0844         mv_otg_disable_internal(mvotg);
0845 
0846     return 0;
0847 }
0848 
0849 static int mv_otg_resume(struct platform_device *pdev)
0850 {
0851     struct mv_otg *mvotg = platform_get_drvdata(pdev);
0852     u32 otgsc;
0853 
0854     if (!mvotg->clock_gating) {
0855         mv_otg_enable_internal(mvotg);
0856 
0857         otgsc = readl(&mvotg->op_regs->otgsc);
0858         otgsc |= mvotg->irq_en;
0859         writel(otgsc, &mvotg->op_regs->otgsc);
0860 
0861         if (spin_trylock(&mvotg->wq_lock)) {
0862             mv_otg_run_state_machine(mvotg, 0);
0863             spin_unlock(&mvotg->wq_lock);
0864         }
0865     }
0866     return 0;
0867 }
0868 #endif
0869 
0870 static struct platform_driver mv_otg_driver = {
0871     .probe = mv_otg_probe,
0872     .remove = mv_otg_remove,
0873     .driver = {
0874            .name = driver_name,
0875            .dev_groups = mv_otg_groups,
0876            },
0877 #ifdef CONFIG_PM
0878     .suspend = mv_otg_suspend,
0879     .resume = mv_otg_resume,
0880 #endif
0881 };
0882 module_platform_driver(mv_otg_driver);
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