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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
0004  *
0005  * Author: Li Yang <LeoLi@freescale.com>
0006  *         Jerry Huang <Chang-Ming.Huang@freescale.com>
0007  *
0008  * Initialization based on code from Shlomi Gridish.
0009  */
0010 
0011 #include <linux/module.h>
0012 #include <linux/kernel.h>
0013 #include <linux/delay.h>
0014 #include <linux/slab.h>
0015 #include <linux/proc_fs.h>
0016 #include <linux/errno.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/io.h>
0019 #include <linux/timer.h>
0020 #include <linux/usb.h>
0021 #include <linux/device.h>
0022 #include <linux/usb/ch9.h>
0023 #include <linux/usb/gadget.h>
0024 #include <linux/workqueue.h>
0025 #include <linux/time.h>
0026 #include <linux/fsl_devices.h>
0027 #include <linux/platform_device.h>
0028 #include <linux/uaccess.h>
0029 
0030 #include <asm/unaligned.h>
0031 
0032 #include "phy-fsl-usb.h"
0033 
0034 #ifdef VERBOSE
0035 #define VDBG(fmt, args...) pr_debug("[%s]  " fmt, \
0036                  __func__, ## args)
0037 #else
0038 #define VDBG(stuff...)  do {} while (0)
0039 #endif
0040 
0041 #define DRIVER_VERSION "Rev. 1.55"
0042 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
0043 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
0044 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
0045 
0046 static const char driver_name[] = "fsl-usb2-otg";
0047 
0048 const pm_message_t otg_suspend_state = {
0049     .event = 1,
0050 };
0051 
0052 #define HA_DATA_PULSE
0053 
0054 static struct usb_dr_mmap *usb_dr_regs;
0055 static struct fsl_otg *fsl_otg_dev;
0056 static int srp_wait_done;
0057 
0058 /* FSM timers */
0059 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
0060     *b_ase0_brst_tmr, *b_se0_srp_tmr;
0061 
0062 /* Driver specific timers */
0063 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
0064     *b_srp_wait_tmr, *a_wait_enum_tmr;
0065 
0066 static struct list_head active_timers;
0067 
0068 static const struct fsl_otg_config fsl_otg_initdata = {
0069     .otg_port = 1,
0070 };
0071 
0072 #ifdef CONFIG_PPC32
0073 static u32 _fsl_readl_be(const unsigned __iomem *p)
0074 {
0075     return in_be32(p);
0076 }
0077 
0078 static u32 _fsl_readl_le(const unsigned __iomem *p)
0079 {
0080     return in_le32(p);
0081 }
0082 
0083 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
0084 {
0085     out_be32(p, v);
0086 }
0087 
0088 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
0089 {
0090     out_le32(p, v);
0091 }
0092 
0093 static u32 (*_fsl_readl)(const unsigned __iomem *p);
0094 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
0095 
0096 #define fsl_readl(p)        (*_fsl_readl)((p))
0097 #define fsl_writel(v, p)    (*_fsl_writel)((v), (p))
0098 
0099 #else
0100 #define fsl_readl(addr)     readl(addr)
0101 #define fsl_writel(val, addr)   writel(val, addr)
0102 #endif /* CONFIG_PPC32 */
0103 
0104 int write_ulpi(u8 addr, u8 data)
0105 {
0106     u32 temp;
0107 
0108     temp = 0x60000000 | (addr << 16) | data;
0109     fsl_writel(temp, &usb_dr_regs->ulpiview);
0110     return 0;
0111 }
0112 
0113 /* -------------------------------------------------------------*/
0114 /* Operations that will be called from OTG Finite State Machine */
0115 
0116 /* Charge vbus for vbus pulsing in SRP */
0117 void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
0118 {
0119     u32 tmp;
0120 
0121     tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
0122 
0123     if (on)
0124         /* stop discharging, start charging */
0125         tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
0126             OTGSC_CTRL_VBUS_CHARGE;
0127     else
0128         /* stop charging */
0129         tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
0130 
0131     fsl_writel(tmp, &usb_dr_regs->otgsc);
0132 }
0133 
0134 /* Discharge vbus through a resistor to ground */
0135 void fsl_otg_dischrg_vbus(int on)
0136 {
0137     u32 tmp;
0138 
0139     tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
0140 
0141     if (on)
0142         /* stop charging, start discharging */
0143         tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
0144             OTGSC_CTRL_VBUS_DISCHARGE;
0145     else
0146         /* stop discharging */
0147         tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
0148 
0149     fsl_writel(tmp, &usb_dr_regs->otgsc);
0150 }
0151 
0152 /* A-device driver vbus, controlled through PP bit in PORTSC */
0153 void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
0154 {
0155     u32 tmp;
0156 
0157     if (on) {
0158         tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
0159         fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
0160     } else {
0161         tmp = fsl_readl(&usb_dr_regs->portsc) &
0162               ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
0163         fsl_writel(tmp, &usb_dr_regs->portsc);
0164     }
0165 }
0166 
0167 /*
0168  * Pull-up D+, signalling connect by periperal. Also used in
0169  * data-line pulsing in SRP
0170  */
0171 void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
0172 {
0173     u32 tmp;
0174 
0175     tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
0176 
0177     if (on)
0178         tmp |= OTGSC_CTRL_DATA_PULSING;
0179     else
0180         tmp &= ~OTGSC_CTRL_DATA_PULSING;
0181 
0182     fsl_writel(tmp, &usb_dr_regs->otgsc);
0183 }
0184 
0185 /*
0186  * Generate SOF by host.  This is controlled through suspend/resume the
0187  * port.  In host mode, controller will automatically send SOF.
0188  * Suspend will block the data on the port.
0189  */
0190 void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
0191 {
0192     u32 tmp;
0193 
0194     tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
0195     if (on)
0196         tmp |= PORTSC_PORT_FORCE_RESUME;
0197     else
0198         tmp |= PORTSC_PORT_SUSPEND;
0199 
0200     fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
0201 
0202 }
0203 
0204 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
0205 void fsl_otg_start_pulse(struct otg_fsm *fsm)
0206 {
0207     u32 tmp;
0208 
0209     srp_wait_done = 0;
0210 #ifdef HA_DATA_PULSE
0211     tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
0212     tmp |= OTGSC_HA_DATA_PULSE;
0213     fsl_writel(tmp, &usb_dr_regs->otgsc);
0214 #else
0215     fsl_otg_loc_conn(1);
0216 #endif
0217 
0218     fsl_otg_add_timer(fsm, b_data_pulse_tmr);
0219 }
0220 
0221 void b_data_pulse_end(unsigned long foo)
0222 {
0223 #ifdef HA_DATA_PULSE
0224 #else
0225     fsl_otg_loc_conn(0);
0226 #endif
0227 
0228     /* Do VBUS pulse after data pulse */
0229     fsl_otg_pulse_vbus();
0230 }
0231 
0232 void fsl_otg_pulse_vbus(void)
0233 {
0234     srp_wait_done = 0;
0235     fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
0236     /* start the timer to end vbus charge */
0237     fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
0238 }
0239 
0240 void b_vbus_pulse_end(unsigned long foo)
0241 {
0242     fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
0243 
0244     /*
0245      * As USB3300 using the same a_sess_vld and b_sess_vld voltage
0246      * we need to discharge the bus for a while to distinguish
0247      * residual voltage of vbus pulsing and A device pull up
0248      */
0249     fsl_otg_dischrg_vbus(1);
0250     fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
0251 }
0252 
0253 void b_srp_end(unsigned long foo)
0254 {
0255     fsl_otg_dischrg_vbus(0);
0256     srp_wait_done = 1;
0257 
0258     if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
0259         fsl_otg_dev->fsm.b_sess_vld)
0260         fsl_otg_dev->fsm.b_srp_done = 1;
0261 }
0262 
0263 /*
0264  * Workaround for a_host suspending too fast.  When a_bus_req=0,
0265  * a_host will start by SRP.  It needs to set b_hnp_enable before
0266  * actually suspending to start HNP
0267  */
0268 void a_wait_enum(unsigned long foo)
0269 {
0270     VDBG("a_wait_enum timeout\n");
0271     if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
0272         fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
0273     else
0274         otg_statemachine(&fsl_otg_dev->fsm);
0275 }
0276 
0277 /* The timeout callback function to set time out bit */
0278 void set_tmout(unsigned long indicator)
0279 {
0280     *(int *)indicator = 1;
0281 }
0282 
0283 /* Initialize timers */
0284 int fsl_otg_init_timers(struct otg_fsm *fsm)
0285 {
0286     /* FSM used timers */
0287     a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
0288                 (unsigned long)&fsm->a_wait_vrise_tmout);
0289     if (!a_wait_vrise_tmr)
0290         return -ENOMEM;
0291 
0292     a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
0293                 (unsigned long)&fsm->a_wait_bcon_tmout);
0294     if (!a_wait_bcon_tmr)
0295         return -ENOMEM;
0296 
0297     a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
0298                 (unsigned long)&fsm->a_aidl_bdis_tmout);
0299     if (!a_aidl_bdis_tmr)
0300         return -ENOMEM;
0301 
0302     b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
0303                 (unsigned long)&fsm->b_ase0_brst_tmout);
0304     if (!b_ase0_brst_tmr)
0305         return -ENOMEM;
0306 
0307     b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
0308                 (unsigned long)&fsm->b_se0_srp);
0309     if (!b_se0_srp_tmr)
0310         return -ENOMEM;
0311 
0312     b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
0313                 (unsigned long)&fsm->b_srp_done);
0314     if (!b_srp_fail_tmr)
0315         return -ENOMEM;
0316 
0317     a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
0318                 (unsigned long)&fsm);
0319     if (!a_wait_enum_tmr)
0320         return -ENOMEM;
0321 
0322     /* device driver used timers */
0323     b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
0324     if (!b_srp_wait_tmr)
0325         return -ENOMEM;
0326 
0327     b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
0328                 TB_DATA_PLS, 0);
0329     if (!b_data_pulse_tmr)
0330         return -ENOMEM;
0331 
0332     b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
0333                 TB_VBUS_PLS, 0);
0334     if (!b_vbus_pulse_tmr)
0335         return -ENOMEM;
0336 
0337     return 0;
0338 }
0339 
0340 /* Uninitialize timers */
0341 void fsl_otg_uninit_timers(void)
0342 {
0343     /* FSM used timers */
0344     kfree(a_wait_vrise_tmr);
0345     kfree(a_wait_bcon_tmr);
0346     kfree(a_aidl_bdis_tmr);
0347     kfree(b_ase0_brst_tmr);
0348     kfree(b_se0_srp_tmr);
0349     kfree(b_srp_fail_tmr);
0350     kfree(a_wait_enum_tmr);
0351 
0352     /* device driver used timers */
0353     kfree(b_srp_wait_tmr);
0354     kfree(b_data_pulse_tmr);
0355     kfree(b_vbus_pulse_tmr);
0356 }
0357 
0358 static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
0359 {
0360     struct fsl_otg_timer *timer;
0361 
0362     /* REVISIT: use array of pointers to timers instead */
0363     switch (t) {
0364     case A_WAIT_VRISE:
0365         timer = a_wait_vrise_tmr;
0366         break;
0367     case A_WAIT_BCON:
0368         timer = a_wait_vrise_tmr;
0369         break;
0370     case A_AIDL_BDIS:
0371         timer = a_wait_vrise_tmr;
0372         break;
0373     case B_ASE0_BRST:
0374         timer = a_wait_vrise_tmr;
0375         break;
0376     case B_SE0_SRP:
0377         timer = a_wait_vrise_tmr;
0378         break;
0379     case B_SRP_FAIL:
0380         timer = a_wait_vrise_tmr;
0381         break;
0382     case A_WAIT_ENUM:
0383         timer = a_wait_vrise_tmr;
0384         break;
0385     default:
0386         timer = NULL;
0387     }
0388 
0389     return timer;
0390 }
0391 
0392 /* Add timer to timer list */
0393 void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
0394 {
0395     struct fsl_otg_timer *timer = gtimer;
0396     struct fsl_otg_timer *tmp_timer;
0397 
0398     /*
0399      * Check if the timer is already in the active list,
0400      * if so update timer count
0401      */
0402     list_for_each_entry(tmp_timer, &active_timers, list)
0403         if (tmp_timer == timer) {
0404         timer->count = timer->expires;
0405         return;
0406     }
0407     timer->count = timer->expires;
0408     list_add_tail(&timer->list, &active_timers);
0409 }
0410 
0411 static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
0412 {
0413     struct fsl_otg_timer *timer;
0414 
0415     timer = fsl_otg_get_timer(t);
0416     if (!timer)
0417         return;
0418 
0419     fsl_otg_add_timer(fsm, timer);
0420 }
0421 
0422 /* Remove timer from the timer list; clear timeout status */
0423 void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
0424 {
0425     struct fsl_otg_timer *timer = gtimer;
0426     struct fsl_otg_timer *tmp_timer, *del_tmp;
0427 
0428     list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
0429         if (tmp_timer == timer)
0430             list_del(&timer->list);
0431 }
0432 
0433 static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
0434 {
0435     struct fsl_otg_timer *timer;
0436 
0437     timer = fsl_otg_get_timer(t);
0438     if (!timer)
0439         return;
0440 
0441     fsl_otg_del_timer(fsm, timer);
0442 }
0443 
0444 /* Reset controller, not reset the bus */
0445 void otg_reset_controller(void)
0446 {
0447     u32 command;
0448 
0449     command = fsl_readl(&usb_dr_regs->usbcmd);
0450     command |= (1 << 1);
0451     fsl_writel(command, &usb_dr_regs->usbcmd);
0452     while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
0453         ;
0454 }
0455 
0456 /* Call suspend/resume routines in host driver */
0457 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
0458 {
0459     struct usb_otg *otg = fsm->otg;
0460     struct device *dev;
0461     struct fsl_otg *otg_dev =
0462         container_of(otg->usb_phy, struct fsl_otg, phy);
0463     u32 retval = 0;
0464 
0465     if (!otg->host)
0466         return -ENODEV;
0467     dev = otg->host->controller;
0468 
0469     /*
0470      * Update a_vbus_vld state as a_vbus_vld int is disabled
0471      * in device mode
0472      */
0473     fsm->a_vbus_vld =
0474         !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
0475     if (on) {
0476         /* start fsl usb host controller */
0477         if (otg_dev->host_working)
0478             goto end;
0479         else {
0480             otg_reset_controller();
0481             VDBG("host on......\n");
0482             if (dev->driver->pm && dev->driver->pm->resume) {
0483                 retval = dev->driver->pm->resume(dev);
0484                 if (fsm->id) {
0485                     /* default-b */
0486                     fsl_otg_drv_vbus(fsm, 1);
0487                     /*
0488                      * Workaround: b_host can't driver
0489                      * vbus, but PP in PORTSC needs to
0490                      * be 1 for host to work.
0491                      * So we set drv_vbus bit in
0492                      * transceiver to 0 thru ULPI.
0493                      */
0494                     write_ulpi(0x0c, 0x20);
0495                 }
0496             }
0497 
0498             otg_dev->host_working = 1;
0499         }
0500     } else {
0501         /* stop fsl usb host controller */
0502         if (!otg_dev->host_working)
0503             goto end;
0504         else {
0505             VDBG("host off......\n");
0506             if (dev && dev->driver) {
0507                 if (dev->driver->pm && dev->driver->pm->suspend)
0508                     retval = dev->driver->pm->suspend(dev);
0509                 if (fsm->id)
0510                     /* default-b */
0511                     fsl_otg_drv_vbus(fsm, 0);
0512             }
0513             otg_dev->host_working = 0;
0514         }
0515     }
0516 end:
0517     return retval;
0518 }
0519 
0520 /*
0521  * Call suspend and resume function in udc driver
0522  * to stop and start udc driver.
0523  */
0524 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
0525 {
0526     struct usb_otg *otg = fsm->otg;
0527     struct device *dev;
0528 
0529     if (!otg->gadget || !otg->gadget->dev.parent)
0530         return -ENODEV;
0531 
0532     VDBG("gadget %s\n", on ? "on" : "off");
0533     dev = otg->gadget->dev.parent;
0534 
0535     if (on) {
0536         if (dev->driver->resume)
0537             dev->driver->resume(dev);
0538     } else {
0539         if (dev->driver->suspend)
0540             dev->driver->suspend(dev, otg_suspend_state);
0541     }
0542 
0543     return 0;
0544 }
0545 
0546 /*
0547  * Called by initialization code of host driver.  Register host controller
0548  * to the OTG.  Suspend host for OTG role detection.
0549  */
0550 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
0551 {
0552     struct fsl_otg *otg_dev;
0553 
0554     if (!otg)
0555         return -ENODEV;
0556 
0557     otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
0558     if (otg_dev != fsl_otg_dev)
0559         return -ENODEV;
0560 
0561     otg->host = host;
0562 
0563     otg_dev->fsm.a_bus_drop = 0;
0564     otg_dev->fsm.a_bus_req = 1;
0565 
0566     if (host) {
0567         VDBG("host off......\n");
0568 
0569         otg->host->otg_port = fsl_otg_initdata.otg_port;
0570         otg->host->is_b_host = otg_dev->fsm.id;
0571         /*
0572          * must leave time for hub_wq to finish its thing
0573          * before yanking the host driver out from under it,
0574          * so suspend the host after a short delay.
0575          */
0576         otg_dev->host_working = 1;
0577         schedule_delayed_work(&otg_dev->otg_event, 100);
0578         return 0;
0579     } else {
0580         /* host driver going away */
0581         if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
0582               OTGSC_STS_USB_ID)) {
0583             /* Mini-A cable connected */
0584             struct otg_fsm *fsm = &otg_dev->fsm;
0585 
0586             otg->state = OTG_STATE_UNDEFINED;
0587             fsm->protocol = PROTO_UNDEF;
0588         }
0589     }
0590 
0591     otg_dev->host_working = 0;
0592 
0593     otg_statemachine(&otg_dev->fsm);
0594 
0595     return 0;
0596 }
0597 
0598 /* Called by initialization code of udc.  Register udc to OTG. */
0599 static int fsl_otg_set_peripheral(struct usb_otg *otg,
0600                     struct usb_gadget *gadget)
0601 {
0602     struct fsl_otg *otg_dev;
0603 
0604     if (!otg)
0605         return -ENODEV;
0606 
0607     otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
0608     VDBG("otg_dev 0x%x\n", (int)otg_dev);
0609     VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
0610     if (otg_dev != fsl_otg_dev)
0611         return -ENODEV;
0612 
0613     if (!gadget) {
0614         if (!otg->default_a)
0615             otg->gadget->ops->vbus_draw(otg->gadget, 0);
0616         usb_gadget_vbus_disconnect(otg->gadget);
0617         otg->gadget = 0;
0618         otg_dev->fsm.b_bus_req = 0;
0619         otg_statemachine(&otg_dev->fsm);
0620         return 0;
0621     }
0622 
0623     otg->gadget = gadget;
0624     otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
0625 
0626     otg_dev->fsm.b_bus_req = 1;
0627 
0628     /* start the gadget right away if the ID pin says Mini-B */
0629     pr_debug("ID pin=%d\n", otg_dev->fsm.id);
0630     if (otg_dev->fsm.id == 1) {
0631         fsl_otg_start_host(&otg_dev->fsm, 0);
0632         otg_drv_vbus(&otg_dev->fsm, 0);
0633         fsl_otg_start_gadget(&otg_dev->fsm, 1);
0634     }
0635 
0636     return 0;
0637 }
0638 
0639 /*
0640  * Delayed pin detect interrupt processing.
0641  *
0642  * When the Mini-A cable is disconnected from the board,
0643  * the pin-detect interrupt happens before the disconnect
0644  * interrupts for the connected device(s).  In order to
0645  * process the disconnect interrupt(s) prior to switching
0646  * roles, the pin-detect interrupts are delayed, and handled
0647  * by this routine.
0648  */
0649 static void fsl_otg_event(struct work_struct *work)
0650 {
0651     struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
0652     struct otg_fsm *fsm = &og->fsm;
0653 
0654     if (fsm->id) {      /* switch to gadget */
0655         fsl_otg_start_host(fsm, 0);
0656         otg_drv_vbus(fsm, 0);
0657         fsl_otg_start_gadget(fsm, 1);
0658     }
0659 }
0660 
0661 /* B-device start SRP */
0662 static int fsl_otg_start_srp(struct usb_otg *otg)
0663 {
0664     struct fsl_otg *otg_dev;
0665 
0666     if (!otg || otg->state != OTG_STATE_B_IDLE)
0667         return -ENODEV;
0668 
0669     otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
0670     if (otg_dev != fsl_otg_dev)
0671         return -ENODEV;
0672 
0673     otg_dev->fsm.b_bus_req = 1;
0674     otg_statemachine(&otg_dev->fsm);
0675 
0676     return 0;
0677 }
0678 
0679 /* A_host suspend will call this function to start hnp */
0680 static int fsl_otg_start_hnp(struct usb_otg *otg)
0681 {
0682     struct fsl_otg *otg_dev;
0683 
0684     if (!otg)
0685         return -ENODEV;
0686 
0687     otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
0688     if (otg_dev != fsl_otg_dev)
0689         return -ENODEV;
0690 
0691     pr_debug("start_hnp...\n");
0692 
0693     /* clear a_bus_req to enter a_suspend state */
0694     otg_dev->fsm.a_bus_req = 0;
0695     otg_statemachine(&otg_dev->fsm);
0696 
0697     return 0;
0698 }
0699 
0700 /*
0701  * Interrupt handler.  OTG/host/peripheral share the same int line.
0702  * OTG driver clears OTGSC interrupts and leaves USB interrupts
0703  * intact.  It needs to have knowledge of some USB interrupts
0704  * such as port change.
0705  */
0706 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
0707 {
0708     struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
0709     struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
0710     u32 otg_int_src, otg_sc;
0711 
0712     otg_sc = fsl_readl(&usb_dr_regs->otgsc);
0713     otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
0714 
0715     /* Only clear otg interrupts */
0716     fsl_writel(otg_sc, &usb_dr_regs->otgsc);
0717 
0718     /*FIXME: ID change not generate when init to 0 */
0719     fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
0720     otg->default_a = (fsm->id == 0);
0721 
0722     /* process OTG interrupts */
0723     if (otg_int_src) {
0724         if (otg_int_src & OTGSC_INTSTS_USB_ID) {
0725             fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
0726             otg->default_a = (fsm->id == 0);
0727             /* clear conn information */
0728             if (fsm->id)
0729                 fsm->b_conn = 0;
0730             else
0731                 fsm->a_conn = 0;
0732 
0733             if (otg->host)
0734                 otg->host->is_b_host = fsm->id;
0735             if (otg->gadget)
0736                 otg->gadget->is_a_peripheral = !fsm->id;
0737             VDBG("ID int (ID is %d)\n", fsm->id);
0738 
0739             if (fsm->id) {  /* switch to gadget */
0740                 schedule_delayed_work(
0741                     &((struct fsl_otg *)dev_id)->otg_event,
0742                     100);
0743             } else {    /* switch to host */
0744                 cancel_delayed_work(&
0745                             ((struct fsl_otg *)dev_id)->
0746                             otg_event);
0747                 fsl_otg_start_gadget(fsm, 0);
0748                 otg_drv_vbus(fsm, 1);
0749                 fsl_otg_start_host(fsm, 1);
0750             }
0751             return IRQ_HANDLED;
0752         }
0753     }
0754     return IRQ_NONE;
0755 }
0756 
0757 static struct otg_fsm_ops fsl_otg_ops = {
0758     .chrg_vbus = fsl_otg_chrg_vbus,
0759     .drv_vbus = fsl_otg_drv_vbus,
0760     .loc_conn = fsl_otg_loc_conn,
0761     .loc_sof = fsl_otg_loc_sof,
0762     .start_pulse = fsl_otg_start_pulse,
0763 
0764     .add_timer = fsl_otg_fsm_add_timer,
0765     .del_timer = fsl_otg_fsm_del_timer,
0766 
0767     .start_host = fsl_otg_start_host,
0768     .start_gadget = fsl_otg_start_gadget,
0769 };
0770 
0771 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
0772 static int fsl_otg_conf(struct platform_device *pdev)
0773 {
0774     struct fsl_otg *fsl_otg_tc;
0775     int status;
0776 
0777     if (fsl_otg_dev)
0778         return 0;
0779 
0780     /* allocate space to fsl otg device */
0781     fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
0782     if (!fsl_otg_tc)
0783         return -ENOMEM;
0784 
0785     fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
0786     if (!fsl_otg_tc->phy.otg) {
0787         kfree(fsl_otg_tc);
0788         return -ENOMEM;
0789     }
0790 
0791     INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
0792 
0793     INIT_LIST_HEAD(&active_timers);
0794     status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
0795     if (status) {
0796         pr_info("Couldn't init OTG timers\n");
0797         goto err;
0798     }
0799     mutex_init(&fsl_otg_tc->fsm.lock);
0800 
0801     /* Set OTG state machine operations */
0802     fsl_otg_tc->fsm.ops = &fsl_otg_ops;
0803 
0804     /* initialize the otg structure */
0805     fsl_otg_tc->phy.label = DRIVER_DESC;
0806     fsl_otg_tc->phy.dev = &pdev->dev;
0807 
0808     fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
0809     fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
0810     fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
0811     fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
0812     fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
0813 
0814     fsl_otg_dev = fsl_otg_tc;
0815 
0816     /* Store the otg transceiver */
0817     status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
0818     if (status) {
0819         pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
0820         goto err;
0821     }
0822 
0823     return 0;
0824 err:
0825     fsl_otg_uninit_timers();
0826     kfree(fsl_otg_tc->phy.otg);
0827     kfree(fsl_otg_tc);
0828     return status;
0829 }
0830 
0831 /* OTG Initialization */
0832 int usb_otg_start(struct platform_device *pdev)
0833 {
0834     struct fsl_otg *p_otg;
0835     struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
0836     struct otg_fsm *fsm;
0837     int status;
0838     struct resource *res;
0839     u32 temp;
0840     struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
0841 
0842     p_otg = container_of(otg_trans, struct fsl_otg, phy);
0843     fsm = &p_otg->fsm;
0844 
0845     /* Initialize the state machine structure with default values */
0846     SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
0847     fsm->otg = p_otg->phy.otg;
0848 
0849     /* We don't require predefined MEM/IRQ resource index */
0850     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0851     if (!res)
0852         return -ENXIO;
0853 
0854     /* We don't request_mem_region here to enable resource sharing
0855      * with host/device */
0856 
0857     usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
0858     p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
0859     pdata->regs = (void *)usb_dr_regs;
0860 
0861     if (pdata->init && pdata->init(pdev) != 0)
0862         return -EINVAL;
0863 
0864 #ifdef CONFIG_PPC32
0865     if (pdata->big_endian_mmio) {
0866         _fsl_readl = _fsl_readl_be;
0867         _fsl_writel = _fsl_writel_be;
0868     } else {
0869         _fsl_readl = _fsl_readl_le;
0870         _fsl_writel = _fsl_writel_le;
0871     }
0872 #endif
0873 
0874     /* request irq */
0875     p_otg->irq = platform_get_irq(pdev, 0);
0876     if (p_otg->irq < 0)
0877         return p_otg->irq;
0878     status = request_irq(p_otg->irq, fsl_otg_isr,
0879                 IRQF_SHARED, driver_name, p_otg);
0880     if (status) {
0881         dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
0882             p_otg->irq, status);
0883         iounmap(p_otg->dr_mem_map);
0884         kfree(p_otg->phy.otg);
0885         kfree(p_otg);
0886         return status;
0887     }
0888 
0889     /* stop the controller */
0890     temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
0891     temp &= ~USB_CMD_RUN_STOP;
0892     fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
0893 
0894     /* reset the controller */
0895     temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
0896     temp |= USB_CMD_CTRL_RESET;
0897     fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
0898 
0899     /* wait reset completed */
0900     while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
0901         ;
0902 
0903     /* configure the VBUSHS as IDLE(both host and device) */
0904     temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
0905     fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
0906 
0907     /* configure PHY interface */
0908     temp = fsl_readl(&p_otg->dr_mem_map->portsc);
0909     temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
0910     switch (pdata->phy_mode) {
0911     case FSL_USB2_PHY_ULPI:
0912         temp |= PORTSC_PTS_ULPI;
0913         break;
0914     case FSL_USB2_PHY_UTMI_WIDE:
0915         temp |= PORTSC_PTW_16BIT;
0916         fallthrough;
0917     case FSL_USB2_PHY_UTMI:
0918         temp |= PORTSC_PTS_UTMI;
0919         fallthrough;
0920     default:
0921         break;
0922     }
0923     fsl_writel(temp, &p_otg->dr_mem_map->portsc);
0924 
0925     if (pdata->have_sysif_regs) {
0926         /* configure control enable IO output, big endian register */
0927         temp = __raw_readl(&p_otg->dr_mem_map->control);
0928         temp |= USB_CTRL_IOENB;
0929         __raw_writel(temp, &p_otg->dr_mem_map->control);
0930     }
0931 
0932     /* disable all interrupt and clear all OTGSC status */
0933     temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
0934     temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
0935     temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
0936     fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
0937 
0938     /*
0939      * The identification (id) input is FALSE when a Mini-A plug is inserted
0940      * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
0941      * Also: record initial state of ID pin
0942      */
0943     if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
0944         p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
0945         p_otg->fsm.id = 1;
0946     } else {
0947         p_otg->phy.otg->state = OTG_STATE_A_IDLE;
0948         p_otg->fsm.id = 0;
0949     }
0950 
0951     pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
0952 
0953     /* enable OTG ID pin interrupt */
0954     temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
0955     temp |= OTGSC_INTR_USB_ID_EN;
0956     temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
0957     fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
0958 
0959     return 0;
0960 }
0961 
0962 static int fsl_otg_probe(struct platform_device *pdev)
0963 {
0964     int ret;
0965 
0966     if (!dev_get_platdata(&pdev->dev))
0967         return -ENODEV;
0968 
0969     /* configure the OTG */
0970     ret = fsl_otg_conf(pdev);
0971     if (ret) {
0972         dev_err(&pdev->dev, "Couldn't configure OTG module\n");
0973         return ret;
0974     }
0975 
0976     /* start OTG */
0977     ret = usb_otg_start(pdev);
0978     if (ret) {
0979         dev_err(&pdev->dev, "Can't init FSL OTG device\n");
0980         return ret;
0981     }
0982 
0983     return ret;
0984 }
0985 
0986 static int fsl_otg_remove(struct platform_device *pdev)
0987 {
0988     struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
0989 
0990     usb_remove_phy(&fsl_otg_dev->phy);
0991     free_irq(fsl_otg_dev->irq, fsl_otg_dev);
0992 
0993     iounmap((void *)usb_dr_regs);
0994 
0995     fsl_otg_uninit_timers();
0996     kfree(fsl_otg_dev->phy.otg);
0997     kfree(fsl_otg_dev);
0998 
0999     if (pdata->exit)
1000         pdata->exit(pdev);
1001 
1002     return 0;
1003 }
1004 
1005 struct platform_driver fsl_otg_driver = {
1006     .probe = fsl_otg_probe,
1007     .remove = fsl_otg_remove,
1008     .driver = {
1009         .name = driver_name,
1010         .owner = THIS_MODULE,
1011     },
1012 };
1013 
1014 module_platform_driver(fsl_otg_driver);
1015 
1016 MODULE_DESCRIPTION(DRIVER_INFO);
1017 MODULE_AUTHOR(DRIVER_AUTHOR);
1018 MODULE_LICENSE("GPL");
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