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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Texas Instruments DSPS platforms "glue layer"
0004  *
0005  * Copyright (C) 2012, by Texas Instruments
0006  *
0007  * Based on the am35x "glue layer" code.
0008  *
0009  * This file is part of the Inventra Controller Driver for Linux.
0010  *
0011  * musb_dsps.c will be a common file for all the TI DSPS platforms
0012  * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
0013  * For now only ti81x is using this and in future davinci.c, am35x.c
0014  * da8xx.c would be merged to this file after testing.
0015  */
0016 
0017 #include <linux/io.h>
0018 #include <linux/irq.h>
0019 #include <linux/err.h>
0020 #include <linux/platform_device.h>
0021 #include <linux/dma-mapping.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/module.h>
0024 #include <linux/usb/usb_phy_generic.h>
0025 #include <linux/platform_data/usb-omap.h>
0026 #include <linux/sizes.h>
0027 
0028 #include <linux/of.h>
0029 #include <linux/of_device.h>
0030 #include <linux/of_address.h>
0031 #include <linux/of_irq.h>
0032 #include <linux/usb/of.h>
0033 
0034 #include <linux/debugfs.h>
0035 
0036 #include "musb_core.h"
0037 
0038 static const struct of_device_id musb_dsps_of_match[];
0039 
0040 /*
0041  * DSPS musb wrapper register offset.
0042  * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
0043  * musb ips.
0044  */
0045 struct dsps_musb_wrapper {
0046     u16 revision;
0047     u16 control;
0048     u16 status;
0049     u16 epintr_set;
0050     u16 epintr_clear;
0051     u16 epintr_status;
0052     u16 coreintr_set;
0053     u16 coreintr_clear;
0054     u16 coreintr_status;
0055     u16 phy_utmi;
0056     u16 mode;
0057     u16 tx_mode;
0058     u16 rx_mode;
0059 
0060     /* bit positions for control */
0061     unsigned    reset:5;
0062 
0063     /* bit positions for interrupt */
0064     unsigned    usb_shift:5;
0065     u32     usb_mask;
0066     u32     usb_bitmap;
0067     unsigned    drvvbus:5;
0068 
0069     unsigned    txep_shift:5;
0070     u32     txep_mask;
0071     u32     txep_bitmap;
0072 
0073     unsigned    rxep_shift:5;
0074     u32     rxep_mask;
0075     u32     rxep_bitmap;
0076 
0077     /* bit positions for phy_utmi */
0078     unsigned    otg_disable:5;
0079 
0080     /* bit positions for mode */
0081     unsigned    iddig:5;
0082     unsigned    iddig_mux:5;
0083     /* miscellaneous stuff */
0084     unsigned    poll_timeout;
0085 };
0086 
0087 /*
0088  * register shadow for suspend
0089  */
0090 struct dsps_context {
0091     u32 control;
0092     u32 epintr;
0093     u32 coreintr;
0094     u32 phy_utmi;
0095     u32 mode;
0096     u32 tx_mode;
0097     u32 rx_mode;
0098 };
0099 
0100 /*
0101  * DSPS glue structure.
0102  */
0103 struct dsps_glue {
0104     struct device *dev;
0105     struct platform_device *musb;   /* child musb pdev */
0106     const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
0107     int vbus_irq;           /* optional vbus irq */
0108     unsigned long last_timer;    /* last timer data for each instance */
0109     bool sw_babble_enabled;
0110     void __iomem *usbss_base;
0111 
0112     struct dsps_context context;
0113     struct debugfs_regset32 regset;
0114     struct dentry *dbgfs_root;
0115 };
0116 
0117 static const struct debugfs_reg32 dsps_musb_regs[] = {
0118     { "revision",       0x00 },
0119     { "control",        0x14 },
0120     { "status",     0x18 },
0121     { "eoi",        0x24 },
0122     { "intr0_stat",     0x30 },
0123     { "intr1_stat",     0x34 },
0124     { "intr0_set",      0x38 },
0125     { "intr1_set",      0x3c },
0126     { "txmode",     0x70 },
0127     { "rxmode",     0x74 },
0128     { "autoreq",        0xd0 },
0129     { "srpfixtime",     0xd4 },
0130     { "tdown",      0xd8 },
0131     { "phy_utmi",       0xe0 },
0132     { "mode",       0xe8 },
0133 };
0134 
0135 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
0136 {
0137     struct musb *musb = platform_get_drvdata(glue->musb);
0138     int wait;
0139 
0140     if (wait_ms < 0)
0141         wait = msecs_to_jiffies(glue->wrp->poll_timeout);
0142     else
0143         wait = msecs_to_jiffies(wait_ms);
0144 
0145     mod_timer(&musb->dev_timer, jiffies + wait);
0146 }
0147 
0148 /*
0149  * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
0150  */
0151 static void dsps_mod_timer_optional(struct dsps_glue *glue)
0152 {
0153     if (glue->vbus_irq)
0154         return;
0155 
0156     dsps_mod_timer(glue, -1);
0157 }
0158 
0159 /* USBSS  / USB AM335x */
0160 #define USBSS_IRQ_STATUS    0x28
0161 #define USBSS_IRQ_ENABLER   0x2c
0162 #define USBSS_IRQ_CLEARR    0x30
0163 
0164 #define USBSS_IRQ_PD_COMP   (1 << 2)
0165 
0166 /*
0167  * dsps_musb_enable - enable interrupts
0168  */
0169 static void dsps_musb_enable(struct musb *musb)
0170 {
0171     struct device *dev = musb->controller;
0172     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0173     const struct dsps_musb_wrapper *wrp = glue->wrp;
0174     void __iomem *reg_base = musb->ctrl_base;
0175     u32 epmask, coremask;
0176 
0177     /* Workaround: setup IRQs through both register sets. */
0178     epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
0179            ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
0180     coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
0181 
0182     musb_writel(reg_base, wrp->epintr_set, epmask);
0183     musb_writel(reg_base, wrp->coreintr_set, coremask);
0184     /*
0185      * start polling for runtime PM active and idle,
0186      * and for ID change in dual-role idle mode.
0187      */
0188     if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
0189         dsps_mod_timer(glue, -1);
0190 }
0191 
0192 /*
0193  * dsps_musb_disable - disable HDRC and flush interrupts
0194  */
0195 static void dsps_musb_disable(struct musb *musb)
0196 {
0197     struct device *dev = musb->controller;
0198     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0199     const struct dsps_musb_wrapper *wrp = glue->wrp;
0200     void __iomem *reg_base = musb->ctrl_base;
0201 
0202     musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
0203     musb_writel(reg_base, wrp->epintr_clear,
0204              wrp->txep_bitmap | wrp->rxep_bitmap);
0205     del_timer_sync(&musb->dev_timer);
0206 }
0207 
0208 /* Caller must take musb->lock */
0209 static int dsps_check_status(struct musb *musb, void *unused)
0210 {
0211     void __iomem *mregs = musb->mregs;
0212     struct device *dev = musb->controller;
0213     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0214     const struct dsps_musb_wrapper *wrp = glue->wrp;
0215     u8 devctl;
0216     int skip_session = 0;
0217 
0218     if (glue->vbus_irq)
0219         del_timer(&musb->dev_timer);
0220 
0221     /*
0222      * We poll because DSPS IP's won't expose several OTG-critical
0223      * status change events (from the transceiver) otherwise.
0224      */
0225     devctl = musb_readb(mregs, MUSB_DEVCTL);
0226     dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
0227                 usb_otg_state_string(musb->xceiv->otg->state));
0228 
0229     switch (musb->xceiv->otg->state) {
0230     case OTG_STATE_A_WAIT_VRISE:
0231         if (musb->port_mode == MUSB_HOST) {
0232             musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
0233             dsps_mod_timer_optional(glue);
0234             break;
0235         }
0236         fallthrough;
0237 
0238     case OTG_STATE_A_WAIT_BCON:
0239         /* keep VBUS on for host-only mode */
0240         if (musb->port_mode == MUSB_HOST) {
0241             dsps_mod_timer_optional(glue);
0242             break;
0243         }
0244         musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
0245         skip_session = 1;
0246         fallthrough;
0247 
0248     case OTG_STATE_A_IDLE:
0249     case OTG_STATE_B_IDLE:
0250         if (!glue->vbus_irq) {
0251             if (devctl & MUSB_DEVCTL_BDEVICE) {
0252                 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0253                 MUSB_DEV_MODE(musb);
0254             } else {
0255                 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
0256                 MUSB_HST_MODE(musb);
0257             }
0258 
0259             if (musb->port_mode == MUSB_PERIPHERAL)
0260                 skip_session = 1;
0261 
0262             if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
0263                 musb_writeb(mregs, MUSB_DEVCTL,
0264                         MUSB_DEVCTL_SESSION);
0265         }
0266         dsps_mod_timer_optional(glue);
0267         break;
0268     case OTG_STATE_A_WAIT_VFALL:
0269         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0270         musb_writel(musb->ctrl_base, wrp->coreintr_set,
0271                 MUSB_INTR_VBUSERROR << wrp->usb_shift);
0272         break;
0273     default:
0274         break;
0275     }
0276 
0277     return 0;
0278 }
0279 
0280 static void otg_timer(struct timer_list *t)
0281 {
0282     struct musb *musb = from_timer(musb, t, dev_timer);
0283     struct device *dev = musb->controller;
0284     unsigned long flags;
0285     int err;
0286 
0287     err = pm_runtime_get(dev);
0288     if ((err != -EINPROGRESS) && err < 0) {
0289         dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
0290         pm_runtime_put_noidle(dev);
0291 
0292         return;
0293     }
0294 
0295     spin_lock_irqsave(&musb->lock, flags);
0296     err = musb_queue_resume_work(musb, dsps_check_status, NULL);
0297     if (err < 0)
0298         dev_err(dev, "%s resume work: %i\n", __func__, err);
0299     spin_unlock_irqrestore(&musb->lock, flags);
0300     pm_runtime_mark_last_busy(dev);
0301     pm_runtime_put_autosuspend(dev);
0302 }
0303 
0304 static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
0305 {
0306     u32 epintr;
0307     struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
0308     const struct dsps_musb_wrapper *wrp = glue->wrp;
0309 
0310     /* musb->lock might already been held */
0311     epintr = (1 << epnum) << wrp->rxep_shift;
0312     musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
0313 }
0314 
0315 static irqreturn_t dsps_interrupt(int irq, void *hci)
0316 {
0317     struct musb  *musb = hci;
0318     void __iomem *reg_base = musb->ctrl_base;
0319     struct device *dev = musb->controller;
0320     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0321     const struct dsps_musb_wrapper *wrp = glue->wrp;
0322     unsigned long flags;
0323     irqreturn_t ret = IRQ_NONE;
0324     u32 epintr, usbintr;
0325 
0326     spin_lock_irqsave(&musb->lock, flags);
0327 
0328     /* Get endpoint interrupts */
0329     epintr = musb_readl(reg_base, wrp->epintr_status);
0330     musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
0331     musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
0332 
0333     if (epintr)
0334         musb_writel(reg_base, wrp->epintr_status, epintr);
0335 
0336     /* Get usb core interrupts */
0337     usbintr = musb_readl(reg_base, wrp->coreintr_status);
0338     if (!usbintr && !epintr)
0339         goto out;
0340 
0341     musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
0342     if (usbintr)
0343         musb_writel(reg_base, wrp->coreintr_status, usbintr);
0344 
0345     dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
0346             usbintr, epintr);
0347 
0348     if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
0349         int drvvbus = musb_readl(reg_base, wrp->status);
0350         void __iomem *mregs = musb->mregs;
0351         u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
0352         int err;
0353 
0354         err = musb->int_usb & MUSB_INTR_VBUSERROR;
0355         if (err) {
0356             /*
0357              * The Mentor core doesn't debounce VBUS as needed
0358              * to cope with device connect current spikes. This
0359              * means it's not uncommon for bus-powered devices
0360              * to get VBUS errors during enumeration.
0361              *
0362              * This is a workaround, but newer RTL from Mentor
0363              * seems to allow a better one: "re"-starting sessions
0364              * without waiting for VBUS to stop registering in
0365              * devctl.
0366              */
0367             musb->int_usb &= ~MUSB_INTR_VBUSERROR;
0368             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
0369             dsps_mod_timer_optional(glue);
0370             WARNING("VBUS error workaround (delay coming)\n");
0371         } else if (drvvbus) {
0372             MUSB_HST_MODE(musb);
0373             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0374             dsps_mod_timer_optional(glue);
0375         } else {
0376             musb->is_active = 0;
0377             MUSB_DEV_MODE(musb);
0378             musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0379         }
0380 
0381         /* NOTE: this must complete power-on within 100 ms. */
0382         dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
0383                 drvvbus ? "on" : "off",
0384                 usb_otg_state_string(musb->xceiv->otg->state),
0385                 err ? " ERROR" : "",
0386                 devctl);
0387         ret = IRQ_HANDLED;
0388     }
0389 
0390     if (musb->int_tx || musb->int_rx || musb->int_usb)
0391         ret |= musb_interrupt(musb);
0392 
0393     /* Poll for ID change and connect */
0394     switch (musb->xceiv->otg->state) {
0395     case OTG_STATE_B_IDLE:
0396     case OTG_STATE_A_WAIT_BCON:
0397         dsps_mod_timer_optional(glue);
0398         break;
0399     default:
0400         break;
0401     }
0402 
0403 out:
0404     spin_unlock_irqrestore(&musb->lock, flags);
0405 
0406     return ret;
0407 }
0408 
0409 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
0410 {
0411     struct dentry *root;
0412     char buf[128];
0413 
0414     sprintf(buf, "%s.dsps", dev_name(musb->controller));
0415     root = debugfs_create_dir(buf, usb_debug_root);
0416     glue->dbgfs_root = root;
0417 
0418     glue->regset.regs = dsps_musb_regs;
0419     glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
0420     glue->regset.base = musb->ctrl_base;
0421 
0422     debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
0423     return 0;
0424 }
0425 
0426 static int dsps_musb_init(struct musb *musb)
0427 {
0428     struct device *dev = musb->controller;
0429     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0430     struct platform_device *parent = to_platform_device(dev->parent);
0431     const struct dsps_musb_wrapper *wrp = glue->wrp;
0432     void __iomem *reg_base;
0433     struct resource *r;
0434     u32 rev, val;
0435     int ret;
0436 
0437     r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
0438     reg_base = devm_ioremap_resource(dev, r);
0439     if (IS_ERR(reg_base))
0440         return PTR_ERR(reg_base);
0441     musb->ctrl_base = reg_base;
0442 
0443     /* NOP driver needs change if supporting dual instance */
0444     musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
0445     if (IS_ERR(musb->xceiv))
0446         return PTR_ERR(musb->xceiv);
0447 
0448     musb->phy = devm_phy_get(dev->parent, "usb2-phy");
0449 
0450     /* Returns zero if e.g. not clocked */
0451     rev = musb_readl(reg_base, wrp->revision);
0452     if (!rev)
0453         return -ENODEV;
0454 
0455     if (IS_ERR(musb->phy))  {
0456         musb->phy = NULL;
0457     } else {
0458         ret = phy_init(musb->phy);
0459         if (ret < 0)
0460             return ret;
0461         ret = phy_power_on(musb->phy);
0462         if (ret) {
0463             phy_exit(musb->phy);
0464             return ret;
0465         }
0466     }
0467 
0468     timer_setup(&musb->dev_timer, otg_timer, 0);
0469 
0470     /* Reset the musb */
0471     musb_writel(reg_base, wrp->control, (1 << wrp->reset));
0472 
0473     musb->isr = dsps_interrupt;
0474 
0475     /* reset the otgdisable bit, needed for host mode to work */
0476     val = musb_readl(reg_base, wrp->phy_utmi);
0477     val &= ~(1 << wrp->otg_disable);
0478     musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
0479 
0480     /*
0481      *  Check whether the dsps version has babble control enabled.
0482      * In latest silicon revision the babble control logic is enabled.
0483      * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
0484      * logic enabled.
0485      */
0486     val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
0487     if (val & MUSB_BABBLE_RCV_DISABLE) {
0488         glue->sw_babble_enabled = true;
0489         val |= MUSB_BABBLE_SW_SESSION_CTRL;
0490         musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
0491     }
0492 
0493     dsps_mod_timer(glue, -1);
0494 
0495     return dsps_musb_dbg_init(musb, glue);
0496 }
0497 
0498 static int dsps_musb_exit(struct musb *musb)
0499 {
0500     struct device *dev = musb->controller;
0501     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0502 
0503     del_timer_sync(&musb->dev_timer);
0504     phy_power_off(musb->phy);
0505     phy_exit(musb->phy);
0506     debugfs_remove_recursive(glue->dbgfs_root);
0507 
0508     return 0;
0509 }
0510 
0511 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
0512 {
0513     struct device *dev = musb->controller;
0514     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0515     const struct dsps_musb_wrapper *wrp = glue->wrp;
0516     void __iomem *ctrl_base = musb->ctrl_base;
0517     u32 reg;
0518 
0519     reg = musb_readl(ctrl_base, wrp->mode);
0520 
0521     switch (mode) {
0522     case MUSB_HOST:
0523         reg &= ~(1 << wrp->iddig);
0524 
0525         /*
0526          * if we're setting mode to host-only or device-only, we're
0527          * going to ignore whatever the PHY sends us and just force
0528          * ID pin status by SW
0529          */
0530         reg |= (1 << wrp->iddig_mux);
0531 
0532         musb_writel(ctrl_base, wrp->mode, reg);
0533         musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
0534         break;
0535     case MUSB_PERIPHERAL:
0536         reg |= (1 << wrp->iddig);
0537 
0538         /*
0539          * if we're setting mode to host-only or device-only, we're
0540          * going to ignore whatever the PHY sends us and just force
0541          * ID pin status by SW
0542          */
0543         reg |= (1 << wrp->iddig_mux);
0544 
0545         musb_writel(ctrl_base, wrp->mode, reg);
0546         break;
0547     case MUSB_OTG:
0548         musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
0549         break;
0550     default:
0551         dev_err(glue->dev, "unsupported mode %d\n", mode);
0552         return -EINVAL;
0553     }
0554 
0555     return 0;
0556 }
0557 
0558 static bool dsps_sw_babble_control(struct musb *musb)
0559 {
0560     u8 babble_ctl;
0561     bool session_restart =  false;
0562 
0563     babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
0564     dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
0565         babble_ctl);
0566     /*
0567      * check line monitor flag to check whether babble is
0568      * due to noise
0569      */
0570     dev_dbg(musb->controller, "STUCK_J is %s\n",
0571         babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
0572 
0573     if (babble_ctl & MUSB_BABBLE_STUCK_J) {
0574         int timeout = 10;
0575 
0576         /*
0577          * babble is due to noise, then set transmit idle (d7 bit)
0578          * to resume normal operation
0579          */
0580         babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
0581         babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
0582         musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
0583 
0584         /* wait till line monitor flag cleared */
0585         dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
0586         do {
0587             babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
0588             udelay(1);
0589         } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
0590 
0591         /* check whether stuck_at_j bit cleared */
0592         if (babble_ctl & MUSB_BABBLE_STUCK_J) {
0593             /*
0594              * real babble condition has occurred
0595              * restart the controller to start the
0596              * session again
0597              */
0598             dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
0599                 babble_ctl);
0600             session_restart = true;
0601         }
0602     } else {
0603         session_restart = true;
0604     }
0605 
0606     return session_restart;
0607 }
0608 
0609 static int dsps_musb_recover(struct musb *musb)
0610 {
0611     struct device *dev = musb->controller;
0612     struct dsps_glue *glue = dev_get_drvdata(dev->parent);
0613     int session_restart = 0;
0614 
0615     if (glue->sw_babble_enabled)
0616         session_restart = dsps_sw_babble_control(musb);
0617     else
0618         session_restart = 1;
0619 
0620     return session_restart ? 0 : -EPIPE;
0621 }
0622 
0623 /* Similar to am35x, dm81xx support only 32-bit read operation */
0624 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
0625 {
0626     void __iomem *fifo = hw_ep->fifo;
0627 
0628     if (len >= 4) {
0629         ioread32_rep(fifo, dst, len >> 2);
0630         dst += len & ~0x03;
0631         len &= 0x03;
0632     }
0633 
0634     /* Read any remaining 1 to 3 bytes */
0635     if (len > 0) {
0636         u32 val = musb_readl(fifo, 0);
0637         memcpy(dst, &val, len);
0638     }
0639 }
0640 
0641 #ifdef CONFIG_USB_TI_CPPI41_DMA
0642 static void dsps_dma_controller_callback(struct dma_controller *c)
0643 {
0644     struct musb *musb = c->musb;
0645     struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
0646     void __iomem *usbss_base = glue->usbss_base;
0647     u32 status;
0648 
0649     status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
0650     if (status & USBSS_IRQ_PD_COMP)
0651         musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
0652 }
0653 
0654 static struct dma_controller *
0655 dsps_dma_controller_create(struct musb *musb, void __iomem *base)
0656 {
0657     struct dma_controller *controller;
0658     struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
0659     void __iomem *usbss_base = glue->usbss_base;
0660 
0661     controller = cppi41_dma_controller_create(musb, base);
0662     if (IS_ERR_OR_NULL(controller))
0663         return controller;
0664 
0665     musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
0666     controller->dma_callback = dsps_dma_controller_callback;
0667 
0668     return controller;
0669 }
0670 
0671 #ifdef CONFIG_PM_SLEEP
0672 static void dsps_dma_controller_suspend(struct dsps_glue *glue)
0673 {
0674     void __iomem *usbss_base = glue->usbss_base;
0675 
0676     musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
0677 }
0678 
0679 static void dsps_dma_controller_resume(struct dsps_glue *glue)
0680 {
0681     void __iomem *usbss_base = glue->usbss_base;
0682 
0683     musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
0684 }
0685 #endif
0686 #else /* CONFIG_USB_TI_CPPI41_DMA */
0687 #ifdef CONFIG_PM_SLEEP
0688 static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
0689 static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
0690 #endif
0691 #endif /* CONFIG_USB_TI_CPPI41_DMA */
0692 
0693 static struct musb_platform_ops dsps_ops = {
0694     .quirks     = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
0695     .init       = dsps_musb_init,
0696     .exit       = dsps_musb_exit,
0697 
0698 #ifdef CONFIG_USB_TI_CPPI41_DMA
0699     .dma_init   = dsps_dma_controller_create,
0700     .dma_exit   = cppi41_dma_controller_destroy,
0701 #endif
0702     .enable     = dsps_musb_enable,
0703     .disable    = dsps_musb_disable,
0704 
0705     .set_mode   = dsps_musb_set_mode,
0706     .recover    = dsps_musb_recover,
0707     .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
0708 };
0709 
0710 static u64 musb_dmamask = DMA_BIT_MASK(32);
0711 
0712 static int get_int_prop(struct device_node *dn, const char *s)
0713 {
0714     int ret;
0715     u32 val;
0716 
0717     ret = of_property_read_u32(dn, s, &val);
0718     if (ret)
0719         return 0;
0720     return val;
0721 }
0722 
0723 static int dsps_create_musb_pdev(struct dsps_glue *glue,
0724         struct platform_device *parent)
0725 {
0726     struct musb_hdrc_platform_data pdata;
0727     struct resource resources[2];
0728     struct resource *res;
0729     struct device *dev = &parent->dev;
0730     struct musb_hdrc_config *config;
0731     struct platform_device *musb;
0732     struct device_node *dn = parent->dev.of_node;
0733     int ret, val;
0734 
0735     memset(resources, 0, sizeof(resources));
0736     res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
0737     if (!res) {
0738         dev_err(dev, "failed to get memory.\n");
0739         return -EINVAL;
0740     }
0741     resources[0] = *res;
0742 
0743     ret = platform_get_irq_byname(parent, "mc");
0744     if (ret < 0)
0745         return ret;
0746 
0747     resources[1].start = ret;
0748     resources[1].end = ret;
0749     resources[1].flags = IORESOURCE_IRQ | irq_get_trigger_type(ret);
0750     resources[1].name = "mc";
0751 
0752     /* allocate the child platform device */
0753     musb = platform_device_alloc("musb-hdrc",
0754             (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
0755     if (!musb) {
0756         dev_err(dev, "failed to allocate musb device\n");
0757         return -ENOMEM;
0758     }
0759 
0760     musb->dev.parent        = dev;
0761     musb->dev.dma_mask      = &musb_dmamask;
0762     musb->dev.coherent_dma_mask = musb_dmamask;
0763     device_set_of_node_from_dev(&musb->dev, &parent->dev);
0764 
0765     glue->musb = musb;
0766 
0767     ret = platform_device_add_resources(musb, resources,
0768             ARRAY_SIZE(resources));
0769     if (ret) {
0770         dev_err(dev, "failed to add resources\n");
0771         goto err;
0772     }
0773 
0774     config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
0775     if (!config) {
0776         ret = -ENOMEM;
0777         goto err;
0778     }
0779     pdata.config = config;
0780     pdata.platform_ops = &dsps_ops;
0781 
0782     config->num_eps = get_int_prop(dn, "mentor,num-eps");
0783     config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
0784     config->host_port_deassert_reset_at_resume = 1;
0785     pdata.mode = musb_get_mode(dev);
0786     /* DT keeps this entry in mA, musb expects it as per USB spec */
0787     pdata.power = get_int_prop(dn, "mentor,power") / 2;
0788 
0789     ret = of_property_read_u32(dn, "mentor,multipoint", &val);
0790     if (!ret && val)
0791         config->multipoint = true;
0792 
0793     config->maximum_speed = usb_get_maximum_speed(&parent->dev);
0794     switch (config->maximum_speed) {
0795     case USB_SPEED_LOW:
0796     case USB_SPEED_FULL:
0797         break;
0798     case USB_SPEED_SUPER:
0799         dev_warn(dev, "ignore incorrect maximum_speed "
0800                 "(super-speed) setting in dts");
0801         fallthrough;
0802     default:
0803         config->maximum_speed = USB_SPEED_HIGH;
0804     }
0805 
0806     ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
0807     if (ret) {
0808         dev_err(dev, "failed to add platform_data\n");
0809         goto err;
0810     }
0811 
0812     ret = platform_device_add(musb);
0813     if (ret) {
0814         dev_err(dev, "failed to register musb device\n");
0815         goto err;
0816     }
0817     return 0;
0818 
0819 err:
0820     platform_device_put(musb);
0821     return ret;
0822 }
0823 
0824 static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
0825 {
0826     struct dsps_glue *glue = priv;
0827     struct musb *musb = platform_get_drvdata(glue->musb);
0828 
0829     if (!musb)
0830         return IRQ_NONE;
0831 
0832     dev_dbg(glue->dev, "VBUS interrupt\n");
0833     dsps_mod_timer(glue, 0);
0834 
0835     return IRQ_HANDLED;
0836 }
0837 
0838 static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
0839                     struct dsps_glue *glue)
0840 {
0841     int error;
0842 
0843     glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
0844     if (glue->vbus_irq == -EPROBE_DEFER)
0845         return -EPROBE_DEFER;
0846 
0847     if (glue->vbus_irq <= 0) {
0848         glue->vbus_irq = 0;
0849         return 0;
0850     }
0851 
0852     error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
0853                       NULL, dsps_vbus_threaded_irq,
0854                       IRQF_ONESHOT,
0855                       "vbus", glue);
0856     if (error) {
0857         glue->vbus_irq = 0;
0858         return error;
0859     }
0860     dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
0861 
0862     return 0;
0863 }
0864 
0865 static int dsps_probe(struct platform_device *pdev)
0866 {
0867     const struct of_device_id *match;
0868     const struct dsps_musb_wrapper *wrp;
0869     struct dsps_glue *glue;
0870     int ret;
0871 
0872     if (!strcmp(pdev->name, "musb-hdrc"))
0873         return -ENODEV;
0874 
0875     match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
0876     if (!match) {
0877         dev_err(&pdev->dev, "fail to get matching of_match struct\n");
0878         return -EINVAL;
0879     }
0880     wrp = match->data;
0881 
0882     if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
0883         dsps_ops.read_fifo = dsps_read_fifo32;
0884 
0885     /* allocate glue */
0886     glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
0887     if (!glue)
0888         return -ENOMEM;
0889 
0890     glue->dev = &pdev->dev;
0891     glue->wrp = wrp;
0892     glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
0893     if (!glue->usbss_base)
0894         return -ENXIO;
0895 
0896     platform_set_drvdata(pdev, glue);
0897     pm_runtime_enable(&pdev->dev);
0898     ret = dsps_create_musb_pdev(glue, pdev);
0899     if (ret)
0900         goto err;
0901 
0902     if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
0903         ret = dsps_setup_optional_vbus_irq(pdev, glue);
0904         if (ret)
0905             goto unregister_pdev;
0906     }
0907 
0908     return 0;
0909 
0910 unregister_pdev:
0911     platform_device_unregister(glue->musb);
0912 err:
0913     pm_runtime_disable(&pdev->dev);
0914     iounmap(glue->usbss_base);
0915     return ret;
0916 }
0917 
0918 static int dsps_remove(struct platform_device *pdev)
0919 {
0920     struct dsps_glue *glue = platform_get_drvdata(pdev);
0921 
0922     platform_device_unregister(glue->musb);
0923 
0924     pm_runtime_disable(&pdev->dev);
0925     iounmap(glue->usbss_base);
0926 
0927     return 0;
0928 }
0929 
0930 static const struct dsps_musb_wrapper am33xx_driver_data = {
0931     .revision       = 0x00,
0932     .control        = 0x14,
0933     .status         = 0x18,
0934     .epintr_set     = 0x38,
0935     .epintr_clear       = 0x40,
0936     .epintr_status      = 0x30,
0937     .coreintr_set       = 0x3c,
0938     .coreintr_clear     = 0x44,
0939     .coreintr_status    = 0x34,
0940     .phy_utmi       = 0xe0,
0941     .mode           = 0xe8,
0942     .tx_mode        = 0x70,
0943     .rx_mode        = 0x74,
0944     .reset          = 0,
0945     .otg_disable        = 21,
0946     .iddig          = 8,
0947     .iddig_mux      = 7,
0948     .usb_shift      = 0,
0949     .usb_mask       = 0x1ff,
0950     .usb_bitmap     = (0x1ff << 0),
0951     .drvvbus        = 8,
0952     .txep_shift     = 0,
0953     .txep_mask      = 0xffff,
0954     .txep_bitmap        = (0xffff << 0),
0955     .rxep_shift     = 16,
0956     .rxep_mask      = 0xfffe,
0957     .rxep_bitmap        = (0xfffe << 16),
0958     .poll_timeout       = 2000, /* ms */
0959 };
0960 
0961 static const struct of_device_id musb_dsps_of_match[] = {
0962     { .compatible = "ti,musb-am33xx",
0963         .data = &am33xx_driver_data, },
0964     { .compatible = "ti,musb-dm816",
0965         .data = &am33xx_driver_data, },
0966     {  },
0967 };
0968 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
0969 
0970 #ifdef CONFIG_PM_SLEEP
0971 static int dsps_suspend(struct device *dev)
0972 {
0973     struct dsps_glue *glue = dev_get_drvdata(dev);
0974     const struct dsps_musb_wrapper *wrp = glue->wrp;
0975     struct musb *musb = platform_get_drvdata(glue->musb);
0976     void __iomem *mbase;
0977     int ret;
0978 
0979     if (!musb)
0980         /* This can happen if the musb device is in -EPROBE_DEFER */
0981         return 0;
0982 
0983     ret = pm_runtime_get_sync(dev);
0984     if (ret < 0) {
0985         pm_runtime_put_noidle(dev);
0986         return ret;
0987     }
0988 
0989     del_timer_sync(&musb->dev_timer);
0990 
0991     mbase = musb->ctrl_base;
0992     glue->context.control = musb_readl(mbase, wrp->control);
0993     glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
0994     glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
0995     glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
0996     glue->context.mode = musb_readl(mbase, wrp->mode);
0997     glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
0998     glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
0999 
1000     dsps_dma_controller_suspend(glue);
1001 
1002     return 0;
1003 }
1004 
1005 static int dsps_resume(struct device *dev)
1006 {
1007     struct dsps_glue *glue = dev_get_drvdata(dev);
1008     const struct dsps_musb_wrapper *wrp = glue->wrp;
1009     struct musb *musb = platform_get_drvdata(glue->musb);
1010     void __iomem *mbase;
1011 
1012     if (!musb)
1013         return 0;
1014 
1015     dsps_dma_controller_resume(glue);
1016 
1017     mbase = musb->ctrl_base;
1018     musb_writel(mbase, wrp->control, glue->context.control);
1019     musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
1020     musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
1021     musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
1022     musb_writel(mbase, wrp->mode, glue->context.mode);
1023     musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
1024     musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
1025     if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1026         musb->port_mode == MUSB_OTG)
1027         dsps_mod_timer(glue, -1);
1028 
1029     pm_runtime_put(dev);
1030 
1031     return 0;
1032 }
1033 #endif
1034 
1035 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1036 
1037 static struct platform_driver dsps_usbss_driver = {
1038     .probe      = dsps_probe,
1039     .remove         = dsps_remove,
1040     .driver         = {
1041         .name   = "musb-dsps",
1042         .pm = &dsps_pm_ops,
1043         .of_match_table = musb_dsps_of_match,
1044     },
1045 };
1046 
1047 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1048 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1049 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1050 MODULE_LICENSE("GPL v2");
1051 
1052 module_platform_driver(dsps_usbss_driver);
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