usb/musb/musb_dma.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * MUSB OTG driver DMA controller abstraction
0004  *
0005  * Copyright 2005 Mentor Graphics Corporation
0006  * Copyright (C) 2005-2006 by Texas Instruments
0007  * Copyright (C) 2006-2007 Nokia Corporation
0008  */
0009
0010 #ifndef __MUSB_DMA_H__
0011 #define __MUSB_DMA_H__
0012
0013 struct musb_hw_ep;
0014
0015 /*
0016  * DMA Controller Abstraction
0017  *
0018  * DMA Controllers are abstracted to allow use of a variety of different
0019  * implementations of DMA, as allowed by the Inventra USB cores.  On the
0020  * host side, usbcore sets up the DMA mappings and flushes caches; on the
0021  * peripheral side, the gadget controller driver does.  Responsibilities
0022  * of a DMA controller driver include:
0023  *
0024  *  - Handling the details of moving multiple USB packets
0025  *    in cooperation with the Inventra USB core, including especially
0026  *    the correct RX side treatment of short packets and buffer-full
0027  *    states (both of which terminate transfers).
0028  *
0029  *  - Knowing the correlation between dma channels and the
0030  *    Inventra core's local endpoint resources and data direction.
0031  *
0032  *  - Maintaining a list of allocated/available channels.
0033  *
0034  *  - Updating channel status on interrupts,
0035  *    whether shared with the Inventra core or separate.
0036  */
0037
0038 #define MUSB_HSDMA_BASE     0x200
0039 #define MUSB_HSDMA_INTR     (MUSB_HSDMA_BASE + 0)
0040 #define MUSB_HSDMA_CONTROL  0x4
0041 #define MUSB_HSDMA_ADDRESS  0x8
0042 #define MUSB_HSDMA_COUNT    0xc
0043
0044 #define DMA_ADDR_INVALID    (~(dma_addr_t)0)
0045
0046 #ifdef CONFIG_MUSB_PIO_ONLY
0047 #define is_dma_capable()    (0)
0048 #else
0049 #define is_dma_capable()    (1)
0050 #endif
0051
0052 #ifdef CONFIG_USB_UX500_DMA
0053 #define musb_dma_ux500(musb)        (musb->ops->quirks & MUSB_DMA_UX500)
0054 #else
0055 #define musb_dma_ux500(musb)        0
0056 #endif
0057
0058 #ifdef CONFIG_USB_TI_CPPI41_DMA
0059 #define musb_dma_cppi41(musb)       (musb->ops->quirks & MUSB_DMA_CPPI41)
0060 #else
0061 #define musb_dma_cppi41(musb)       0
0062 #endif
0063
0064 #ifdef CONFIG_USB_TI_CPPI_DMA
0065 #define musb_dma_cppi(musb)     (musb->ops->quirks & MUSB_DMA_CPPI)
0066 #else
0067 #define musb_dma_cppi(musb)     0
0068 #endif
0069
0070 #ifdef CONFIG_USB_TUSB_OMAP_DMA
0071 #define tusb_dma_omap(musb)     (musb->ops->quirks & MUSB_DMA_TUSB_OMAP)
0072 #else
0073 #define tusb_dma_omap(musb)     0
0074 #endif
0075
0076 #ifdef CONFIG_USB_INVENTRA_DMA
0077 #define musb_dma_inventra(musb)     (musb->ops->quirks & MUSB_DMA_INVENTRA)
0078 #else
0079 #define musb_dma_inventra(musb)     0
0080 #endif
0081
0082 #if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
0083 #define is_cppi_enabled(musb)       \
0084     (musb_dma_cppi(musb) || musb_dma_cppi41(musb))
0085 #else
0086 #define is_cppi_enabled(musb)   0
0087 #endif
0088
0089 /*
0090  * DMA channel status ... updated by the dma controller driver whenever that
0091  * status changes, and protected by the overall controller spinlock.
0092  */
0093 enum dma_channel_status {
0094     /* unallocated */
0095     MUSB_DMA_STATUS_UNKNOWN,
0096     /* allocated ... but not busy, no errors */
0097     MUSB_DMA_STATUS_FREE,
0098     /* busy ... transactions are active */
0099     MUSB_DMA_STATUS_BUSY,
0100     /* transaction(s) aborted due to ... dma or memory bus error */
0101     MUSB_DMA_STATUS_BUS_ABORT,
0102     /* transaction(s) aborted due to ... core error or USB fault */
0103     MUSB_DMA_STATUS_CORE_ABORT
0104 };
0105
0106 struct dma_controller;
0107
0108 /**
0109  * struct dma_channel - A DMA channel.
0110  * @private_data: channel-private data
0111  * @max_len: the maximum number of bytes the channel can move in one
0112  *  transaction (typically representing many USB maximum-sized packets)
0113  * @actual_len: how many bytes have been transferred
0114  * @status: current channel status (updated e.g. on interrupt)
0115  * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
0116  *
0117  * channels are associated with an endpoint for the duration of at least
0118  * one usb transfer.
0119  */
0120 struct dma_channel {
0121     void            *private_data;
0122     /* FIXME not void* private_data, but a dma_controller * */
0123     size_t          max_len;
0124     size_t          actual_len;
0125     enum dma_channel_status status;
0126     bool            desired_mode;
0127     bool            rx_packet_done;
0128 };
0129
0130 /*
0131  * dma_channel_status - return status of dma channel
0132  * @c: the channel
0133  *
0134  * Returns the software's view of the channel status.  If that status is BUSY
0135  * then it's possible that the hardware has completed (or aborted) a transfer,
0136  * so the driver needs to update that status.
0137  */
0138 static inline enum dma_channel_status
0139 dma_channel_status(struct dma_channel *c)
0140 {
0141     return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
0142 }
0143
0144 /**
0145  * struct dma_controller - A DMA Controller.
0146  * @musb: the usb controller
0147  * @start: call this to start a DMA controller;
0148  *  return 0 on success, else negative errno
0149  * @stop: call this to stop a DMA controller
0150  *  return 0 on success, else negative errno
0151  * @channel_alloc: call this to allocate a DMA channel
0152  * @channel_release: call this to release a DMA channel
0153  * @channel_abort: call this to abort a pending DMA transaction,
0154  *  returning it to FREE (but allocated) state
0155  * @dma_callback: invoked on DMA completion, useful to run platform
0156  *  code such IRQ acknowledgment.
0157  *
0158  * Controllers manage dma channels.
0159  */
0160 struct dma_controller {
0161     struct musb *musb;
0162     struct dma_channel  *(*channel_alloc)(struct dma_controller *,
0163                     struct musb_hw_ep *, u8 is_tx);
0164     void            (*channel_release)(struct dma_channel *);
0165     int         (*channel_program)(struct dma_channel *channel,
0166                             u16 maxpacket, u8 mode,
0167                             dma_addr_t dma_addr,
0168                             u32 length);
0169     int         (*channel_abort)(struct dma_channel *);
0170     int         (*is_compatible)(struct dma_channel *channel,
0171                             u16 maxpacket,
0172                             void *buf, u32 length);
0173     void            (*dma_callback)(struct dma_controller *);
0174 };
0175
0176 /* called after channel_program(), may indicate a fault */
0177 extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
0178
0179 #ifdef CONFIG_MUSB_PIO_ONLY
0180 static inline struct dma_controller *
0181 musb_dma_controller_create(struct musb *m, void __iomem *io)
0182 {
0183     return NULL;
0184 }
0185
0186 static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
0187
0188 #else
0189
0190 extern struct dma_controller *
0191 (*musb_dma_controller_create)(struct musb *, void __iomem *);
0192
0193 extern void (*musb_dma_controller_destroy)(struct dma_controller *);
0194 #endif
0195
0196 /* Platform specific DMA functions */
0197 extern struct dma_controller *
0198 musbhs_dma_controller_create(struct musb *musb, void __iomem *base);
0199 extern void musbhs_dma_controller_destroy(struct dma_controller *c);
0200 extern struct dma_controller *
0201 musbhs_dma_controller_create_noirq(struct musb *musb, void __iomem *base);
0202 extern irqreturn_t dma_controller_irq(int irq, void *private_data);
0203
0204 extern struct dma_controller *
0205 tusb_dma_controller_create(struct musb *musb, void __iomem *base);
0206 extern void tusb_dma_controller_destroy(struct dma_controller *c);
0207
0208 extern struct dma_controller *
0209 cppi_dma_controller_create(struct musb *musb, void __iomem *base);
0210 extern void cppi_dma_controller_destroy(struct dma_controller *c);
0211
0212 extern struct dma_controller *
0213 cppi41_dma_controller_create(struct musb *musb, void __iomem *base);
0214 extern void cppi41_dma_controller_destroy(struct dma_controller *c);
0215
0216 extern struct dma_controller *
0217 ux500_dma_controller_create(struct musb *musb, void __iomem *base);
0218 extern void ux500_dma_controller_destroy(struct dma_controller *c);
0219
0220 #endif  /* __MUSB_DMA_H__ */