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0010 #include <linux/clk.h>
0011 #include <linux/dma-mapping.h>
0012 #include <linux/module.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/usb/role.h>
0016 #include <linux/usb/usb_phy_generic.h>
0017 #include "musb_core.h"
0018 #include "musb_dma.h"
0019
0020 #define USB_L1INTS 0x00a0
0021 #define USB_L1INTM 0x00a4
0022 #define MTK_MUSB_TXFUNCADDR 0x0480
0023
0024
0025 #define MUSB_RXTOG 0x80
0026 #define MUSB_RXTOGEN 0x82
0027 #define MUSB_TXTOG 0x84
0028 #define MUSB_TXTOGEN 0x86
0029 #define MTK_TOGGLE_EN GENMASK(15, 0)
0030
0031 #define TX_INT_STATUS BIT(0)
0032 #define RX_INT_STATUS BIT(1)
0033 #define USBCOM_INT_STATUS BIT(2)
0034 #define DMA_INT_STATUS BIT(3)
0035
0036 #define DMA_INTR_STATUS_MSK GENMASK(7, 0)
0037 #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24)
0038
0039 #define MTK_MUSB_CLKS_NUM 3
0040
0041 struct mtk_glue {
0042 struct device *dev;
0043 struct musb *musb;
0044 struct platform_device *musb_pdev;
0045 struct platform_device *usb_phy;
0046 struct phy *phy;
0047 struct usb_phy *xceiv;
0048 enum phy_mode phy_mode;
0049 struct clk_bulk_data clks[MTK_MUSB_CLKS_NUM];
0050 enum usb_role role;
0051 struct usb_role_switch *role_sw;
0052 };
0053
0054 static int mtk_musb_clks_get(struct mtk_glue *glue)
0055 {
0056 struct device *dev = glue->dev;
0057
0058 glue->clks[0].id = "main";
0059 glue->clks[1].id = "mcu";
0060 glue->clks[2].id = "univpll";
0061
0062 return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks);
0063 }
0064
0065 static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role)
0066 {
0067 struct musb *musb = glue->musb;
0068 u8 devctl = readb(musb->mregs + MUSB_DEVCTL);
0069 enum usb_role new_role;
0070
0071 if (role == glue->role)
0072 return 0;
0073
0074 switch (role) {
0075 case USB_ROLE_HOST:
0076 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0077 glue->phy_mode = PHY_MODE_USB_HOST;
0078 new_role = USB_ROLE_HOST;
0079 if (glue->role == USB_ROLE_NONE)
0080 phy_power_on(glue->phy);
0081
0082 devctl |= MUSB_DEVCTL_SESSION;
0083 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
0084 MUSB_HST_MODE(musb);
0085 break;
0086 case USB_ROLE_DEVICE:
0087 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0088 glue->phy_mode = PHY_MODE_USB_DEVICE;
0089 new_role = USB_ROLE_DEVICE;
0090 devctl &= ~MUSB_DEVCTL_SESSION;
0091 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
0092 if (glue->role == USB_ROLE_NONE)
0093 phy_power_on(glue->phy);
0094
0095 MUSB_DEV_MODE(musb);
0096 break;
0097 case USB_ROLE_NONE:
0098 glue->phy_mode = PHY_MODE_USB_OTG;
0099 new_role = USB_ROLE_NONE;
0100 devctl &= ~MUSB_DEVCTL_SESSION;
0101 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
0102 if (glue->role != USB_ROLE_NONE)
0103 phy_power_off(glue->phy);
0104
0105 break;
0106 default:
0107 dev_err(glue->dev, "Invalid State\n");
0108 return -EINVAL;
0109 }
0110
0111 glue->role = new_role;
0112 phy_set_mode(glue->phy, glue->phy_mode);
0113
0114 return 0;
0115 }
0116
0117 static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role)
0118 {
0119 return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role);
0120 }
0121
0122 static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw)
0123 {
0124 struct mtk_glue *glue = usb_role_switch_get_drvdata(sw);
0125
0126 return glue->role;
0127 }
0128
0129 static int mtk_otg_switch_init(struct mtk_glue *glue)
0130 {
0131 struct usb_role_switch_desc role_sx_desc = { 0 };
0132
0133 role_sx_desc.set = musb_usb_role_sx_set;
0134 role_sx_desc.get = musb_usb_role_sx_get;
0135 role_sx_desc.allow_userspace_control = true;
0136 role_sx_desc.fwnode = dev_fwnode(glue->dev);
0137 role_sx_desc.driver_data = glue;
0138 glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc);
0139
0140 return PTR_ERR_OR_ZERO(glue->role_sw);
0141 }
0142
0143 static void mtk_otg_switch_exit(struct mtk_glue *glue)
0144 {
0145 return usb_role_switch_unregister(glue->role_sw);
0146 }
0147
0148 static irqreturn_t generic_interrupt(int irq, void *__hci)
0149 {
0150 unsigned long flags;
0151 irqreturn_t retval = IRQ_NONE;
0152 struct musb *musb = __hci;
0153
0154 spin_lock_irqsave(&musb->lock, flags);
0155 musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB);
0156 musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX);
0157 musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX);
0158
0159 if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
0160
0161 musb_ep_select(musb->mregs, 0);
0162 musb_writeb(musb->mregs, MUSB_FADDR, 0);
0163 }
0164
0165 if (musb->int_usb || musb->int_tx || musb->int_rx)
0166 retval = musb_interrupt(musb);
0167
0168 spin_unlock_irqrestore(&musb->lock, flags);
0169
0170 return retval;
0171 }
0172
0173 static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id)
0174 {
0175 irqreturn_t retval = IRQ_NONE;
0176 struct musb *musb = (struct musb *)dev_id;
0177 u32 l1_ints;
0178
0179 l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
0180 musb_readl(musb->mregs, USB_L1INTM);
0181
0182 if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS))
0183 retval = generic_interrupt(irq, musb);
0184
0185 #if defined(CONFIG_USB_INVENTRA_DMA)
0186 if (l1_ints & DMA_INT_STATUS)
0187 retval = dma_controller_irq(irq, musb->dma_controller);
0188 #endif
0189 return retval;
0190 }
0191
0192 static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset)
0193 {
0194 return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum;
0195 }
0196
0197 static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset)
0198 {
0199 u8 data;
0200
0201
0202 data = musb_readb(addr, offset);
0203 musb_writeb(addr, offset, data);
0204 return data;
0205 }
0206
0207 static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset)
0208 {
0209 u16 data;
0210
0211
0212 data = musb_readw(addr, offset);
0213 musb_writew(addr, offset, data);
0214 return data;
0215 }
0216
0217 static int mtk_musb_set_mode(struct musb *musb, u8 mode)
0218 {
0219 struct device *dev = musb->controller;
0220 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
0221 enum phy_mode new_mode;
0222 enum usb_role new_role;
0223
0224 switch (mode) {
0225 case MUSB_HOST:
0226 new_mode = PHY_MODE_USB_HOST;
0227 new_role = USB_ROLE_HOST;
0228 break;
0229 case MUSB_PERIPHERAL:
0230 new_mode = PHY_MODE_USB_DEVICE;
0231 new_role = USB_ROLE_DEVICE;
0232 break;
0233 case MUSB_OTG:
0234 new_mode = PHY_MODE_USB_OTG;
0235 new_role = USB_ROLE_NONE;
0236 break;
0237 default:
0238 dev_err(glue->dev, "Invalid mode request\n");
0239 return -EINVAL;
0240 }
0241
0242 if (glue->phy_mode == new_mode)
0243 return 0;
0244
0245 if (musb->port_mode != MUSB_OTG) {
0246 dev_err(glue->dev, "Does not support changing modes\n");
0247 return -EINVAL;
0248 }
0249
0250 mtk_otg_switch_set(glue, new_role);
0251 return 0;
0252 }
0253
0254 static int mtk_musb_init(struct musb *musb)
0255 {
0256 struct device *dev = musb->controller;
0257 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
0258 int ret;
0259
0260 glue->musb = musb;
0261 musb->phy = glue->phy;
0262 musb->xceiv = glue->xceiv;
0263 musb->is_host = false;
0264 musb->isr = mtk_musb_interrupt;
0265
0266
0267 musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN);
0268 musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN);
0269
0270 if (musb->port_mode == MUSB_OTG) {
0271 ret = mtk_otg_switch_init(glue);
0272 if (ret)
0273 return ret;
0274 }
0275
0276 ret = phy_init(glue->phy);
0277 if (ret)
0278 goto err_phy_init;
0279
0280 ret = phy_power_on(glue->phy);
0281 if (ret)
0282 goto err_phy_power_on;
0283
0284 phy_set_mode(glue->phy, glue->phy_mode);
0285
0286 #if defined(CONFIG_USB_INVENTRA_DMA)
0287 musb_writel(musb->mregs, MUSB_HSDMA_INTR,
0288 DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK);
0289 #endif
0290 musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS |
0291 USBCOM_INT_STATUS | DMA_INT_STATUS);
0292 return 0;
0293
0294 err_phy_power_on:
0295 phy_exit(glue->phy);
0296 err_phy_init:
0297 mtk_otg_switch_exit(glue);
0298 return ret;
0299 }
0300
0301 static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out)
0302 {
0303 struct musb *musb = qh->hw_ep->musb;
0304 u8 epnum = qh->hw_ep->epnum;
0305 u16 toggle;
0306
0307 toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG);
0308 return toggle & (1 << epnum);
0309 }
0310
0311 static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb)
0312 {
0313 struct musb *musb = qh->hw_ep->musb;
0314 u8 epnum = qh->hw_ep->epnum;
0315 u16 value, toggle;
0316
0317 toggle = usb_gettoggle(urb->dev, qh->epnum, is_out);
0318
0319 if (is_out) {
0320 value = musb_readw(musb->mregs, MUSB_TXTOG);
0321 value |= toggle << epnum;
0322 musb_writew(musb->mregs, MUSB_TXTOG, value);
0323 } else {
0324 value = musb_readw(musb->mregs, MUSB_RXTOG);
0325 value |= toggle << epnum;
0326 musb_writew(musb->mregs, MUSB_RXTOG, value);
0327 }
0328
0329 return 0;
0330 }
0331
0332 static int mtk_musb_exit(struct musb *musb)
0333 {
0334 struct device *dev = musb->controller;
0335 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
0336
0337 mtk_otg_switch_exit(glue);
0338 phy_power_off(glue->phy);
0339 phy_exit(glue->phy);
0340 clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
0341
0342 pm_runtime_put_sync(dev);
0343 pm_runtime_disable(dev);
0344 return 0;
0345 }
0346
0347 static const struct musb_platform_ops mtk_musb_ops = {
0348 .quirks = MUSB_DMA_INVENTRA,
0349 .init = mtk_musb_init,
0350 .get_toggle = mtk_musb_get_toggle,
0351 .set_toggle = mtk_musb_set_toggle,
0352 .exit = mtk_musb_exit,
0353 #ifdef CONFIG_USB_INVENTRA_DMA
0354 .dma_init = musbhs_dma_controller_create_noirq,
0355 .dma_exit = musbhs_dma_controller_destroy,
0356 #endif
0357 .clearb = mtk_musb_clearb,
0358 .clearw = mtk_musb_clearw,
0359 .busctl_offset = mtk_musb_busctl_offset,
0360 .set_mode = mtk_musb_set_mode,
0361 };
0362
0363 #define MTK_MUSB_MAX_EP_NUM 8
0364 #define MTK_MUSB_RAM_BITS 11
0365
0366 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
0367 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
0368 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
0369 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
0370 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
0371 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
0372 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
0373 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
0374 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
0375 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
0376 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
0377 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, },
0378 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, },
0379 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
0380 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, },
0381 };
0382
0383 static const struct musb_hdrc_config mtk_musb_hdrc_config = {
0384 .fifo_cfg = mtk_musb_mode_cfg,
0385 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
0386 .multipoint = true,
0387 .dyn_fifo = true,
0388 .num_eps = MTK_MUSB_MAX_EP_NUM,
0389 .ram_bits = MTK_MUSB_RAM_BITS,
0390 };
0391
0392 static const struct platform_device_info mtk_dev_info = {
0393 .name = "musb-hdrc",
0394 .id = PLATFORM_DEVID_AUTO,
0395 .dma_mask = DMA_BIT_MASK(32),
0396 };
0397
0398 static int mtk_musb_probe(struct platform_device *pdev)
0399 {
0400 struct musb_hdrc_platform_data *pdata;
0401 struct mtk_glue *glue;
0402 struct platform_device_info pinfo;
0403 struct device *dev = &pdev->dev;
0404 struct device_node *np = dev->of_node;
0405 int ret;
0406
0407 glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
0408 if (!glue)
0409 return -ENOMEM;
0410
0411 glue->dev = dev;
0412 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
0413 if (!pdata)
0414 return -ENOMEM;
0415
0416 ret = of_platform_populate(np, NULL, NULL, dev);
0417 if (ret) {
0418 dev_err(dev, "failed to create child devices at %p\n", np);
0419 return ret;
0420 }
0421
0422 ret = mtk_musb_clks_get(glue);
0423 if (ret)
0424 return ret;
0425
0426 pdata->config = &mtk_musb_hdrc_config;
0427 pdata->platform_ops = &mtk_musb_ops;
0428 pdata->mode = usb_get_dr_mode(dev);
0429
0430 if (IS_ENABLED(CONFIG_USB_MUSB_HOST))
0431 pdata->mode = USB_DR_MODE_HOST;
0432 else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET))
0433 pdata->mode = USB_DR_MODE_PERIPHERAL;
0434
0435 switch (pdata->mode) {
0436 case USB_DR_MODE_HOST:
0437 glue->phy_mode = PHY_MODE_USB_HOST;
0438 glue->role = USB_ROLE_HOST;
0439 break;
0440 case USB_DR_MODE_PERIPHERAL:
0441 glue->phy_mode = PHY_MODE_USB_DEVICE;
0442 glue->role = USB_ROLE_DEVICE;
0443 break;
0444 case USB_DR_MODE_OTG:
0445 glue->phy_mode = PHY_MODE_USB_OTG;
0446 glue->role = USB_ROLE_NONE;
0447 break;
0448 default:
0449 dev_err(&pdev->dev, "Error 'dr_mode' property\n");
0450 return -EINVAL;
0451 }
0452
0453 glue->phy = devm_of_phy_get_by_index(dev, np, 0);
0454 if (IS_ERR(glue->phy)) {
0455 dev_err(dev, "fail to getting phy %ld\n",
0456 PTR_ERR(glue->phy));
0457 return PTR_ERR(glue->phy);
0458 }
0459
0460 glue->usb_phy = usb_phy_generic_register();
0461 if (IS_ERR(glue->usb_phy)) {
0462 dev_err(dev, "fail to registering usb-phy %ld\n",
0463 PTR_ERR(glue->usb_phy));
0464 return PTR_ERR(glue->usb_phy);
0465 }
0466
0467 glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
0468 if (IS_ERR(glue->xceiv)) {
0469 ret = PTR_ERR(glue->xceiv);
0470 dev_err(dev, "fail to getting usb-phy %d\n", ret);
0471 goto err_unregister_usb_phy;
0472 }
0473
0474 platform_set_drvdata(pdev, glue);
0475 pm_runtime_enable(dev);
0476 pm_runtime_get_sync(dev);
0477
0478 ret = clk_bulk_prepare_enable(MTK_MUSB_CLKS_NUM, glue->clks);
0479 if (ret)
0480 goto err_enable_clk;
0481
0482 pinfo = mtk_dev_info;
0483 pinfo.parent = dev;
0484 pinfo.res = pdev->resource;
0485 pinfo.num_res = pdev->num_resources;
0486 pinfo.data = pdata;
0487 pinfo.size_data = sizeof(*pdata);
0488 pinfo.fwnode = of_fwnode_handle(np);
0489 pinfo.of_node_reused = true;
0490
0491 glue->musb_pdev = platform_device_register_full(&pinfo);
0492 if (IS_ERR(glue->musb_pdev)) {
0493 ret = PTR_ERR(glue->musb_pdev);
0494 dev_err(dev, "failed to register musb device: %d\n", ret);
0495 goto err_device_register;
0496 }
0497
0498 return 0;
0499
0500 err_device_register:
0501 clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
0502 err_enable_clk:
0503 pm_runtime_put_sync(dev);
0504 pm_runtime_disable(dev);
0505 err_unregister_usb_phy:
0506 usb_phy_generic_unregister(glue->usb_phy);
0507 return ret;
0508 }
0509
0510 static int mtk_musb_remove(struct platform_device *pdev)
0511 {
0512 struct mtk_glue *glue = platform_get_drvdata(pdev);
0513 struct platform_device *usb_phy = glue->usb_phy;
0514
0515 platform_device_unregister(glue->musb_pdev);
0516 usb_phy_generic_unregister(usb_phy);
0517
0518 return 0;
0519 }
0520
0521 #ifdef CONFIG_OF
0522 static const struct of_device_id mtk_musb_match[] = {
0523 {.compatible = "mediatek,mtk-musb",},
0524 {},
0525 };
0526 MODULE_DEVICE_TABLE(of, mtk_musb_match);
0527 #endif
0528
0529 static struct platform_driver mtk_musb_driver = {
0530 .probe = mtk_musb_probe,
0531 .remove = mtk_musb_remove,
0532 .driver = {
0533 .name = "musb-mtk",
0534 .of_match_table = of_match_ptr(mtk_musb_match),
0535 },
0536 };
0537
0538 module_platform_driver(mtk_musb_driver);
0539
0540 MODULE_DESCRIPTION("MediaTek MUSB Glue Layer");
0541 MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>");
0542 MODULE_LICENSE("GPL v2");