usb/musb/jz4740.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Ingenic JZ4740 "glue layer"
0004  *
0005  * Copyright (C) 2013, Apelete Seketeli <apelete@seketeli.net>
0006  */
0007
0008 #include <linux/clk.h>
0009 #include <linux/dma-mapping.h>
0010 #include <linux/errno.h>
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/of_device.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/usb/role.h>
0016 #include <linux/usb/usb_phy_generic.h>
0017
0018 #include "musb_core.h"
0019
0020 struct jz4740_glue {
0021     struct platform_device  *pdev;
0022     struct musb     *musb;
0023     struct clk      *clk;
0024     struct usb_role_switch  *role_sw;
0025 };
0026
0027 static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
0028 {
0029     unsigned long   flags;
0030     irqreturn_t retval = IRQ_NONE, retval_dma = IRQ_NONE;
0031     struct musb *musb = __hci;
0032
0033     if (IS_ENABLED(CONFIG_USB_INVENTRA_DMA) && musb->dma_controller)
0034         retval_dma = dma_controller_irq(irq, musb->dma_controller);
0035
0036     spin_lock_irqsave(&musb->lock, flags);
0037
0038     musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
0039     musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
0040     musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
0041
0042     /*
0043      * The controller is gadget only, the state of the host mode IRQ bits is
0044      * undefined. Mask them to make sure that the musb driver core will
0045      * never see them set
0046      */
0047     musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
0048              MUSB_INTR_RESET | MUSB_INTR_SOF;
0049
0050     if (musb->int_usb || musb->int_tx || musb->int_rx)
0051         retval = musb_interrupt(musb);
0052
0053     spin_unlock_irqrestore(&musb->lock, flags);
0054
0055     if (retval == IRQ_HANDLED || retval_dma == IRQ_HANDLED)
0056         return IRQ_HANDLED;
0057
0058     return IRQ_NONE;
0059 }
0060
0061 static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
0062     { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
0063     { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
0064     { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
0065 };
0066
0067 static const struct musb_hdrc_config jz4740_musb_config = {
0068     /* Silicon does not implement USB OTG. */
0069     .multipoint = 0,
0070     /* Max EPs scanned, driver will decide which EP can be used. */
0071     .num_eps    = 4,
0072     /* RAMbits needed to configure EPs from table */
0073     .ram_bits   = 9,
0074     .fifo_cfg   = jz4740_musb_fifo_cfg,
0075     .fifo_cfg_size  = ARRAY_SIZE(jz4740_musb_fifo_cfg),
0076 };
0077
0078 static int jz4740_musb_role_switch_set(struct usb_role_switch *sw,
0079                        enum usb_role role)
0080 {
0081     struct jz4740_glue *glue = usb_role_switch_get_drvdata(sw);
0082     struct usb_phy *phy = glue->musb->xceiv;
0083
0084     switch (role) {
0085     case USB_ROLE_NONE:
0086         atomic_notifier_call_chain(&phy->notifier, USB_EVENT_NONE, phy);
0087         break;
0088     case USB_ROLE_DEVICE:
0089         atomic_notifier_call_chain(&phy->notifier, USB_EVENT_VBUS, phy);
0090         break;
0091     case USB_ROLE_HOST:
0092         atomic_notifier_call_chain(&phy->notifier, USB_EVENT_ID, phy);
0093         break;
0094     }
0095
0096     return 0;
0097 }
0098
0099 static int jz4740_musb_init(struct musb *musb)
0100 {
0101     struct device *dev = musb->controller->parent;
0102     struct jz4740_glue *glue = dev_get_drvdata(dev);
0103     struct usb_role_switch_desc role_sw_desc = {
0104         .set = jz4740_musb_role_switch_set,
0105         .driver_data = glue,
0106         .fwnode = dev_fwnode(dev),
0107     };
0108     int err;
0109
0110     glue->musb = musb;
0111
0112     if (dev->of_node)
0113         musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
0114     else
0115         musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
0116     if (IS_ERR(musb->xceiv)) {
0117         err = PTR_ERR(musb->xceiv);
0118         if (err != -EPROBE_DEFER)
0119             dev_err(dev, "No transceiver configured: %d\n", err);
0120         return err;
0121     }
0122
0123     glue->role_sw = usb_role_switch_register(dev, &role_sw_desc);
0124     if (IS_ERR(glue->role_sw)) {
0125         dev_err(dev, "Failed to register USB role switch\n");
0126         return PTR_ERR(glue->role_sw);
0127     }
0128
0129     /*
0130      * Silicon does not implement ConfigData register.
0131      * Set dyn_fifo to avoid reading EP config from hardware.
0132      */
0133     musb->dyn_fifo = true;
0134
0135     musb->isr = jz4740_musb_interrupt;
0136
0137     return 0;
0138 }
0139
0140 static int jz4740_musb_exit(struct musb *musb)
0141 {
0142     struct jz4740_glue *glue = dev_get_drvdata(musb->controller->parent);
0143
0144     usb_role_switch_unregister(glue->role_sw);
0145
0146     return 0;
0147 }
0148
0149 static const struct musb_platform_ops jz4740_musb_ops = {
0150     .quirks     = MUSB_DMA_INVENTRA | MUSB_INDEXED_EP,
0151     .fifo_mode  = 2,
0152     .init       = jz4740_musb_init,
0153     .exit       = jz4740_musb_exit,
0154 #ifdef CONFIG_USB_INVENTRA_DMA
0155     .dma_init   = musbhs_dma_controller_create_noirq,
0156     .dma_exit   = musbhs_dma_controller_destroy,
0157 #endif
0158 };
0159
0160 static const struct musb_hdrc_platform_data jz4740_musb_pdata = {
0161     .mode       = MUSB_PERIPHERAL,
0162     .config     = &jz4740_musb_config,
0163     .platform_ops   = &jz4740_musb_ops,
0164 };
0165
0166 static struct musb_fifo_cfg jz4770_musb_fifo_cfg[] = {
0167     { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
0168     { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
0169     { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
0170     { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
0171     { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
0172     { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
0173     { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
0174     { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
0175     { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
0176     { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
0177 };
0178
0179 static struct musb_hdrc_config jz4770_musb_config = {
0180     .multipoint = 1,
0181     .num_eps    = 11,
0182     .ram_bits   = 11,
0183     .fifo_cfg   = jz4770_musb_fifo_cfg,
0184     .fifo_cfg_size  = ARRAY_SIZE(jz4770_musb_fifo_cfg),
0185 };
0186
0187 static const struct musb_hdrc_platform_data jz4770_musb_pdata = {
0188     .mode       = MUSB_PERIPHERAL, /* TODO: support OTG */
0189     .config     = &jz4770_musb_config,
0190     .platform_ops   = &jz4740_musb_ops,
0191 };
0192
0193 static int jz4740_probe(struct platform_device *pdev)
0194 {
0195     struct device           *dev = &pdev->dev;
0196     const struct musb_hdrc_platform_data *pdata;
0197     struct platform_device      *musb;
0198     struct jz4740_glue      *glue;
0199     struct clk          *clk;
0200     int             ret;
0201
0202     glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
0203     if (!glue)
0204         return -ENOMEM;
0205
0206     pdata = of_device_get_match_data(dev);
0207     if (!pdata) {
0208         dev_err(dev, "missing platform data\n");
0209         return -EINVAL;
0210     }
0211
0212     musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
0213     if (!musb) {
0214         dev_err(dev, "failed to allocate musb device\n");
0215         return -ENOMEM;
0216     }
0217
0218     clk = devm_clk_get(dev, "udc");
0219     if (IS_ERR(clk)) {
0220         dev_err(dev, "failed to get clock\n");
0221         ret = PTR_ERR(clk);
0222         goto err_platform_device_put;
0223     }
0224
0225     ret = clk_prepare_enable(clk);
0226     if (ret) {
0227         dev_err(dev, "failed to enable clock\n");
0228         goto err_platform_device_put;
0229     }
0230
0231     musb->dev.parent        = dev;
0232     musb->dev.dma_mask      = &musb->dev.coherent_dma_mask;
0233     musb->dev.coherent_dma_mask = DMA_BIT_MASK(32);
0234     device_set_of_node_from_dev(&musb->dev, dev);
0235
0236     glue->pdev          = musb;
0237     glue->clk           = clk;
0238
0239     platform_set_drvdata(pdev, glue);
0240
0241     ret = platform_device_add_resources(musb, pdev->resource,
0242                         pdev->num_resources);
0243     if (ret) {
0244         dev_err(dev, "failed to add resources\n");
0245         goto err_clk_disable;
0246     }
0247
0248     ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
0249     if (ret) {
0250         dev_err(dev, "failed to add platform_data\n");
0251         goto err_clk_disable;
0252     }
0253
0254     ret = platform_device_add(musb);
0255     if (ret) {
0256         dev_err(dev, "failed to register musb device\n");
0257         goto err_clk_disable;
0258     }
0259
0260     return 0;
0261
0262 err_clk_disable:
0263     clk_disable_unprepare(clk);
0264 err_platform_device_put:
0265     platform_device_put(musb);
0266     return ret;
0267 }
0268
0269 static int jz4740_remove(struct platform_device *pdev)
0270 {
0271     struct jz4740_glue *glue = platform_get_drvdata(pdev);
0272
0273     platform_device_unregister(glue->pdev);
0274     clk_disable_unprepare(glue->clk);
0275
0276     return 0;
0277 }
0278
0279 static const struct of_device_id jz4740_musb_of_match[] = {
0280     { .compatible = "ingenic,jz4740-musb", .data = &jz4740_musb_pdata },
0281     { .compatible = "ingenic,jz4770-musb", .data = &jz4770_musb_pdata },
0282     { /* sentinel */ },
0283 };
0284 MODULE_DEVICE_TABLE(of, jz4740_musb_of_match);
0285
0286 static struct platform_driver jz4740_driver = {
0287     .probe      = jz4740_probe,
0288     .remove     = jz4740_remove,
0289     .driver     = {
0290         .name   = "musb-jz4740",
0291         .of_match_table = jz4740_musb_of_match,
0292     },
0293 };
0294
0295 MODULE_DESCRIPTION("JZ4740 MUSB Glue Layer");
0296 MODULE_AUTHOR("Apelete Seketeli <apelete@seketeli.net>");
0297 MODULE_LICENSE("GPL v2");
0298 module_platform_driver(jz4740_driver);