usb/musb/davinci.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2005-2006 by Texas Instruments
0004  */
0005
0006 #ifndef __MUSB_HDRDF_H__
0007 #define __MUSB_HDRDF_H__
0008
0009 /*
0010  * DaVinci-specific definitions
0011  */
0012
0013 /* Integrated highspeed/otg PHY */
0014 #define USBPHY_CTL_PADDR    0x01c40034
0015 #define USBPHY_DATAPOL      BIT(11) /* (dm355) switch D+/D- */
0016 #define USBPHY_PHYCLKGD     BIT(8)
0017 #define USBPHY_SESNDEN      BIT(7)  /* v(sess_end) comparator */
0018 #define USBPHY_VBDTCTEN     BIT(6)  /* v(bus) comparator */
0019 #define USBPHY_VBUSSENS     BIT(5)  /* (dm355,ro) is vbus > 0.5V */
0020 #define USBPHY_PHYPLLON     BIT(4)  /* override pll suspend */
0021 #define USBPHY_CLKO1SEL     BIT(3)
0022 #define USBPHY_OSCPDWN      BIT(2)
0023 #define USBPHY_OTGPDWN      BIT(1)
0024 #define USBPHY_PHYPDWN      BIT(0)
0025
0026 #define DM355_DEEPSLEEP_PADDR   0x01c40048
0027 #define DRVVBUS_FORCE       BIT(2)
0028 #define DRVVBUS_OVERRIDE    BIT(1)
0029
0030 /* For now include usb OTG module registers here */
0031 #define DAVINCI_USB_VERSION_REG     0x00
0032 #define DAVINCI_USB_CTRL_REG        0x04
0033 #define DAVINCI_USB_STAT_REG        0x08
0034 #define DAVINCI_RNDIS_REG       0x10
0035 #define DAVINCI_AUTOREQ_REG     0x14
0036 #define DAVINCI_USB_INT_SOURCE_REG  0x20
0037 #define DAVINCI_USB_INT_SET_REG     0x24
0038 #define DAVINCI_USB_INT_SRC_CLR_REG 0x28
0039 #define DAVINCI_USB_INT_MASK_REG    0x2c
0040 #define DAVINCI_USB_INT_MASK_SET_REG    0x30
0041 #define DAVINCI_USB_INT_MASK_CLR_REG    0x34
0042 #define DAVINCI_USB_INT_SRC_MASKED_REG  0x38
0043 #define DAVINCI_USB_EOI_REG     0x3c
0044 #define DAVINCI_USB_EOI_INTVEC      0x40
0045
0046 /* BEGIN CPPI-generic (?) */
0047
0048 /* CPPI related registers */
0049 #define DAVINCI_TXCPPI_CTRL_REG     0x80
0050 #define DAVINCI_TXCPPI_TEAR_REG     0x84
0051 #define DAVINCI_CPPI_EOI_REG        0x88
0052 #define DAVINCI_CPPI_INTVEC_REG     0x8c
0053 #define DAVINCI_TXCPPI_MASKED_REG   0x90
0054 #define DAVINCI_TXCPPI_RAW_REG      0x94
0055 #define DAVINCI_TXCPPI_INTENAB_REG  0x98
0056 #define DAVINCI_TXCPPI_INTCLR_REG   0x9c
0057
0058 #define DAVINCI_RXCPPI_CTRL_REG     0xC0
0059 #define DAVINCI_RXCPPI_MASKED_REG   0xD0
0060 #define DAVINCI_RXCPPI_RAW_REG      0xD4
0061 #define DAVINCI_RXCPPI_INTENAB_REG  0xD8
0062 #define DAVINCI_RXCPPI_INTCLR_REG   0xDC
0063
0064 #define DAVINCI_RXCPPI_BUFCNT0_REG  0xE0
0065 #define DAVINCI_RXCPPI_BUFCNT1_REG  0xE4
0066 #define DAVINCI_RXCPPI_BUFCNT2_REG  0xE8
0067 #define DAVINCI_RXCPPI_BUFCNT3_REG  0xEC
0068
0069 /* CPPI state RAM entries */
0070 #define DAVINCI_CPPI_STATERAM_BASE_OFFSET   0x100
0071
0072 #define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \
0073     (DAVINCI_CPPI_STATERAM_BASE_OFFSET +       ((chnum) * 0x40))
0074 #define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \
0075     (DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 + ((chnum) * 0x40))
0076
0077 /* CPPI masks */
0078 #define DAVINCI_DMA_CTRL_ENABLE     1
0079 #define DAVINCI_DMA_CTRL_DISABLE    0
0080
0081 #define DAVINCI_DMA_ALL_CHANNELS_ENABLE 0xF
0082 #define DAVINCI_DMA_ALL_CHANNELS_DISABLE 0xF
0083
0084 /* END CPPI-generic (?) */
0085
0086 #define DAVINCI_USB_TX_ENDPTS_MASK  0x1f        /* ep0 + 4 tx */
0087 #define DAVINCI_USB_RX_ENDPTS_MASK  0x1e        /* 4 rx */
0088
0089 #define DAVINCI_USB_USBINT_SHIFT    16
0090 #define DAVINCI_USB_TXINT_SHIFT     0
0091 #define DAVINCI_USB_RXINT_SHIFT     8
0092
0093 #define DAVINCI_INTR_DRVVBUS        0x0100
0094
0095 #define DAVINCI_USB_USBINT_MASK     0x01ff0000  /* 8 Mentor, DRVVBUS */
0096 #define DAVINCI_USB_TXINT_MASK \
0097     (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT)
0098 #define DAVINCI_USB_RXINT_MASK \
0099     (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT)
0100
0101 #define DAVINCI_BASE_OFFSET     0x400
0102
0103 #endif  /* __MUSB_HDRDF_H__ */