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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2005-2006 by Texas Instruments
0004  *
0005  * This file is part of the Inventra Controller Driver for Linux.
0006  */
0007 
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/sched.h>
0011 #include <linux/list.h>
0012 #include <linux/delay.h>
0013 #include <linux/clk.h>
0014 #include <linux/err.h>
0015 #include <linux/io.h>
0016 #include <linux/gpio/consumer.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/dma-mapping.h>
0019 #include <linux/usb/usb_phy_generic.h>
0020 
0021 #include <mach/cputype.h>
0022 #include <mach/hardware.h>
0023 
0024 #include <asm/mach-types.h>
0025 
0026 #include "musb_core.h"
0027 
0028 #include "davinci.h"
0029 #include "cppi_dma.h"
0030 
0031 
0032 #define USB_PHY_CTRL    IO_ADDRESS(USBPHY_CTL_PADDR)
0033 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
0034 
0035 struct davinci_glue {
0036     struct device       *dev;
0037     struct platform_device  *musb;
0038     struct clk      *clk;
0039     bool            vbus_state;
0040     struct gpio_desc    *vbus;
0041     struct work_struct  vbus_work;
0042 };
0043 
0044 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
0045  * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
0046  * and, when in host mode, autosuspending idle root ports... PHYPLLON
0047  * (overriding SUSPENDM?) then likely needs to stay off.
0048  */
0049 
0050 static inline void phy_on(void)
0051 {
0052     u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
0053 
0054     /* power everything up; start the on-chip PHY and its PLL */
0055     phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
0056     phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
0057     __raw_writel(phy_ctrl, USB_PHY_CTRL);
0058 
0059     /* wait for PLL to lock before proceeding */
0060     while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
0061         cpu_relax();
0062 }
0063 
0064 static inline void phy_off(void)
0065 {
0066     u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
0067 
0068     /* powerdown the on-chip PHY, its PLL, and the OTG block */
0069     phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
0070     phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
0071     __raw_writel(phy_ctrl, USB_PHY_CTRL);
0072 }
0073 
0074 static int dma_off = 1;
0075 
0076 static void davinci_musb_enable(struct musb *musb)
0077 {
0078     u32 tmp, old, val;
0079 
0080     /* workaround:  setup irqs through both register sets */
0081     tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
0082             << DAVINCI_USB_TXINT_SHIFT;
0083     musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
0084     old = tmp;
0085     tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
0086             << DAVINCI_USB_RXINT_SHIFT;
0087     musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
0088     tmp |= old;
0089 
0090     val = ~MUSB_INTR_SOF;
0091     tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
0092     musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
0093 
0094     if (is_dma_capable() && !dma_off)
0095         printk(KERN_WARNING "%s %s: dma not reactivated\n",
0096                 __FILE__, __func__);
0097     else
0098         dma_off = 0;
0099 
0100     /* force a DRVVBUS irq so we can start polling for ID change */
0101     musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
0102             DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
0103 }
0104 
0105 /*
0106  * Disable the HDRC and flush interrupts
0107  */
0108 static void davinci_musb_disable(struct musb *musb)
0109 {
0110     /* because we don't set CTRLR.UINT, "important" to:
0111      *  - not read/write INTRUSB/INTRUSBE
0112      *  - (except during initial setup, as workaround)
0113      *  - use INTSETR/INTCLRR instead
0114      */
0115     musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
0116               DAVINCI_USB_USBINT_MASK
0117             | DAVINCI_USB_TXINT_MASK
0118             | DAVINCI_USB_RXINT_MASK);
0119     musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
0120 
0121     if (is_dma_capable() && !dma_off)
0122         WARNING("dma still active\n");
0123 }
0124 
0125 
0126 #define portstate(stmt)     stmt
0127 
0128 /*
0129  * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
0130  * which doesn't wire DRVVBUS to the FET that switches it.  Unclear
0131  * if that's a problem with the DM6446 chip or just with that board.
0132  *
0133  * In either case, the DM355 EVM automates DRVVBUS the normal way,
0134  * when J10 is out, and TI documents it as handling OTG.
0135  */
0136 
0137 /* I2C operations are always synchronous, and require a task context.
0138  * With unloaded systems, using the shared workqueue seems to suffice
0139  * to satisfy the 100msec A_WAIT_VRISE timeout...
0140  */
0141 static void evm_deferred_drvvbus(struct work_struct *work)
0142 {
0143     struct davinci_glue *glue = container_of(work, struct davinci_glue,
0144                          vbus_work);
0145 
0146     gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
0147     glue->vbus_state = !glue->vbus_state;
0148 }
0149 
0150 static void davinci_musb_source_power(struct musb *musb, int is_on,
0151                       int immediate)
0152 {
0153     struct davinci_glue *glue = dev_get_drvdata(musb->controller->parent);
0154 
0155     /* This GPIO handling is entirely optional */
0156     if (!glue->vbus)
0157         return;
0158 
0159     if (is_on)
0160         is_on = 1;
0161 
0162     if (glue->vbus_state == is_on)
0163         return;
0164     /* 0/1 vs "-1 == unknown/init" */
0165     glue->vbus_state = !is_on;
0166 
0167     if (machine_is_davinci_evm()) {
0168         if (immediate)
0169             gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
0170         else
0171             schedule_work(&glue->vbus_work);
0172     }
0173     if (immediate)
0174         glue->vbus_state = is_on;
0175 }
0176 
0177 static void davinci_musb_set_vbus(struct musb *musb, int is_on)
0178 {
0179     WARN_ON(is_on && is_peripheral_active(musb));
0180     davinci_musb_source_power(musb, is_on, 0);
0181 }
0182 
0183 
0184 #define POLL_SECONDS    2
0185 
0186 static void otg_timer(struct timer_list *t)
0187 {
0188     struct musb     *musb = from_timer(musb, t, dev_timer);
0189     void __iomem        *mregs = musb->mregs;
0190     u8          devctl;
0191     unsigned long       flags;
0192 
0193     /* We poll because DaVinci's won't expose several OTG-critical
0194     * status change events (from the transceiver) otherwise.
0195      */
0196     devctl = musb_readb(mregs, MUSB_DEVCTL);
0197     dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
0198         usb_otg_state_string(musb->xceiv->otg->state));
0199 
0200     spin_lock_irqsave(&musb->lock, flags);
0201     switch (musb->xceiv->otg->state) {
0202     case OTG_STATE_A_WAIT_VFALL:
0203         /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
0204          * seems to mis-handle session "start" otherwise (or in our
0205          * case "recover"), in routine "VBUS was valid by the time
0206          * VBUSERR got reported during enumeration" cases.
0207          */
0208         if (devctl & MUSB_DEVCTL_VBUS) {
0209             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0210             break;
0211         }
0212         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0213         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
0214             MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
0215         break;
0216     case OTG_STATE_B_IDLE:
0217         /*
0218          * There's no ID-changed IRQ, so we have no good way to tell
0219          * when to switch to the A-Default state machine (by setting
0220          * the DEVCTL.SESSION flag).
0221          *
0222          * Workaround:  whenever we're in B_IDLE, try setting the
0223          * session flag every few seconds.  If it works, ID was
0224          * grounded and we're now in the A-Default state machine.
0225          *
0226          * NOTE setting the session flag is _supposed_ to trigger
0227          * SRP, but clearly it doesn't.
0228          */
0229         musb_writeb(mregs, MUSB_DEVCTL,
0230                 devctl | MUSB_DEVCTL_SESSION);
0231         devctl = musb_readb(mregs, MUSB_DEVCTL);
0232         if (devctl & MUSB_DEVCTL_BDEVICE)
0233             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0234         else
0235             musb->xceiv->otg->state = OTG_STATE_A_IDLE;
0236         break;
0237     default:
0238         break;
0239     }
0240     spin_unlock_irqrestore(&musb->lock, flags);
0241 }
0242 
0243 static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
0244 {
0245     unsigned long   flags;
0246     irqreturn_t retval = IRQ_NONE;
0247     struct musb *musb = __hci;
0248     struct usb_otg  *otg = musb->xceiv->otg;
0249     void __iomem    *tibase = musb->ctrl_base;
0250     struct cppi *cppi;
0251     u32     tmp;
0252 
0253     spin_lock_irqsave(&musb->lock, flags);
0254 
0255     /* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
0256      * the Mentor registers (except for setup), use the TI ones and EOI.
0257      *
0258      * Docs describe irq "vector" registers associated with the CPPI and
0259      * USB EOI registers.  These hold a bitmask corresponding to the
0260      * current IRQ, not an irq handler address.  Would using those bits
0261      * resolve some of the races observed in this dispatch code??
0262      */
0263 
0264     /* CPPI interrupts share the same IRQ line, but have their own
0265      * mask, state, "vector", and EOI registers.
0266      */
0267     cppi = container_of(musb->dma_controller, struct cppi, controller);
0268     if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
0269         retval = cppi_interrupt(irq, __hci);
0270 
0271     /* ack and handle non-CPPI interrupts */
0272     tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
0273     musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
0274     dev_dbg(musb->controller, "IRQ %08x\n", tmp);
0275 
0276     musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
0277             >> DAVINCI_USB_RXINT_SHIFT;
0278     musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
0279             >> DAVINCI_USB_TXINT_SHIFT;
0280     musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
0281             >> DAVINCI_USB_USBINT_SHIFT;
0282 
0283     /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
0284      * DaVinci's missing ID change IRQ.  We need an ID change IRQ to
0285      * switch appropriately between halves of the OTG state machine.
0286      * Managing DEVCTL.SESSION per Mentor docs requires we know its
0287      * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
0288      * Also, DRVVBUS pulses for SRP (but not at 5V) ...
0289      */
0290     if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
0291         int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
0292         void __iomem *mregs = musb->mregs;
0293         u8  devctl = musb_readb(mregs, MUSB_DEVCTL);
0294         int err = musb->int_usb & MUSB_INTR_VBUSERROR;
0295 
0296         err = musb->int_usb & MUSB_INTR_VBUSERROR;
0297         if (err) {
0298             /* The Mentor core doesn't debounce VBUS as needed
0299              * to cope with device connect current spikes. This
0300              * means it's not uncommon for bus-powered devices
0301              * to get VBUS errors during enumeration.
0302              *
0303              * This is a workaround, but newer RTL from Mentor
0304              * seems to allow a better one: "re"starting sessions
0305              * without waiting (on EVM, a **long** time) for VBUS
0306              * to stop registering in devctl.
0307              */
0308             musb->int_usb &= ~MUSB_INTR_VBUSERROR;
0309             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
0310             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0311             WARNING("VBUS error workaround (delay coming)\n");
0312         } else if (drvvbus) {
0313             MUSB_HST_MODE(musb);
0314             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0315             portstate(musb->port1_status |= USB_PORT_STAT_POWER);
0316             del_timer(&musb->dev_timer);
0317         } else {
0318             musb->is_active = 0;
0319             MUSB_DEV_MODE(musb);
0320             musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0321             portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
0322         }
0323 
0324         /* NOTE:  this must complete poweron within 100 msec
0325          * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
0326          */
0327         davinci_musb_source_power(musb, drvvbus, 0);
0328         dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
0329                 drvvbus ? "on" : "off",
0330                 usb_otg_state_string(musb->xceiv->otg->state),
0331                 err ? " ERROR" : "",
0332                 devctl);
0333         retval = IRQ_HANDLED;
0334     }
0335 
0336     if (musb->int_tx || musb->int_rx || musb->int_usb)
0337         retval |= musb_interrupt(musb);
0338 
0339     /* irq stays asserted until EOI is written */
0340     musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
0341 
0342     /* poll for ID change */
0343     if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
0344         mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0345 
0346     spin_unlock_irqrestore(&musb->lock, flags);
0347 
0348     return retval;
0349 }
0350 
0351 static int davinci_musb_set_mode(struct musb *musb, u8 mode)
0352 {
0353     /* EVM can't do this (right?) */
0354     return -EIO;
0355 }
0356 
0357 static int davinci_musb_init(struct musb *musb)
0358 {
0359     void __iomem    *tibase = musb->ctrl_base;
0360     u32     revision;
0361     int         ret = -ENODEV;
0362 
0363     musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
0364     if (IS_ERR_OR_NULL(musb->xceiv)) {
0365         ret = -EPROBE_DEFER;
0366         goto unregister;
0367     }
0368 
0369     musb->mregs += DAVINCI_BASE_OFFSET;
0370 
0371     /* returns zero if e.g. not clocked */
0372     revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
0373     if (revision == 0)
0374         goto fail;
0375 
0376     timer_setup(&musb->dev_timer, otg_timer, 0);
0377 
0378     davinci_musb_source_power(musb, 0, 1);
0379 
0380     /* dm355 EVM swaps D+/D- for signal integrity, and
0381      * is clocked from the main 24 MHz crystal.
0382      */
0383     if (machine_is_davinci_dm355_evm()) {
0384         u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
0385 
0386         phy_ctrl &= ~(3 << 9);
0387         phy_ctrl |= USBPHY_DATAPOL;
0388         __raw_writel(phy_ctrl, USB_PHY_CTRL);
0389     }
0390 
0391     /* On dm355, the default-A state machine needs DRVVBUS control.
0392      * If we won't be a host, there's no need to turn it on.
0393      */
0394     if (cpu_is_davinci_dm355()) {
0395         u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
0396 
0397         deepsleep &= ~DRVVBUS_FORCE;
0398         __raw_writel(deepsleep, DM355_DEEPSLEEP);
0399     }
0400 
0401     /* reset the controller */
0402     musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
0403 
0404     /* start the on-chip PHY and its PLL */
0405     phy_on();
0406 
0407     msleep(5);
0408 
0409     /* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
0410     pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
0411         revision, __raw_readl(USB_PHY_CTRL),
0412         musb_readb(tibase, DAVINCI_USB_CTRL_REG));
0413 
0414     musb->isr = davinci_musb_interrupt;
0415     return 0;
0416 
0417 fail:
0418     usb_put_phy(musb->xceiv);
0419 unregister:
0420     usb_phy_generic_unregister();
0421     return ret;
0422 }
0423 
0424 static int davinci_musb_exit(struct musb *musb)
0425 {
0426     int maxdelay = 30;
0427     u8  devctl, warn = 0;
0428 
0429     del_timer_sync(&musb->dev_timer);
0430 
0431     /* force VBUS off */
0432     if (cpu_is_davinci_dm355()) {
0433         u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
0434 
0435         deepsleep &= ~DRVVBUS_FORCE;
0436         deepsleep |= DRVVBUS_OVERRIDE;
0437         __raw_writel(deepsleep, DM355_DEEPSLEEP);
0438     }
0439 
0440     davinci_musb_source_power(musb, 0 /*off*/, 1);
0441 
0442     /*
0443      * delay, to avoid problems with module reload.
0444      * if there's no peripheral connected, this can take a
0445      * long time to fall, especially on EVM with huge C133.
0446      */
0447     do {
0448         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
0449         if (!(devctl & MUSB_DEVCTL_VBUS))
0450             break;
0451         if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
0452             warn = devctl & MUSB_DEVCTL_VBUS;
0453             dev_dbg(musb->controller, "VBUS %d\n",
0454                 warn >> MUSB_DEVCTL_VBUS_SHIFT);
0455         }
0456         msleep(1000);
0457         maxdelay--;
0458     } while (maxdelay > 0);
0459 
0460     /* in OTG mode, another host might be connected */
0461     if (devctl & MUSB_DEVCTL_VBUS)
0462         dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
0463 
0464     phy_off();
0465 
0466     usb_put_phy(musb->xceiv);
0467 
0468     return 0;
0469 }
0470 
0471 static const struct musb_platform_ops davinci_ops = {
0472     .quirks     = MUSB_DMA_CPPI,
0473     .init       = davinci_musb_init,
0474     .exit       = davinci_musb_exit,
0475 
0476 #ifdef CONFIG_USB_TI_CPPI_DMA
0477     .dma_init   = cppi_dma_controller_create,
0478     .dma_exit   = cppi_dma_controller_destroy,
0479 #endif
0480     .enable     = davinci_musb_enable,
0481     .disable    = davinci_musb_disable,
0482 
0483     .set_mode   = davinci_musb_set_mode,
0484 
0485     .set_vbus   = davinci_musb_set_vbus,
0486 };
0487 
0488 static const struct platform_device_info davinci_dev_info = {
0489     .name       = "musb-hdrc",
0490     .id     = PLATFORM_DEVID_AUTO,
0491     .dma_mask   = DMA_BIT_MASK(32),
0492 };
0493 
0494 static int davinci_probe(struct platform_device *pdev)
0495 {
0496     struct resource         musb_resources[3];
0497     struct musb_hdrc_platform_data  *pdata = dev_get_platdata(&pdev->dev);
0498     struct platform_device      *musb;
0499     struct davinci_glue     *glue;
0500     struct platform_device_info pinfo;
0501     struct clk          *clk;
0502 
0503     int             ret = -ENOMEM;
0504 
0505     glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
0506     if (!glue)
0507         goto err0;
0508 
0509     clk = devm_clk_get(&pdev->dev, "usb");
0510     if (IS_ERR(clk)) {
0511         dev_err(&pdev->dev, "failed to get clock\n");
0512         ret = PTR_ERR(clk);
0513         goto err0;
0514     }
0515 
0516     ret = clk_enable(clk);
0517     if (ret) {
0518         dev_err(&pdev->dev, "failed to enable clock\n");
0519         goto err0;
0520     }
0521 
0522     glue->dev           = &pdev->dev;
0523     glue->clk           = clk;
0524 
0525     pdata->platform_ops     = &davinci_ops;
0526 
0527     glue->vbus = devm_gpiod_get_optional(&pdev->dev, NULL, GPIOD_OUT_LOW);
0528     if (IS_ERR(glue->vbus)) {
0529         ret = PTR_ERR(glue->vbus);
0530         goto err0;
0531     } else {
0532         glue->vbus_state = -1;
0533         INIT_WORK(&glue->vbus_work, evm_deferred_drvvbus);
0534     }
0535 
0536     usb_phy_generic_register();
0537     platform_set_drvdata(pdev, glue);
0538 
0539     memset(musb_resources, 0x00, sizeof(*musb_resources) *
0540             ARRAY_SIZE(musb_resources));
0541 
0542     musb_resources[0].name = pdev->resource[0].name;
0543     musb_resources[0].start = pdev->resource[0].start;
0544     musb_resources[0].end = pdev->resource[0].end;
0545     musb_resources[0].flags = pdev->resource[0].flags;
0546 
0547     musb_resources[1].name = pdev->resource[1].name;
0548     musb_resources[1].start = pdev->resource[1].start;
0549     musb_resources[1].end = pdev->resource[1].end;
0550     musb_resources[1].flags = pdev->resource[1].flags;
0551 
0552     /*
0553      * For DM6467 3 resources are passed. A placeholder for the 3rd
0554      * resource is always there, so it's safe to always copy it...
0555      */
0556     musb_resources[2].name = pdev->resource[2].name;
0557     musb_resources[2].start = pdev->resource[2].start;
0558     musb_resources[2].end = pdev->resource[2].end;
0559     musb_resources[2].flags = pdev->resource[2].flags;
0560 
0561     pinfo = davinci_dev_info;
0562     pinfo.parent = &pdev->dev;
0563     pinfo.res = musb_resources;
0564     pinfo.num_res = ARRAY_SIZE(musb_resources);
0565     pinfo.data = pdata;
0566     pinfo.size_data = sizeof(*pdata);
0567 
0568     glue->musb = musb = platform_device_register_full(&pinfo);
0569     if (IS_ERR(musb)) {
0570         ret = PTR_ERR(musb);
0571         dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
0572         goto err1;
0573     }
0574 
0575     return 0;
0576 
0577 err1:
0578     clk_disable(clk);
0579 
0580 err0:
0581     return ret;
0582 }
0583 
0584 static int davinci_remove(struct platform_device *pdev)
0585 {
0586     struct davinci_glue     *glue = platform_get_drvdata(pdev);
0587 
0588     platform_device_unregister(glue->musb);
0589     usb_phy_generic_unregister();
0590     clk_disable(glue->clk);
0591 
0592     return 0;
0593 }
0594 
0595 static struct platform_driver davinci_driver = {
0596     .probe      = davinci_probe,
0597     .remove     = davinci_remove,
0598     .driver     = {
0599         .name   = "musb-davinci",
0600     },
0601 };
0602 
0603 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
0604 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
0605 MODULE_LICENSE("GPL v2");
0606 module_platform_driver(davinci_driver);
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