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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Texas Instruments DA8xx/OMAP-L1x "glue layer"
0004  *
0005  * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
0006  *
0007  * Based on the DaVinci "glue layer" code.
0008  * Copyright (C) 2005-2006 by Texas Instruments
0009  *
0010  * DT support
0011  * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
0012  *
0013  * This file is part of the Inventra Controller Driver for Linux.
0014  */
0015 
0016 #include <linux/module.h>
0017 #include <linux/clk.h>
0018 #include <linux/err.h>
0019 #include <linux/io.h>
0020 #include <linux/of_platform.h>
0021 #include <linux/phy/phy.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/dma-mapping.h>
0024 #include <linux/usb/usb_phy_generic.h>
0025 
0026 #include "musb_core.h"
0027 
0028 /*
0029  * DA8XX specific definitions
0030  */
0031 
0032 /* USB 2.0 OTG module registers */
0033 #define DA8XX_USB_REVISION_REG  0x00
0034 #define DA8XX_USB_CTRL_REG  0x04
0035 #define DA8XX_USB_STAT_REG  0x08
0036 #define DA8XX_USB_EMULATION_REG 0x0c
0037 #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
0038 #define DA8XX_USB_INTR_SRC_REG  0x20
0039 #define DA8XX_USB_INTR_SRC_SET_REG 0x24
0040 #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
0041 #define DA8XX_USB_INTR_MASK_REG 0x2c
0042 #define DA8XX_USB_INTR_MASK_SET_REG 0x30
0043 #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
0044 #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
0045 #define DA8XX_USB_END_OF_INTR_REG 0x3c
0046 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
0047 
0048 /* Control register bits */
0049 #define DA8XX_SOFT_RESET_MASK   1
0050 
0051 #define DA8XX_USB_TX_EP_MASK    0x1f        /* EP0 + 4 Tx EPs */
0052 #define DA8XX_USB_RX_EP_MASK    0x1e        /* 4 Rx EPs */
0053 
0054 /* USB interrupt register bits */
0055 #define DA8XX_INTR_USB_SHIFT    16
0056 #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
0057                     /* interrupts and DRVVBUS interrupt */
0058 #define DA8XX_INTR_DRVVBUS  0x100
0059 #define DA8XX_INTR_RX_SHIFT 8
0060 #define DA8XX_INTR_RX_MASK  (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
0061 #define DA8XX_INTR_TX_SHIFT 0
0062 #define DA8XX_INTR_TX_MASK  (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
0063 
0064 #define DA8XX_MENTOR_CORE_OFFSET 0x400
0065 
0066 struct da8xx_glue {
0067     struct device       *dev;
0068     struct platform_device  *musb;
0069     struct platform_device  *usb_phy;
0070     struct clk      *clk;
0071     struct phy      *phy;
0072 };
0073 
0074 /*
0075  * Because we don't set CTRL.UINT, it's "important" to:
0076  *  - not read/write INTRUSB/INTRUSBE (except during
0077  *    initial setup, as a workaround);
0078  *  - use INTSET/INTCLR instead.
0079  */
0080 
0081 /**
0082  * da8xx_musb_enable - enable interrupts
0083  */
0084 static void da8xx_musb_enable(struct musb *musb)
0085 {
0086     void __iomem *reg_base = musb->ctrl_base;
0087     u32 mask;
0088 
0089     /* Workaround: setup IRQs through both register sets. */
0090     mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
0091            ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
0092            DA8XX_INTR_USB_MASK;
0093     musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
0094 
0095     /* Force the DRVVBUS IRQ so we can start polling for ID change. */
0096     musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
0097             DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
0098 }
0099 
0100 /**
0101  * da8xx_musb_disable - disable HDRC and flush interrupts
0102  */
0103 static void da8xx_musb_disable(struct musb *musb)
0104 {
0105     void __iomem *reg_base = musb->ctrl_base;
0106 
0107     musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
0108             DA8XX_INTR_USB_MASK |
0109             DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
0110     musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
0111 }
0112 
0113 #define portstate(stmt)     stmt
0114 
0115 static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
0116 {
0117     WARN_ON(is_on && is_peripheral_active(musb));
0118 }
0119 
0120 #define POLL_SECONDS    2
0121 
0122 static void otg_timer(struct timer_list *t)
0123 {
0124     struct musb     *musb = from_timer(musb, t, dev_timer);
0125     void __iomem        *mregs = musb->mregs;
0126     u8          devctl;
0127     unsigned long       flags;
0128 
0129     /*
0130      * We poll because DaVinci's won't expose several OTG-critical
0131      * status change events (from the transceiver) otherwise.
0132      */
0133     devctl = musb_readb(mregs, MUSB_DEVCTL);
0134     dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
0135         usb_otg_state_string(musb->xceiv->otg->state));
0136 
0137     spin_lock_irqsave(&musb->lock, flags);
0138     switch (musb->xceiv->otg->state) {
0139     case OTG_STATE_A_WAIT_BCON:
0140         devctl &= ~MUSB_DEVCTL_SESSION;
0141         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
0142 
0143         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
0144         if (devctl & MUSB_DEVCTL_BDEVICE) {
0145             musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0146             MUSB_DEV_MODE(musb);
0147         } else {
0148             musb->xceiv->otg->state = OTG_STATE_A_IDLE;
0149             MUSB_HST_MODE(musb);
0150         }
0151         break;
0152     case OTG_STATE_A_WAIT_VFALL:
0153         /*
0154          * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
0155          * RTL seems to mis-handle session "start" otherwise (or in
0156          * our case "recover"), in routine "VBUS was valid by the time
0157          * VBUSERR got reported during enumeration" cases.
0158          */
0159         if (devctl & MUSB_DEVCTL_VBUS) {
0160             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0161             break;
0162         }
0163         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0164         musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
0165                 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
0166         break;
0167     case OTG_STATE_B_IDLE:
0168         /*
0169          * There's no ID-changed IRQ, so we have no good way to tell
0170          * when to switch to the A-Default state machine (by setting
0171          * the DEVCTL.Session bit).
0172          *
0173          * Workaround:  whenever we're in B_IDLE, try setting the
0174          * session flag every few seconds.  If it works, ID was
0175          * grounded and we're now in the A-Default state machine.
0176          *
0177          * NOTE: setting the session flag is _supposed_ to trigger
0178          * SRP but clearly it doesn't.
0179          */
0180         musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
0181         devctl = musb_readb(mregs, MUSB_DEVCTL);
0182         if (devctl & MUSB_DEVCTL_BDEVICE)
0183             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0184         else
0185             musb->xceiv->otg->state = OTG_STATE_A_IDLE;
0186         break;
0187     default:
0188         break;
0189     }
0190     spin_unlock_irqrestore(&musb->lock, flags);
0191 }
0192 
0193 static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
0194 {
0195     static unsigned long last_timer;
0196 
0197     if (timeout == 0)
0198         timeout = jiffies + msecs_to_jiffies(3);
0199 
0200     /* Never idle if active, or when VBUS timeout is not set as host */
0201     if (musb->is_active || (musb->a_wait_bcon == 0 &&
0202                 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
0203         dev_dbg(musb->controller, "%s active, deleting timer\n",
0204             usb_otg_state_string(musb->xceiv->otg->state));
0205         del_timer(&musb->dev_timer);
0206         last_timer = jiffies;
0207         return;
0208     }
0209 
0210     if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
0211         dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
0212         return;
0213     }
0214     last_timer = timeout;
0215 
0216     dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
0217         usb_otg_state_string(musb->xceiv->otg->state),
0218         jiffies_to_msecs(timeout - jiffies));
0219     mod_timer(&musb->dev_timer, timeout);
0220 }
0221 
0222 static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
0223 {
0224     struct musb     *musb = hci;
0225     void __iomem        *reg_base = musb->ctrl_base;
0226     unsigned long       flags;
0227     irqreturn_t     ret = IRQ_NONE;
0228     u32         status;
0229 
0230     spin_lock_irqsave(&musb->lock, flags);
0231 
0232     /*
0233      * NOTE: DA8XX shadows the Mentor IRQs.  Don't manage them through
0234      * the Mentor registers (except for setup), use the TI ones and EOI.
0235      */
0236 
0237     /* Acknowledge and handle non-CPPI interrupts */
0238     status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
0239     if (!status)
0240         goto eoi;
0241 
0242     musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
0243     dev_dbg(musb->controller, "USB IRQ %08x\n", status);
0244 
0245     musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
0246     musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
0247     musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
0248 
0249     /*
0250      * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
0251      * DA8xx's missing ID change IRQ.  We need an ID change IRQ to
0252      * switch appropriately between halves of the OTG state machine.
0253      * Managing DEVCTL.Session per Mentor docs requires that we know its
0254      * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
0255      * Also, DRVVBUS pulses for SRP (but not at 5 V)...
0256      */
0257     if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
0258         int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
0259         void __iomem *mregs = musb->mregs;
0260         u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
0261         int err;
0262 
0263         err = musb->int_usb & MUSB_INTR_VBUSERROR;
0264         if (err) {
0265             /*
0266              * The Mentor core doesn't debounce VBUS as needed
0267              * to cope with device connect current spikes. This
0268              * means it's not uncommon for bus-powered devices
0269              * to get VBUS errors during enumeration.
0270              *
0271              * This is a workaround, but newer RTL from Mentor
0272              * seems to allow a better one: "re"-starting sessions
0273              * without waiting for VBUS to stop registering in
0274              * devctl.
0275              */
0276             musb->int_usb &= ~MUSB_INTR_VBUSERROR;
0277             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
0278             mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0279             WARNING("VBUS error workaround (delay coming)\n");
0280         } else if (drvvbus) {
0281             MUSB_HST_MODE(musb);
0282             musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
0283             portstate(musb->port1_status |= USB_PORT_STAT_POWER);
0284             del_timer(&musb->dev_timer);
0285         } else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
0286             /*
0287              * When babble condition happens, drvvbus interrupt
0288              * is also generated. Ignore this drvvbus interrupt
0289              * and let babble interrupt handler recovers the
0290              * controller; otherwise, the host-mode flag is lost
0291              * due to the MUSB_DEV_MODE() call below and babble
0292              * recovery logic will not be called.
0293              */
0294             musb->is_active = 0;
0295             MUSB_DEV_MODE(musb);
0296             musb->xceiv->otg->state = OTG_STATE_B_IDLE;
0297             portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
0298         }
0299 
0300         dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
0301                 drvvbus ? "on" : "off",
0302                 usb_otg_state_string(musb->xceiv->otg->state),
0303                 err ? " ERROR" : "",
0304                 devctl);
0305         ret = IRQ_HANDLED;
0306     }
0307 
0308     if (musb->int_tx || musb->int_rx || musb->int_usb)
0309         ret |= musb_interrupt(musb);
0310 
0311  eoi:
0312     /* EOI needs to be written for the IRQ to be re-asserted. */
0313     if (ret == IRQ_HANDLED || status)
0314         musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
0315 
0316     /* Poll for ID change */
0317     if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
0318         mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
0319 
0320     spin_unlock_irqrestore(&musb->lock, flags);
0321 
0322     return ret;
0323 }
0324 
0325 static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
0326 {
0327     struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
0328     enum phy_mode phy_mode;
0329 
0330     /*
0331      * The PHY has some issues when it is forced in device or host mode.
0332      * Unless the user request another mode, configure the PHY in OTG mode.
0333      */
0334     if (!musb->is_initialized)
0335         return phy_set_mode(glue->phy, PHY_MODE_USB_OTG);
0336 
0337     switch (musb_mode) {
0338     case MUSB_HOST:     /* Force VBUS valid, ID = 0 */
0339         phy_mode = PHY_MODE_USB_HOST;
0340         break;
0341     case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
0342         phy_mode = PHY_MODE_USB_DEVICE;
0343         break;
0344     case MUSB_OTG:      /* Don't override the VBUS/ID comparators */
0345         phy_mode = PHY_MODE_USB_OTG;
0346         break;
0347     default:
0348         return -EINVAL;
0349     }
0350 
0351     return phy_set_mode(glue->phy, phy_mode);
0352 }
0353 
0354 static int da8xx_musb_init(struct musb *musb)
0355 {
0356     struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
0357     void __iomem *reg_base = musb->ctrl_base;
0358     u32 rev;
0359     int ret = -ENODEV;
0360 
0361     musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
0362 
0363     ret = clk_prepare_enable(glue->clk);
0364     if (ret) {
0365         dev_err(glue->dev, "failed to enable clock\n");
0366         return ret;
0367     }
0368 
0369     /* Returns zero if e.g. not clocked */
0370     rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
0371     if (!rev)
0372         goto fail;
0373 
0374     musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
0375     if (IS_ERR_OR_NULL(musb->xceiv)) {
0376         ret = -EPROBE_DEFER;
0377         goto fail;
0378     }
0379 
0380     timer_setup(&musb->dev_timer, otg_timer, 0);
0381 
0382     /* Reset the controller */
0383     musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
0384 
0385     /* Start the on-chip PHY and its PLL. */
0386     ret = phy_init(glue->phy);
0387     if (ret) {
0388         dev_err(glue->dev, "Failed to init phy.\n");
0389         goto fail;
0390     }
0391 
0392     ret = phy_power_on(glue->phy);
0393     if (ret) {
0394         dev_err(glue->dev, "Failed to power on phy.\n");
0395         goto err_phy_power_on;
0396     }
0397 
0398     msleep(5);
0399 
0400     /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
0401     pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
0402          musb_readb(reg_base, DA8XX_USB_CTRL_REG));
0403 
0404     musb->isr = da8xx_musb_interrupt;
0405     return 0;
0406 
0407 err_phy_power_on:
0408     phy_exit(glue->phy);
0409 fail:
0410     clk_disable_unprepare(glue->clk);
0411     return ret;
0412 }
0413 
0414 static int da8xx_musb_exit(struct musb *musb)
0415 {
0416     struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
0417 
0418     del_timer_sync(&musb->dev_timer);
0419 
0420     phy_power_off(glue->phy);
0421     phy_exit(glue->phy);
0422     clk_disable_unprepare(glue->clk);
0423 
0424     usb_put_phy(musb->xceiv);
0425 
0426     return 0;
0427 }
0428 
0429 static inline u8 get_vbus_power(struct device *dev)
0430 {
0431     struct regulator *vbus_supply;
0432     int current_uA;
0433 
0434     vbus_supply = regulator_get_optional(dev, "vbus");
0435     if (IS_ERR(vbus_supply))
0436         return 255;
0437     current_uA = regulator_get_current_limit(vbus_supply);
0438     regulator_put(vbus_supply);
0439     if (current_uA <= 0 || current_uA > 510000)
0440         return 255;
0441     return current_uA / 1000 / 2;
0442 }
0443 
0444 #ifdef CONFIG_USB_TI_CPPI41_DMA
0445 static void da8xx_dma_controller_callback(struct dma_controller *c)
0446 {
0447     struct musb *musb = c->musb;
0448     void __iomem *reg_base = musb->ctrl_base;
0449 
0450     musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
0451 }
0452 
0453 static struct dma_controller *
0454 da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
0455 {
0456     struct dma_controller *controller;
0457 
0458     controller = cppi41_dma_controller_create(musb, base);
0459     if (IS_ERR_OR_NULL(controller))
0460         return controller;
0461 
0462     controller->dma_callback = da8xx_dma_controller_callback;
0463 
0464     return controller;
0465 }
0466 #endif
0467 
0468 static const struct musb_platform_ops da8xx_ops = {
0469     .quirks     = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
0470               MUSB_DMA_CPPI41 | MUSB_DA8XX,
0471     .init       = da8xx_musb_init,
0472     .exit       = da8xx_musb_exit,
0473 
0474     .fifo_mode  = 2,
0475 #ifdef CONFIG_USB_TI_CPPI41_DMA
0476     .dma_init   = da8xx_dma_controller_create,
0477     .dma_exit   = cppi41_dma_controller_destroy,
0478 #endif
0479     .enable     = da8xx_musb_enable,
0480     .disable    = da8xx_musb_disable,
0481 
0482     .set_mode   = da8xx_musb_set_mode,
0483     .try_idle   = da8xx_musb_try_idle,
0484 
0485     .set_vbus   = da8xx_musb_set_vbus,
0486 };
0487 
0488 static const struct platform_device_info da8xx_dev_info = {
0489     .name       = "musb-hdrc",
0490     .id     = PLATFORM_DEVID_AUTO,
0491     .dma_mask   = DMA_BIT_MASK(32),
0492 };
0493 
0494 static const struct musb_hdrc_config da8xx_config = {
0495     .ram_bits = 10,
0496     .num_eps = 5,
0497     .multipoint = 1,
0498 };
0499 
0500 static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
0501     OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
0502                NULL),
0503     {}
0504 };
0505 
0506 static int da8xx_probe(struct platform_device *pdev)
0507 {
0508     struct musb_hdrc_platform_data  *pdata = dev_get_platdata(&pdev->dev);
0509     struct da8xx_glue       *glue;
0510     struct platform_device_info pinfo;
0511     struct clk          *clk;
0512     struct device_node      *np = pdev->dev.of_node;
0513     int             ret;
0514 
0515     glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
0516     if (!glue)
0517         return -ENOMEM;
0518 
0519     clk = devm_clk_get(&pdev->dev, NULL);
0520     if (IS_ERR(clk)) {
0521         dev_err(&pdev->dev, "failed to get clock\n");
0522         return PTR_ERR(clk);
0523     }
0524 
0525     glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
0526     if (IS_ERR(glue->phy)) {
0527         if (PTR_ERR(glue->phy) != -EPROBE_DEFER)
0528             dev_err(&pdev->dev, "failed to get phy\n");
0529         return PTR_ERR(glue->phy);
0530     }
0531 
0532     glue->dev           = &pdev->dev;
0533     glue->clk           = clk;
0534 
0535     if (IS_ENABLED(CONFIG_OF) && np) {
0536         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
0537         if (!pdata)
0538             return -ENOMEM;
0539 
0540         pdata->config   = &da8xx_config;
0541         pdata->mode = musb_get_mode(&pdev->dev);
0542         pdata->power    = get_vbus_power(&pdev->dev);
0543     }
0544 
0545     pdata->platform_ops     = &da8xx_ops;
0546 
0547     glue->usb_phy = usb_phy_generic_register();
0548     ret = PTR_ERR_OR_ZERO(glue->usb_phy);
0549     if (ret) {
0550         dev_err(&pdev->dev, "failed to register usb_phy\n");
0551         return ret;
0552     }
0553     platform_set_drvdata(pdev, glue);
0554 
0555     ret = of_platform_populate(pdev->dev.of_node, NULL,
0556                    da8xx_auxdata_lookup, &pdev->dev);
0557     if (ret)
0558         return ret;
0559 
0560     pinfo = da8xx_dev_info;
0561     pinfo.parent = &pdev->dev;
0562     pinfo.res = pdev->resource;
0563     pinfo.num_res = pdev->num_resources;
0564     pinfo.data = pdata;
0565     pinfo.size_data = sizeof(*pdata);
0566     pinfo.fwnode = of_fwnode_handle(np);
0567     pinfo.of_node_reused = true;
0568 
0569     glue->musb = platform_device_register_full(&pinfo);
0570     ret = PTR_ERR_OR_ZERO(glue->musb);
0571     if (ret) {
0572         dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
0573         usb_phy_generic_unregister(glue->usb_phy);
0574     }
0575 
0576     return ret;
0577 }
0578 
0579 static int da8xx_remove(struct platform_device *pdev)
0580 {
0581     struct da8xx_glue       *glue = platform_get_drvdata(pdev);
0582 
0583     platform_device_unregister(glue->musb);
0584     usb_phy_generic_unregister(glue->usb_phy);
0585 
0586     return 0;
0587 }
0588 
0589 #ifdef CONFIG_PM_SLEEP
0590 static int da8xx_suspend(struct device *dev)
0591 {
0592     int ret;
0593     struct da8xx_glue *glue = dev_get_drvdata(dev);
0594 
0595     ret = phy_power_off(glue->phy);
0596     if (ret)
0597         return ret;
0598     clk_disable_unprepare(glue->clk);
0599 
0600     return 0;
0601 }
0602 
0603 static int da8xx_resume(struct device *dev)
0604 {
0605     int ret;
0606     struct da8xx_glue *glue = dev_get_drvdata(dev);
0607 
0608     ret = clk_prepare_enable(glue->clk);
0609     if (ret)
0610         return ret;
0611     return phy_power_on(glue->phy);
0612 }
0613 #endif
0614 
0615 static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
0616 
0617 #ifdef CONFIG_OF
0618 static const struct of_device_id da8xx_id_table[] = {
0619     {
0620         .compatible = "ti,da830-musb",
0621     },
0622     {},
0623 };
0624 MODULE_DEVICE_TABLE(of, da8xx_id_table);
0625 #endif
0626 
0627 static struct platform_driver da8xx_driver = {
0628     .probe      = da8xx_probe,
0629     .remove     = da8xx_remove,
0630     .driver     = {
0631         .name   = "musb-da8xx",
0632         .pm = &da8xx_pm_ops,
0633         .of_match_table = of_match_ptr(da8xx_id_table),
0634     },
0635 };
0636 
0637 MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
0638 MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
0639 MODULE_LICENSE("GPL v2");
0640 module_platform_driver(da8xx_driver);
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