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0010 #include <linux/iopoll.h>
0011 #include <linux/usb/composite.h>
0012
0013 #include "mtu3.h"
0014 #include "mtu3_debug.h"
0015 #include "mtu3_trace.h"
0016
0017
0018 #define next_ep0_request(mtu) next_request((mtu)->ep0)
0019
0020
0021 static const u8 mtu3_test_packet[53] = {
0022
0023
0024
0025 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0026
0027 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
0028
0029 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
0030
0031 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0032
0033 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
0034
0035 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
0036
0037 };
0038
0039 static char *decode_ep0_state(struct mtu3 *mtu)
0040 {
0041 switch (mtu->ep0_state) {
0042 case MU3D_EP0_STATE_SETUP:
0043 return "SETUP";
0044 case MU3D_EP0_STATE_TX:
0045 return "IN";
0046 case MU3D_EP0_STATE_RX:
0047 return "OUT";
0048 case MU3D_EP0_STATE_TX_END:
0049 return "TX-END";
0050 case MU3D_EP0_STATE_STALL:
0051 return "STALL";
0052 default:
0053 return "??";
0054 }
0055 }
0056
0057 static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
0058 {
0059 mtu3_req_complete(mtu->ep0, req, 0);
0060 }
0061
0062 static int
0063 forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
0064 __releases(mtu->lock)
0065 __acquires(mtu->lock)
0066 {
0067 int ret;
0068
0069 if (!mtu->gadget_driver || !mtu->async_callbacks)
0070 return -EOPNOTSUPP;
0071
0072 spin_unlock(&mtu->lock);
0073 ret = mtu->gadget_driver->setup(&mtu->g, setup);
0074 spin_lock(&mtu->lock);
0075
0076 dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
0077 return ret;
0078 }
0079
0080 static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
0081 {
0082 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
0083 u16 index = 0;
0084
0085 dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
0086 __func__, mep->epnum, len, src);
0087
0088 if (len >= 4) {
0089 iowrite32_rep(fifo, src, len >> 2);
0090 index = len & ~0x03;
0091 }
0092 if (len & 0x02) {
0093 writew(*(u16 *)&src[index], fifo);
0094 index += 2;
0095 }
0096 if (len & 0x01)
0097 writeb(src[index], fifo);
0098 }
0099
0100 static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
0101 {
0102 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
0103 u32 value;
0104 u16 index = 0;
0105
0106 dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
0107 __func__, mep->epnum, len, dst);
0108
0109 if (len >= 4) {
0110 ioread32_rep(fifo, dst, len >> 2);
0111 index = len & ~0x03;
0112 }
0113 if (len & 0x3) {
0114 value = readl(fifo);
0115 memcpy(&dst[index], &value, len & 0x3);
0116 }
0117
0118 }
0119
0120 static void ep0_load_test_packet(struct mtu3 *mtu)
0121 {
0122
0123
0124
0125
0126 ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
0127 }
0128
0129
0130
0131
0132
0133
0134
0135 static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
0136 {
0137 struct mtu3 *mtu = mep0->mtu;
0138 void __iomem *mbase = mtu->mac_base;
0139 u32 csr;
0140
0141
0142 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
0143 if (set)
0144 csr |= EP0_SENDSTALL | pktrdy;
0145 else
0146 csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
0147 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
0148
0149 mtu->delayed_status = false;
0150 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
0151
0152 dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
0153 set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
0154 }
0155
0156 static void ep0_do_status_stage(struct mtu3 *mtu)
0157 {
0158 void __iomem *mbase = mtu->mac_base;
0159 u32 value;
0160
0161 value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
0162 mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY | EP0_DATAEND);
0163 }
0164
0165 static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
0166
0167 static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
0168 {}
0169
0170 static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
0171 {
0172 struct mtu3_request *mreq;
0173 struct mtu3 *mtu;
0174 struct usb_set_sel_req sel;
0175
0176 memcpy(&sel, req->buf, sizeof(sel));
0177
0178 mreq = to_mtu3_request(req);
0179 mtu = mreq->mtu;
0180 dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
0181 sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
0182 }
0183
0184
0185 static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
0186 {
0187 int ret;
0188 u16 length = le16_to_cpu(setup->wLength);
0189
0190 if (unlikely(length != 6)) {
0191 dev_err(mtu->dev, "%s wrong wLength:%d\n",
0192 __func__, length);
0193 return -EINVAL;
0194 }
0195
0196 mtu->ep0_req.mep = mtu->ep0;
0197 mtu->ep0_req.request.length = 6;
0198 mtu->ep0_req.request.buf = mtu->setup_buf;
0199 mtu->ep0_req.request.complete = ep0_set_sel_complete;
0200 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
0201
0202 return ret < 0 ? ret : 1;
0203 }
0204
0205 static int
0206 ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
0207 {
0208 struct mtu3_ep *mep = NULL;
0209 int handled = 1;
0210 u8 result[2] = {0, 0};
0211 u8 epnum = 0;
0212 int is_in;
0213
0214 switch (setup->bRequestType & USB_RECIP_MASK) {
0215 case USB_RECIP_DEVICE:
0216 result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
0217 result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
0218
0219 if (mtu->g.speed >= USB_SPEED_SUPER) {
0220 result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
0221 result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
0222 }
0223
0224 dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
0225 result[0], mtu->u1_enable, mtu->u2_enable);
0226
0227 break;
0228 case USB_RECIP_INTERFACE:
0229
0230 handled = 0;
0231 break;
0232 case USB_RECIP_ENDPOINT:
0233 epnum = (u8) le16_to_cpu(setup->wIndex);
0234 is_in = epnum & USB_DIR_IN;
0235 epnum &= USB_ENDPOINT_NUMBER_MASK;
0236
0237 if (epnum >= mtu->num_eps) {
0238 handled = -EINVAL;
0239 break;
0240 }
0241 if (!epnum)
0242 break;
0243
0244 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
0245 if (!mep->desc) {
0246 handled = -EINVAL;
0247 break;
0248 }
0249 if (mep->flags & MTU3_EP_STALL)
0250 result[0] |= 1 << USB_ENDPOINT_HALT;
0251
0252 break;
0253 default:
0254
0255 handled = 0;
0256 break;
0257 }
0258
0259 if (handled > 0) {
0260 int ret;
0261
0262
0263 dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
0264 memcpy(mtu->setup_buf, result, sizeof(result));
0265 mtu->ep0_req.mep = mtu->ep0;
0266 mtu->ep0_req.request.length = 2;
0267 mtu->ep0_req.request.buf = &mtu->setup_buf;
0268 mtu->ep0_req.request.complete = ep0_dummy_complete;
0269 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
0270 if (ret < 0)
0271 handled = ret;
0272 }
0273 return handled;
0274 }
0275
0276 static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
0277 {
0278 void __iomem *mbase = mtu->mac_base;
0279 int handled = 1;
0280 u32 value;
0281
0282 switch (le16_to_cpu(setup->wIndex) >> 8) {
0283 case USB_TEST_J:
0284 dev_dbg(mtu->dev, "USB_TEST_J\n");
0285 mtu->test_mode_nr = TEST_J_MODE;
0286 break;
0287 case USB_TEST_K:
0288 dev_dbg(mtu->dev, "USB_TEST_K\n");
0289 mtu->test_mode_nr = TEST_K_MODE;
0290 break;
0291 case USB_TEST_SE0_NAK:
0292 dev_dbg(mtu->dev, "USB_TEST_SE0_NAK\n");
0293 mtu->test_mode_nr = TEST_SE0_NAK_MODE;
0294 break;
0295 case USB_TEST_PACKET:
0296 dev_dbg(mtu->dev, "USB_TEST_PACKET\n");
0297 mtu->test_mode_nr = TEST_PACKET_MODE;
0298 break;
0299 default:
0300 handled = -EINVAL;
0301 goto out;
0302 }
0303
0304 mtu->test_mode = true;
0305
0306
0307 if (mtu->test_mode_nr == TEST_PACKET_MODE)
0308 ep0_load_test_packet(mtu);
0309
0310
0311 ep0_do_status_stage(mtu);
0312
0313
0314 readl_poll_timeout_atomic(mbase + U3D_EP0CSR, value,
0315 !(value & EP0_DATAEND), 100, 5000);
0316
0317 mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
0318
0319 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
0320
0321 out:
0322 return handled;
0323 }
0324
0325 static int ep0_handle_feature_dev(struct mtu3 *mtu,
0326 struct usb_ctrlrequest *setup, bool set)
0327 {
0328 void __iomem *mbase = mtu->mac_base;
0329 int handled = -EINVAL;
0330 u32 lpc;
0331
0332 switch (le16_to_cpu(setup->wValue)) {
0333 case USB_DEVICE_REMOTE_WAKEUP:
0334 mtu->may_wakeup = !!set;
0335 handled = 1;
0336 break;
0337 case USB_DEVICE_TEST_MODE:
0338 if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
0339 (le16_to_cpu(setup->wIndex) & 0xff))
0340 break;
0341
0342 handled = handle_test_mode(mtu, setup);
0343 break;
0344 case USB_DEVICE_U1_ENABLE:
0345 if (mtu->g.speed < USB_SPEED_SUPER ||
0346 mtu->g.state != USB_STATE_CONFIGURED)
0347 break;
0348
0349 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
0350 if (set)
0351 lpc |= SW_U1_REQUEST_ENABLE;
0352 else
0353 lpc &= ~SW_U1_REQUEST_ENABLE;
0354 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
0355
0356 mtu->u1_enable = !!set;
0357 handled = 1;
0358 break;
0359 case USB_DEVICE_U2_ENABLE:
0360 if (mtu->g.speed < USB_SPEED_SUPER ||
0361 mtu->g.state != USB_STATE_CONFIGURED)
0362 break;
0363
0364 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
0365 if (set)
0366 lpc |= SW_U2_REQUEST_ENABLE;
0367 else
0368 lpc &= ~SW_U2_REQUEST_ENABLE;
0369 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
0370
0371 mtu->u2_enable = !!set;
0372 handled = 1;
0373 break;
0374 default:
0375 handled = -EINVAL;
0376 break;
0377 }
0378 return handled;
0379 }
0380
0381 static int ep0_handle_feature(struct mtu3 *mtu,
0382 struct usb_ctrlrequest *setup, bool set)
0383 {
0384 struct mtu3_ep *mep;
0385 int handled = -EINVAL;
0386 int is_in;
0387 u16 value;
0388 u16 index;
0389 u8 epnum;
0390
0391 value = le16_to_cpu(setup->wValue);
0392 index = le16_to_cpu(setup->wIndex);
0393
0394 switch (setup->bRequestType & USB_RECIP_MASK) {
0395 case USB_RECIP_DEVICE:
0396 handled = ep0_handle_feature_dev(mtu, setup, set);
0397 break;
0398 case USB_RECIP_INTERFACE:
0399
0400 if (value == USB_INTRF_FUNC_SUSPEND &&
0401 mtu->g.speed >= USB_SPEED_SUPER) {
0402
0403 mtu->may_wakeup = !!(index & USB_INTRF_FUNC_SUSPEND_RW);
0404 handled = 0;
0405 }
0406 break;
0407 case USB_RECIP_ENDPOINT:
0408 epnum = index & USB_ENDPOINT_NUMBER_MASK;
0409 if (epnum == 0 || epnum >= mtu->num_eps ||
0410 value != USB_ENDPOINT_HALT)
0411 break;
0412
0413 is_in = index & USB_DIR_IN;
0414 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
0415 if (!mep->desc)
0416 break;
0417
0418 handled = 1;
0419
0420 if (mep->flags & MTU3_EP_WEDGE)
0421 break;
0422
0423 mtu3_ep_stall_set(mep, set);
0424 break;
0425 default:
0426
0427 handled = 0;
0428 break;
0429 }
0430 return handled;
0431 }
0432
0433
0434
0435
0436
0437
0438
0439
0440 static int handle_standard_request(struct mtu3 *mtu,
0441 struct usb_ctrlrequest *setup)
0442 {
0443 void __iomem *mbase = mtu->mac_base;
0444 enum usb_device_state state = mtu->g.state;
0445 int handled = -EINVAL;
0446 u32 dev_conf;
0447 u16 value;
0448
0449 value = le16_to_cpu(setup->wValue);
0450
0451
0452 switch (setup->bRequest) {
0453 case USB_REQ_SET_ADDRESS:
0454
0455 mtu->address = (u8) (value & 0x7f);
0456 dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
0457
0458 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
0459 dev_conf &= ~DEV_ADDR_MSK;
0460 dev_conf |= DEV_ADDR(mtu->address);
0461 mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
0462
0463 if (mtu->address)
0464 usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
0465 else
0466 usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
0467
0468 handled = 1;
0469 break;
0470 case USB_REQ_SET_CONFIGURATION:
0471 if (state == USB_STATE_ADDRESS) {
0472 usb_gadget_set_state(&mtu->g,
0473 USB_STATE_CONFIGURED);
0474 } else if (state == USB_STATE_CONFIGURED) {
0475
0476
0477
0478
0479 if (!value)
0480 usb_gadget_set_state(&mtu->g,
0481 USB_STATE_ADDRESS);
0482 }
0483 handled = 0;
0484 break;
0485 case USB_REQ_CLEAR_FEATURE:
0486 handled = ep0_handle_feature(mtu, setup, 0);
0487 break;
0488 case USB_REQ_SET_FEATURE:
0489 handled = ep0_handle_feature(mtu, setup, 1);
0490 break;
0491 case USB_REQ_GET_STATUS:
0492 handled = ep0_get_status(mtu, setup);
0493 break;
0494 case USB_REQ_SET_SEL:
0495 handled = ep0_set_sel(mtu, setup);
0496 break;
0497 case USB_REQ_SET_ISOCH_DELAY:
0498 handled = 1;
0499 break;
0500 default:
0501
0502 handled = 0;
0503 }
0504
0505 return handled;
0506 }
0507
0508
0509 static void ep0_rx_state(struct mtu3 *mtu)
0510 {
0511 struct mtu3_request *mreq;
0512 struct usb_request *req;
0513 void __iomem *mbase = mtu->mac_base;
0514 u32 maxp;
0515 u32 csr;
0516 u16 count = 0;
0517
0518 dev_dbg(mtu->dev, "%s\n", __func__);
0519
0520 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
0521 mreq = next_ep0_request(mtu);
0522 req = &mreq->request;
0523
0524
0525 if (req) {
0526 void *buf = req->buf + req->actual;
0527 unsigned int len = req->length - req->actual;
0528
0529
0530 count = mtu3_readl(mbase, U3D_RXCOUNT0);
0531 if (count > len) {
0532 req->status = -EOVERFLOW;
0533 count = len;
0534 }
0535 ep0_read_fifo(mtu->ep0, buf, count);
0536 req->actual += count;
0537 csr |= EP0_RXPKTRDY;
0538
0539 maxp = mtu->g.ep0->maxpacket;
0540 if (count < maxp || req->actual == req->length) {
0541 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
0542 dev_dbg(mtu->dev, "ep0 state: %s\n",
0543 decode_ep0_state(mtu));
0544
0545 csr |= EP0_DATAEND;
0546 } else {
0547 req = NULL;
0548 }
0549 } else {
0550 csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
0551 dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
0552 }
0553
0554 mtu3_writel(mbase, U3D_EP0CSR, csr);
0555
0556
0557 if (req)
0558 ep0_req_giveback(mtu, req);
0559
0560 }
0561
0562
0563 static void ep0_tx_state(struct mtu3 *mtu)
0564 {
0565 struct mtu3_request *mreq = next_ep0_request(mtu);
0566 struct usb_request *req;
0567 u32 csr;
0568 u8 *src;
0569 u32 count;
0570 u32 maxp;
0571
0572 dev_dbg(mtu->dev, "%s\n", __func__);
0573
0574 if (!mreq)
0575 return;
0576
0577 maxp = mtu->g.ep0->maxpacket;
0578 req = &mreq->request;
0579
0580
0581 src = (u8 *)req->buf + req->actual;
0582 count = min(maxp, req->length - req->actual);
0583 if (count)
0584 ep0_write_fifo(mtu->ep0, src, count);
0585
0586 dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
0587 __func__, req->actual, req->length, count, maxp, req->zero);
0588
0589 req->actual += count;
0590
0591 if ((count < maxp)
0592 || ((req->actual == req->length) && !req->zero))
0593 mtu->ep0_state = MU3D_EP0_STATE_TX_END;
0594
0595
0596 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
0597 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
0598
0599 dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
0600 mtu3_readl(mtu->mac_base, U3D_EP0CSR));
0601 }
0602
0603 static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
0604 {
0605 struct mtu3_request *mreq;
0606 u32 count;
0607 u32 csr;
0608
0609 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
0610 count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
0611
0612 ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
0613
0614 dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
0615 setup->bRequestType, setup->bRequest,
0616 le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
0617 le16_to_cpu(setup->wLength));
0618
0619
0620 mreq = next_ep0_request(mtu);
0621 if (mreq)
0622 ep0_req_giveback(mtu, &mreq->request);
0623
0624 if (le16_to_cpu(setup->wLength) == 0) {
0625 ;
0626 } else if (setup->bRequestType & USB_DIR_IN) {
0627 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
0628 csr | EP0_SETUPPKTRDY | EP0_DPHTX);
0629 mtu->ep0_state = MU3D_EP0_STATE_TX;
0630 } else {
0631 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
0632 (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
0633 mtu->ep0_state = MU3D_EP0_STATE_RX;
0634 }
0635 }
0636
0637 static int ep0_handle_setup(struct mtu3 *mtu)
0638 __releases(mtu->lock)
0639 __acquires(mtu->lock)
0640 {
0641 struct usb_ctrlrequest setup;
0642 struct mtu3_request *mreq;
0643 int handled = 0;
0644
0645 ep0_read_setup(mtu, &setup);
0646 trace_mtu3_handle_setup(&setup);
0647
0648 if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
0649 handled = handle_standard_request(mtu, &setup);
0650
0651 dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
0652 handled, decode_ep0_state(mtu));
0653
0654 if (handled < 0)
0655 goto stall;
0656 else if (handled > 0)
0657 goto finish;
0658
0659 handled = forward_to_driver(mtu, &setup);
0660 if (handled < 0) {
0661 stall:
0662 dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
0663
0664 ep0_stall_set(mtu->ep0, true,
0665 le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
0666
0667 return 0;
0668 }
0669
0670 finish:
0671 if (mtu->test_mode) {
0672 ;
0673 } else if (handled == USB_GADGET_DELAYED_STATUS) {
0674
0675 mreq = next_ep0_request(mtu);
0676 if (mreq) {
0677
0678 ep0_do_status_stage(mtu);
0679 ep0_req_giveback(mtu, &mreq->request);
0680 } else {
0681
0682 mtu->delayed_status = true;
0683 }
0684 } else if (le16_to_cpu(setup.wLength) == 0) {
0685
0686 ep0_do_status_stage(mtu);
0687
0688 mreq = next_ep0_request(mtu);
0689 if (mreq && !mreq->request.length)
0690 ep0_req_giveback(mtu, &mreq->request);
0691 }
0692
0693 return 0;
0694 }
0695
0696 irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
0697 {
0698 void __iomem *mbase = mtu->mac_base;
0699 struct mtu3_request *mreq;
0700 u32 int_status;
0701 irqreturn_t ret = IRQ_NONE;
0702 u32 csr;
0703 u32 len;
0704
0705 int_status = mtu3_readl(mbase, U3D_EPISR);
0706 int_status &= mtu3_readl(mbase, U3D_EPIER);
0707 mtu3_writel(mbase, U3D_EPISR, int_status);
0708
0709
0710 if (!(int_status & (EP0ISR | SETUPENDISR)))
0711 return IRQ_NONE;
0712
0713
0714 if (int_status & SETUPENDISR)
0715 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
0716
0717 csr = mtu3_readl(mbase, U3D_EP0CSR);
0718
0719 dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
0720
0721
0722 if (csr & EP0_SENTSTALL) {
0723 ep0_stall_set(mtu->ep0, false, 0);
0724 csr = mtu3_readl(mbase, U3D_EP0CSR);
0725 ret = IRQ_HANDLED;
0726 }
0727 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
0728 mtu3_dbg_trace(mtu->dev, "ep0_state %s", decode_ep0_state(mtu));
0729
0730 switch (mtu->ep0_state) {
0731 case MU3D_EP0_STATE_TX:
0732
0733 if ((csr & EP0_FIFOFULL) == 0) {
0734 ep0_tx_state(mtu);
0735 ret = IRQ_HANDLED;
0736 }
0737 break;
0738 case MU3D_EP0_STATE_RX:
0739
0740 if (csr & EP0_RXPKTRDY) {
0741 ep0_rx_state(mtu);
0742 ret = IRQ_HANDLED;
0743 }
0744 break;
0745 case MU3D_EP0_STATE_TX_END:
0746 mtu3_writel(mbase, U3D_EP0CSR,
0747 (csr & EP0_W1C_BITS) | EP0_DATAEND);
0748
0749 mreq = next_ep0_request(mtu);
0750 if (mreq)
0751 ep0_req_giveback(mtu, &mreq->request);
0752
0753 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
0754 ret = IRQ_HANDLED;
0755 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
0756 break;
0757 case MU3D_EP0_STATE_SETUP:
0758 if (!(csr & EP0_SETUPPKTRDY))
0759 break;
0760
0761 len = mtu3_readl(mbase, U3D_RXCOUNT0);
0762 if (len != 8) {
0763 dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
0764 break;
0765 }
0766
0767 ep0_handle_setup(mtu);
0768 ret = IRQ_HANDLED;
0769 break;
0770 default:
0771
0772 ep0_stall_set(mtu->ep0, true, 0);
0773 WARN_ON(1);
0774 break;
0775 }
0776
0777 return ret;
0778 }
0779
0780
0781 static int mtu3_ep0_enable(struct usb_ep *ep,
0782 const struct usb_endpoint_descriptor *desc)
0783 {
0784
0785 return -EINVAL;
0786 }
0787
0788 static int mtu3_ep0_disable(struct usb_ep *ep)
0789 {
0790
0791 return -EINVAL;
0792 }
0793
0794 static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
0795 {
0796 struct mtu3 *mtu = mep->mtu;
0797
0798 mreq->mtu = mtu;
0799 mreq->request.actual = 0;
0800 mreq->request.status = -EINPROGRESS;
0801
0802 dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
0803 mep->name, decode_ep0_state(mtu), mreq->request.length);
0804
0805 switch (mtu->ep0_state) {
0806 case MU3D_EP0_STATE_SETUP:
0807 case MU3D_EP0_STATE_RX:
0808 case MU3D_EP0_STATE_TX:
0809 break;
0810 default:
0811 dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
0812 decode_ep0_state(mtu));
0813 return -EINVAL;
0814 }
0815
0816 if (mtu->delayed_status) {
0817
0818 mtu->delayed_status = false;
0819 ep0_do_status_stage(mtu);
0820
0821 return 0;
0822 }
0823
0824 if (!list_empty(&mep->req_list))
0825 return -EBUSY;
0826
0827 list_add_tail(&mreq->list, &mep->req_list);
0828
0829
0830 if (mtu->ep0_state == MU3D_EP0_STATE_TX)
0831 ep0_tx_state(mtu);
0832
0833 return 0;
0834 }
0835
0836 static int mtu3_ep0_queue(struct usb_ep *ep,
0837 struct usb_request *req, gfp_t gfp)
0838 {
0839 struct mtu3_ep *mep;
0840 struct mtu3_request *mreq;
0841 struct mtu3 *mtu;
0842 unsigned long flags;
0843 int ret = 0;
0844
0845 if (!ep || !req)
0846 return -EINVAL;
0847
0848 mep = to_mtu3_ep(ep);
0849 mtu = mep->mtu;
0850 mreq = to_mtu3_request(req);
0851
0852 spin_lock_irqsave(&mtu->lock, flags);
0853 ret = ep0_queue(mep, mreq);
0854 spin_unlock_irqrestore(&mtu->lock, flags);
0855 return ret;
0856 }
0857
0858 static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
0859 {
0860
0861 return -EINVAL;
0862 }
0863
0864 static int mtu3_ep0_halt(struct usb_ep *ep, int value)
0865 {
0866 struct mtu3_ep *mep;
0867 struct mtu3 *mtu;
0868 unsigned long flags;
0869 int ret = 0;
0870
0871 if (!ep || !value)
0872 return -EINVAL;
0873
0874 mep = to_mtu3_ep(ep);
0875 mtu = mep->mtu;
0876
0877 dev_dbg(mtu->dev, "%s\n", __func__);
0878
0879 spin_lock_irqsave(&mtu->lock, flags);
0880
0881 if (!list_empty(&mep->req_list)) {
0882 ret = -EBUSY;
0883 goto cleanup;
0884 }
0885
0886 switch (mtu->ep0_state) {
0887
0888
0889
0890
0891 case MU3D_EP0_STATE_TX:
0892 case MU3D_EP0_STATE_TX_END:
0893 case MU3D_EP0_STATE_RX:
0894 case MU3D_EP0_STATE_SETUP:
0895 ep0_stall_set(mtu->ep0, true, 0);
0896 break;
0897 default:
0898 dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
0899 decode_ep0_state(mtu));
0900 ret = -EINVAL;
0901 }
0902
0903 cleanup:
0904 spin_unlock_irqrestore(&mtu->lock, flags);
0905 return ret;
0906 }
0907
0908 const struct usb_ep_ops mtu3_ep0_ops = {
0909 .enable = mtu3_ep0_enable,
0910 .disable = mtu3_ep0_disable,
0911 .alloc_request = mtu3_alloc_request,
0912 .free_request = mtu3_free_request,
0913 .queue = mtu3_ep0_queue,
0914 .dequeue = mtu3_ep0_dequeue,
0915 .set_halt = mtu3_ep0_halt,
0916 };