usb/host/xhci-rcar.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * drivers/usb/host/xhci-rcar.h
0004  *
0005  * Copyright (C) 2014 Renesas Electronics Corporation
0006  */
0007
0008 #ifndef _XHCI_RCAR_H
0009 #define _XHCI_RCAR_H
0010
0011 #define XHCI_RCAR_FIRMWARE_NAME_V1  "r8a779x_usb3_v1.dlmem"
0012 #define XHCI_RCAR_FIRMWARE_NAME_V2  "r8a779x_usb3_v2.dlmem"
0013 #define XHCI_RCAR_FIRMWARE_NAME_V3  "r8a779x_usb3_v3.dlmem"
0014
0015 #if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
0016 void xhci_rcar_start(struct usb_hcd *hcd);
0017 int xhci_rcar_init_quirk(struct usb_hcd *hcd);
0018 int xhci_rcar_resume_quirk(struct usb_hcd *hcd);
0019 #else
0020 static inline void xhci_rcar_start(struct usb_hcd *hcd)
0021 {
0022 }
0023
0024 static inline int xhci_rcar_init_quirk(struct usb_hcd *hcd)
0025 {
0026     return 0;
0027 }
0028
0029 static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
0030 {
0031     return 0;
0032 }
0033 #endif
0034
0035 /*
0036  * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
0037  * to 1. However, these SoCs don't support 64-bit address memory
0038  * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
0039  * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
0040  * xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
0041  *
0042  * And, since the firmware/internal CPU control the USBSTS.STS_HALT
0043  * and the process speed is down when the roothub port enters U3,
0044  * long delay for the handshake of STS_HALT is neeed in xhci_suspend()
0045  * by using the XHCI_SLOW_SUSPEND quirk.
0046  */
0047 #define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware)               \
0048     .firmware_name = firmware,                  \
0049     .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH |    \
0050           XHCI_SLOW_SUSPEND,                    \
0051     .init_quirk = xhci_rcar_init_quirk,             \
0052     .plat_start = xhci_rcar_start,                  \
0053     .resume_quirk = xhci_rcar_resume_quirk,
0054
0055 #endif /* _XHCI_RCAR_H */