usb/host/xhci-ext-caps.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * XHCI extended capability handling
0004  *
0005  * Copyright (c) 2017 Hans de Goede <hdegoede@redhat.com>
0006  */
0007
0008 #include <linux/platform_device.h>
0009 #include <linux/property.h>
0010 #include <linux/pci.h>
0011 #include "xhci.h"
0012
0013 #define USB_SW_DRV_NAME     "intel_xhci_usb_sw"
0014 #define USB_SW_RESOURCE_SIZE    0x400
0015
0016 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
0017
0018 static const struct property_entry role_switch_props[] = {
0019     PROPERTY_ENTRY_BOOL("sw_switch_disable"),
0020     {},
0021 };
0022
0023 static void xhci_intel_unregister_pdev(void *arg)
0024 {
0025     platform_device_unregister(arg);
0026 }
0027
0028 static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset)
0029 {
0030     struct usb_hcd *hcd = xhci_to_hcd(xhci);
0031     struct device *dev = hcd->self.controller;
0032     struct platform_device *pdev;
0033     struct pci_dev *pci = to_pci_dev(dev);
0034     struct resource res = { 0, };
0035     int ret;
0036
0037     pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE);
0038     if (!pdev) {
0039         xhci_err(xhci, "couldn't allocate %s platform device\n",
0040              USB_SW_DRV_NAME);
0041         return -ENOMEM;
0042     }
0043
0044     res.start = hcd->rsrc_start + cap_offset;
0045     res.end   = res.start + USB_SW_RESOURCE_SIZE - 1;
0046     res.name  = USB_SW_DRV_NAME;
0047     res.flags = IORESOURCE_MEM;
0048
0049     ret = platform_device_add_resources(pdev, &res, 1);
0050     if (ret) {
0051         dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n");
0052         platform_device_put(pdev);
0053         return ret;
0054     }
0055
0056     if (pci->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
0057         ret = device_create_managed_software_node(&pdev->dev, role_switch_props,
0058                               NULL);
0059         if (ret) {
0060             dev_err(dev, "failed to register device properties\n");
0061             platform_device_put(pdev);
0062             return ret;
0063         }
0064     }
0065
0066     pdev->dev.parent = dev;
0067
0068     ret = platform_device_add(pdev);
0069     if (ret) {
0070         dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n");
0071         platform_device_put(pdev);
0072         return ret;
0073     }
0074
0075     ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev);
0076     if (ret) {
0077         dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n");
0078         return ret;
0079     }
0080
0081     return 0;
0082 }
0083
0084 int xhci_ext_cap_init(struct xhci_hcd *xhci)
0085 {
0086     void __iomem *base = &xhci->cap_regs->hc_capbase;
0087     u32 offset, val;
0088     int ret;
0089
0090     offset = xhci_find_next_ext_cap(base, 0, 0);
0091
0092     while (offset) {
0093         val = readl(base + offset);
0094
0095         switch (XHCI_EXT_CAPS_ID(val)) {
0096         case XHCI_EXT_CAPS_VENDOR_INTEL:
0097             if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) {
0098                 ret = xhci_create_intel_xhci_sw_pdev(xhci,
0099                                      offset);
0100                 if (ret)
0101                     return ret;
0102             }
0103             break;
0104         }
0105         offset = xhci_find_next_ext_cap(base, offset, 0);
0106     }
0107
0108     return 0;
0109 }
0110 EXPORT_SYMBOL_GPL(xhci_ext_cap_init);