0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013 #include <linux/module.h>
0014 #include <linux/kernel.h>
0015 #include <linux/sched.h>
0016 #include <linux/errno.h>
0017 #include <linux/timer.h>
0018 #include <linux/delay.h>
0019 #include <linux/list.h>
0020 #include <linux/interrupt.h>
0021 #include <linux/usb.h>
0022 #include <linux/usb/hcd.h>
0023 #include <linux/platform_device.h>
0024 #include <linux/io.h>
0025 #include <linux/mm.h>
0026 #include <linux/irq.h>
0027 #include <linux/slab.h>
0028 #include <asm/cacheflush.h>
0029
0030 #include "r8a66597.h"
0031
0032 MODULE_DESCRIPTION("R8A66597 USB Host Controller Driver");
0033 MODULE_LICENSE("GPL");
0034 MODULE_AUTHOR("Yoshihiro Shimoda");
0035 MODULE_ALIAS("platform:r8a66597_hcd");
0036
0037 #define DRIVER_VERSION "2009-05-26"
0038
0039 static const char hcd_name[] = "r8a66597_hcd";
0040
0041 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum);
0042 static int r8a66597_get_frame(struct usb_hcd *hcd);
0043
0044
0045 static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
0046 unsigned long reg)
0047 {
0048 u16 tmp;
0049
0050 tmp = r8a66597_read(r8a66597, INTENB0);
0051 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
0052 r8a66597_bset(r8a66597, 1 << pipenum, reg);
0053 r8a66597_write(r8a66597, tmp, INTENB0);
0054 }
0055
0056
0057 static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
0058 unsigned long reg)
0059 {
0060 u16 tmp;
0061
0062 tmp = r8a66597_read(r8a66597, INTENB0);
0063 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
0064 r8a66597_bclr(r8a66597, 1 << pipenum, reg);
0065 r8a66597_write(r8a66597, tmp, INTENB0);
0066 }
0067
0068 static void set_devadd_reg(struct r8a66597 *r8a66597, u8 r8a66597_address,
0069 u16 usbspd, u8 upphub, u8 hubport, int port)
0070 {
0071 u16 val;
0072 unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
0073
0074 val = (upphub << 11) | (hubport << 8) | (usbspd << 6) | (port & 0x0001);
0075 r8a66597_write(r8a66597, val, devadd_reg);
0076 }
0077
0078 static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
0079 {
0080 u16 tmp;
0081 int i = 0;
0082
0083 if (r8a66597->pdata->on_chip) {
0084 clk_prepare_enable(r8a66597->clk);
0085 do {
0086 r8a66597_write(r8a66597, SCKE, SYSCFG0);
0087 tmp = r8a66597_read(r8a66597, SYSCFG0);
0088 if (i++ > 1000) {
0089 printk(KERN_ERR "r8a66597: reg access fail.\n");
0090 return -ENXIO;
0091 }
0092 } while ((tmp & SCKE) != SCKE);
0093 r8a66597_write(r8a66597, 0x04, 0x02);
0094 } else {
0095 do {
0096 r8a66597_write(r8a66597, USBE, SYSCFG0);
0097 tmp = r8a66597_read(r8a66597, SYSCFG0);
0098 if (i++ > 1000) {
0099 printk(KERN_ERR "r8a66597: reg access fail.\n");
0100 return -ENXIO;
0101 }
0102 } while ((tmp & USBE) != USBE);
0103 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
0104 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
0105 XTAL, SYSCFG0);
0106
0107 i = 0;
0108 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
0109 do {
0110 msleep(1);
0111 tmp = r8a66597_read(r8a66597, SYSCFG0);
0112 if (i++ > 500) {
0113 printk(KERN_ERR "r8a66597: reg access fail.\n");
0114 return -ENXIO;
0115 }
0116 } while ((tmp & SCKE) != SCKE);
0117 }
0118
0119 return 0;
0120 }
0121
0122 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
0123 {
0124 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
0125 udelay(1);
0126
0127 if (r8a66597->pdata->on_chip) {
0128 clk_disable_unprepare(r8a66597->clk);
0129 } else {
0130 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
0131 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
0132 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
0133 }
0134 }
0135
0136 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
0137 {
0138 u16 val;
0139
0140 val = port ? DRPD : DCFM | DRPD;
0141 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
0142 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
0143
0144 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
0145 r8a66597_bclr(r8a66597, DTCHE, get_intenb_reg(port));
0146 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
0147 }
0148
0149 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
0150 {
0151 u16 val, tmp;
0152
0153 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
0154 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
0155
0156 r8a66597_port_power(r8a66597, port, 0);
0157
0158 do {
0159 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
0160 udelay(640);
0161 } while (tmp == EDGESTS);
0162
0163 val = port ? DRPD : DCFM | DRPD;
0164 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
0165 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
0166 }
0167
0168 static int enable_controller(struct r8a66597 *r8a66597)
0169 {
0170 int ret, port;
0171 u16 vif = r8a66597->pdata->vif ? LDRV : 0;
0172 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
0173 u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
0174
0175 ret = r8a66597_clock_enable(r8a66597);
0176 if (ret < 0)
0177 return ret;
0178
0179 r8a66597_bset(r8a66597, vif & LDRV, PINCFG);
0180 r8a66597_bset(r8a66597, USBE, SYSCFG0);
0181
0182 r8a66597_bset(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
0183 r8a66597_bset(r8a66597, irq_sense & INTL, SOFCFG);
0184 r8a66597_bset(r8a66597, BRDY0, BRDYENB);
0185 r8a66597_bset(r8a66597, BEMP0, BEMPENB);
0186
0187 r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL);
0188 r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL);
0189 r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL);
0190 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
0191
0192 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1);
0193
0194 for (port = 0; port < r8a66597->max_root_hub; port++)
0195 r8a66597_enable_port(r8a66597, port);
0196
0197 return 0;
0198 }
0199
0200 static void disable_controller(struct r8a66597 *r8a66597)
0201 {
0202 int port;
0203
0204
0205 r8a66597_write(r8a66597, 0, INTENB0);
0206 r8a66597_write(r8a66597, 0, INTENB1);
0207 r8a66597_write(r8a66597, 0, BRDYENB);
0208 r8a66597_write(r8a66597, 0, BEMPENB);
0209 r8a66597_write(r8a66597, 0, NRDYENB);
0210
0211
0212 r8a66597_write(r8a66597, 0, BRDYSTS);
0213 r8a66597_write(r8a66597, 0, NRDYSTS);
0214 r8a66597_write(r8a66597, 0, BEMPSTS);
0215
0216 for (port = 0; port < r8a66597->max_root_hub; port++)
0217 r8a66597_disable_port(r8a66597, port);
0218
0219 r8a66597_clock_disable(r8a66597);
0220 }
0221
0222 static int get_parent_r8a66597_address(struct r8a66597 *r8a66597,
0223 struct usb_device *udev)
0224 {
0225 struct r8a66597_device *dev;
0226
0227 if (udev->parent && udev->parent->devnum != 1)
0228 udev = udev->parent;
0229
0230 dev = dev_get_drvdata(&udev->dev);
0231 if (dev)
0232 return dev->address;
0233 else
0234 return 0;
0235 }
0236
0237 static int is_child_device(char *devpath)
0238 {
0239 return (devpath[2] ? 1 : 0);
0240 }
0241
0242 static int is_hub_limit(char *devpath)
0243 {
0244 return ((strlen(devpath) >= 4) ? 1 : 0);
0245 }
0246
0247 static void get_port_number(struct r8a66597 *r8a66597,
0248 char *devpath, u16 *root_port, u16 *hub_port)
0249 {
0250 if (root_port) {
0251 *root_port = (devpath[0] & 0x0F) - 1;
0252 if (*root_port >= r8a66597->max_root_hub)
0253 printk(KERN_ERR "r8a66597: Illegal root port number.\n");
0254 }
0255 if (hub_port)
0256 *hub_port = devpath[2] & 0x0F;
0257 }
0258
0259 static u16 get_r8a66597_usb_speed(enum usb_device_speed speed)
0260 {
0261 u16 usbspd = 0;
0262
0263 switch (speed) {
0264 case USB_SPEED_LOW:
0265 usbspd = LSMODE;
0266 break;
0267 case USB_SPEED_FULL:
0268 usbspd = FSMODE;
0269 break;
0270 case USB_SPEED_HIGH:
0271 usbspd = HSMODE;
0272 break;
0273 default:
0274 printk(KERN_ERR "r8a66597: unknown speed\n");
0275 break;
0276 }
0277
0278 return usbspd;
0279 }
0280
0281 static void set_child_connect_map(struct r8a66597 *r8a66597, int address)
0282 {
0283 int idx;
0284
0285 idx = address / 32;
0286 r8a66597->child_connect_map[idx] |= 1 << (address % 32);
0287 }
0288
0289 static void put_child_connect_map(struct r8a66597 *r8a66597, int address)
0290 {
0291 int idx;
0292
0293 idx = address / 32;
0294 r8a66597->child_connect_map[idx] &= ~(1 << (address % 32));
0295 }
0296
0297 static void set_pipe_reg_addr(struct r8a66597_pipe *pipe, u8 dma_ch)
0298 {
0299 u16 pipenum = pipe->info.pipenum;
0300 const unsigned long fifoaddr[] = {D0FIFO, D1FIFO, CFIFO};
0301 const unsigned long fifosel[] = {D0FIFOSEL, D1FIFOSEL, CFIFOSEL};
0302 const unsigned long fifoctr[] = {D0FIFOCTR, D1FIFOCTR, CFIFOCTR};
0303
0304 if (dma_ch > R8A66597_PIPE_NO_DMA)
0305 dma_ch = R8A66597_PIPE_NO_DMA;
0306
0307 pipe->fifoaddr = fifoaddr[dma_ch];
0308 pipe->fifosel = fifosel[dma_ch];
0309 pipe->fifoctr = fifoctr[dma_ch];
0310
0311 if (pipenum == 0)
0312 pipe->pipectr = DCPCTR;
0313 else
0314 pipe->pipectr = get_pipectr_addr(pipenum);
0315
0316 if (check_bulk_or_isoc(pipenum)) {
0317 pipe->pipetre = get_pipetre_addr(pipenum);
0318 pipe->pipetrn = get_pipetrn_addr(pipenum);
0319 } else {
0320 pipe->pipetre = 0;
0321 pipe->pipetrn = 0;
0322 }
0323 }
0324
0325 static struct r8a66597_device *
0326 get_urb_to_r8a66597_dev(struct r8a66597 *r8a66597, struct urb *urb)
0327 {
0328 if (usb_pipedevice(urb->pipe) == 0)
0329 return &r8a66597->device0;
0330
0331 return dev_get_drvdata(&urb->dev->dev);
0332 }
0333
0334 static int make_r8a66597_device(struct r8a66597 *r8a66597,
0335 struct urb *urb, u8 addr)
0336 {
0337 struct r8a66597_device *dev;
0338 int usb_address = urb->setup_packet[2];
0339
0340 dev = kzalloc(sizeof(struct r8a66597_device), GFP_ATOMIC);
0341 if (dev == NULL)
0342 return -ENOMEM;
0343
0344 dev_set_drvdata(&urb->dev->dev, dev);
0345 dev->udev = urb->dev;
0346 dev->address = addr;
0347 dev->usb_address = usb_address;
0348 dev->state = USB_STATE_ADDRESS;
0349 dev->ep_in_toggle = 0;
0350 dev->ep_out_toggle = 0;
0351 INIT_LIST_HEAD(&dev->device_list);
0352 list_add_tail(&dev->device_list, &r8a66597->child_device);
0353
0354 get_port_number(r8a66597, urb->dev->devpath,
0355 &dev->root_port, &dev->hub_port);
0356 if (!is_child_device(urb->dev->devpath))
0357 r8a66597->root_hub[dev->root_port].dev = dev;
0358
0359 set_devadd_reg(r8a66597, dev->address,
0360 get_r8a66597_usb_speed(urb->dev->speed),
0361 get_parent_r8a66597_address(r8a66597, urb->dev),
0362 dev->hub_port, dev->root_port);
0363
0364 return 0;
0365 }
0366
0367
0368 static u8 alloc_usb_address(struct r8a66597 *r8a66597, struct urb *urb)
0369 {
0370 u8 addr;
0371 struct r8a66597_device *dev;
0372
0373 if (is_hub_limit(urb->dev->devpath)) {
0374 dev_err(&urb->dev->dev, "External hub limit reached.\n");
0375 return 0;
0376 }
0377
0378 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0379 if (dev && dev->state >= USB_STATE_ADDRESS)
0380 return dev->address;
0381
0382 for (addr = 1; addr <= R8A66597_MAX_DEVICE; addr++) {
0383 if (r8a66597->address_map & (1 << addr))
0384 continue;
0385
0386 dev_dbg(&urb->dev->dev, "alloc_address: r8a66597_addr=%d\n", addr);
0387 r8a66597->address_map |= 1 << addr;
0388
0389 if (make_r8a66597_device(r8a66597, urb, addr) < 0)
0390 return 0;
0391
0392 return addr;
0393 }
0394
0395 dev_err(&urb->dev->dev,
0396 "cannot communicate with a USB device more than 10.(%x)\n",
0397 r8a66597->address_map);
0398
0399 return 0;
0400 }
0401
0402
0403 static void free_usb_address(struct r8a66597 *r8a66597,
0404 struct r8a66597_device *dev, int reset)
0405 {
0406 int port;
0407
0408 if (!dev)
0409 return;
0410
0411 dev_dbg(&dev->udev->dev, "free_addr: addr=%d\n", dev->address);
0412
0413 dev->state = USB_STATE_DEFAULT;
0414 r8a66597->address_map &= ~(1 << dev->address);
0415 dev->address = 0;
0416
0417
0418
0419
0420
0421 if (reset)
0422 dev_set_drvdata(&dev->udev->dev, NULL);
0423 list_del(&dev->device_list);
0424 kfree(dev);
0425
0426 for (port = 0; port < r8a66597->max_root_hub; port++) {
0427 if (r8a66597->root_hub[port].dev == dev) {
0428 r8a66597->root_hub[port].dev = NULL;
0429 break;
0430 }
0431 }
0432 }
0433
0434 static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
0435 u16 mask, u16 loop)
0436 {
0437 u16 tmp;
0438 int i = 0;
0439
0440 do {
0441 tmp = r8a66597_read(r8a66597, reg);
0442 if (i++ > 1000000) {
0443 printk(KERN_ERR "r8a66597: register%lx, loop %x "
0444 "is timeout\n", reg, loop);
0445 break;
0446 }
0447 ndelay(1);
0448 } while ((tmp & mask) != loop);
0449 }
0450
0451
0452 static void pipe_start(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
0453 {
0454 u16 tmp;
0455
0456 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
0457 if ((pipe->info.pipenum != 0) & ((tmp & PID_STALL) != 0))
0458 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
0459 r8a66597_mdfy(r8a66597, PID_BUF, PID, pipe->pipectr);
0460 }
0461
0462
0463 static void pipe_stop(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
0464 {
0465 u16 tmp;
0466
0467 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
0468 if ((tmp & PID_STALL11) != PID_STALL11)
0469 r8a66597_mdfy(r8a66597, PID_STALL, PID, pipe->pipectr);
0470 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
0471 r8a66597_reg_wait(r8a66597, pipe->pipectr, PBUSY, 0);
0472 }
0473
0474
0475 static void clear_all_buffer(struct r8a66597 *r8a66597,
0476 struct r8a66597_pipe *pipe)
0477 {
0478 if (!pipe || pipe->info.pipenum == 0)
0479 return;
0480
0481 pipe_stop(r8a66597, pipe);
0482 r8a66597_bset(r8a66597, ACLRM, pipe->pipectr);
0483 r8a66597_read(r8a66597, pipe->pipectr);
0484 r8a66597_read(r8a66597, pipe->pipectr);
0485 r8a66597_read(r8a66597, pipe->pipectr);
0486 r8a66597_bclr(r8a66597, ACLRM, pipe->pipectr);
0487 }
0488
0489
0490 static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597,
0491 struct r8a66597_pipe *pipe, int toggle)
0492 {
0493 if (toggle)
0494 r8a66597_bset(r8a66597, SQSET, pipe->pipectr);
0495 else
0496 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);
0497 }
0498
0499 static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
0500 {
0501 if (r8a66597->pdata->on_chip)
0502 return MBW_32;
0503 else
0504 return MBW_16;
0505 }
0506
0507
0508 static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
0509 {
0510 unsigned short mbw = mbw_value(r8a66597);
0511
0512 r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL);
0513 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
0514 }
0515
0516
0517 static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597,
0518 struct r8a66597_pipe *pipe)
0519 {
0520 unsigned short mbw = mbw_value(r8a66597);
0521
0522 cfifo_change(r8a66597, 0);
0523 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL);
0524 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL);
0525
0526 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,
0527 pipe->fifosel);
0528 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);
0529 }
0530
0531 static u16 r8a66597_get_pipenum(struct urb *urb, struct usb_host_endpoint *hep)
0532 {
0533 struct r8a66597_pipe *pipe = hep->hcpriv;
0534
0535 if (usb_pipeendpoint(urb->pipe) == 0)
0536 return 0;
0537 else
0538 return pipe->info.pipenum;
0539 }
0540
0541 static u16 get_urb_to_r8a66597_addr(struct r8a66597 *r8a66597, struct urb *urb)
0542 {
0543 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0544
0545 return (usb_pipedevice(urb->pipe) == 0) ? 0 : dev->address;
0546 }
0547
0548 static unsigned short *get_toggle_pointer(struct r8a66597_device *dev,
0549 int urb_pipe)
0550 {
0551 if (!dev)
0552 return NULL;
0553
0554 return usb_pipein(urb_pipe) ? &dev->ep_in_toggle : &dev->ep_out_toggle;
0555 }
0556
0557
0558 static void pipe_toggle_set(struct r8a66597 *r8a66597,
0559 struct r8a66597_pipe *pipe,
0560 struct urb *urb, int set)
0561 {
0562 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0563 unsigned char endpoint = usb_pipeendpoint(urb->pipe);
0564 unsigned short *toggle = get_toggle_pointer(dev, urb->pipe);
0565
0566 if (!toggle)
0567 return;
0568
0569 if (set)
0570 *toggle |= 1 << endpoint;
0571 else
0572 *toggle &= ~(1 << endpoint);
0573 }
0574
0575
0576 static void pipe_toggle_save(struct r8a66597 *r8a66597,
0577 struct r8a66597_pipe *pipe,
0578 struct urb *urb)
0579 {
0580 if (r8a66597_read(r8a66597, pipe->pipectr) & SQMON)
0581 pipe_toggle_set(r8a66597, pipe, urb, 1);
0582 else
0583 pipe_toggle_set(r8a66597, pipe, urb, 0);
0584 }
0585
0586
0587 static void pipe_toggle_restore(struct r8a66597 *r8a66597,
0588 struct r8a66597_pipe *pipe,
0589 struct urb *urb)
0590 {
0591 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0592 unsigned char endpoint = usb_pipeendpoint(urb->pipe);
0593 unsigned short *toggle = get_toggle_pointer(dev, urb->pipe);
0594
0595 if (!toggle)
0596 return;
0597
0598 r8a66597_pipe_toggle(r8a66597, pipe, *toggle & (1 << endpoint));
0599 }
0600
0601
0602 static void pipe_buffer_setting(struct r8a66597 *r8a66597,
0603 struct r8a66597_pipe_info *info)
0604 {
0605 u16 val = 0;
0606
0607 if (info->pipenum == 0)
0608 return;
0609
0610 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
0611 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
0612 r8a66597_write(r8a66597, info->pipenum, PIPESEL);
0613 if (!info->dir_in)
0614 val |= R8A66597_DIR;
0615 if (info->type == R8A66597_BULK && info->dir_in)
0616 val |= R8A66597_DBLB | R8A66597_SHTNAK;
0617 val |= info->type | info->epnum;
0618 r8a66597_write(r8a66597, val, PIPECFG);
0619
0620 r8a66597_write(r8a66597, (info->buf_bsize << 10) | (info->bufnum),
0621 PIPEBUF);
0622 r8a66597_write(r8a66597, make_devsel(info->address) | info->maxpacket,
0623 PIPEMAXP);
0624 r8a66597_write(r8a66597, info->interval, PIPEPERI);
0625 }
0626
0627
0628 static void pipe_setting(struct r8a66597 *r8a66597, struct r8a66597_td *td)
0629 {
0630 struct r8a66597_pipe_info *info;
0631 struct urb *urb = td->urb;
0632
0633 if (td->pipenum > 0) {
0634 info = &td->pipe->info;
0635 cfifo_change(r8a66597, 0);
0636 pipe_buffer_setting(r8a66597, info);
0637
0638 if (!usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
0639 usb_pipeout(urb->pipe)) &&
0640 !usb_pipecontrol(urb->pipe)) {
0641 r8a66597_pipe_toggle(r8a66597, td->pipe, 0);
0642 pipe_toggle_set(r8a66597, td->pipe, urb, 0);
0643 clear_all_buffer(r8a66597, td->pipe);
0644 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
0645 usb_pipeout(urb->pipe), 1);
0646 }
0647 pipe_toggle_restore(r8a66597, td->pipe, urb);
0648 }
0649 }
0650
0651
0652 static u16 get_empty_pipenum(struct r8a66597 *r8a66597,
0653 struct usb_endpoint_descriptor *ep)
0654 {
0655 u16 array[R8A66597_MAX_NUM_PIPE], i = 0, min;
0656
0657 memset(array, 0, sizeof(array));
0658 switch (usb_endpoint_type(ep)) {
0659 case USB_ENDPOINT_XFER_BULK:
0660 if (usb_endpoint_dir_in(ep))
0661 array[i++] = 4;
0662 else {
0663 array[i++] = 3;
0664 array[i++] = 5;
0665 }
0666 break;
0667 case USB_ENDPOINT_XFER_INT:
0668 if (usb_endpoint_dir_in(ep)) {
0669 array[i++] = 6;
0670 array[i++] = 7;
0671 array[i++] = 8;
0672 } else
0673 array[i++] = 9;
0674 break;
0675 case USB_ENDPOINT_XFER_ISOC:
0676 if (usb_endpoint_dir_in(ep))
0677 array[i++] = 2;
0678 else
0679 array[i++] = 1;
0680 break;
0681 default:
0682 printk(KERN_ERR "r8a66597: Illegal type\n");
0683 return 0;
0684 }
0685
0686 i = 1;
0687 min = array[0];
0688 while (array[i] != 0) {
0689 if (r8a66597->pipe_cnt[min] > r8a66597->pipe_cnt[array[i]])
0690 min = array[i];
0691 i++;
0692 }
0693
0694 return min;
0695 }
0696
0697 static u16 get_r8a66597_type(__u8 type)
0698 {
0699 u16 r8a66597_type;
0700
0701 switch (type) {
0702 case USB_ENDPOINT_XFER_BULK:
0703 r8a66597_type = R8A66597_BULK;
0704 break;
0705 case USB_ENDPOINT_XFER_INT:
0706 r8a66597_type = R8A66597_INT;
0707 break;
0708 case USB_ENDPOINT_XFER_ISOC:
0709 r8a66597_type = R8A66597_ISO;
0710 break;
0711 default:
0712 printk(KERN_ERR "r8a66597: Illegal type\n");
0713 r8a66597_type = 0x0000;
0714 break;
0715 }
0716
0717 return r8a66597_type;
0718 }
0719
0720 static u16 get_bufnum(u16 pipenum)
0721 {
0722 u16 bufnum = 0;
0723
0724 if (pipenum == 0)
0725 bufnum = 0;
0726 else if (check_bulk_or_isoc(pipenum))
0727 bufnum = 8 + (pipenum - 1) * R8A66597_BUF_BSIZE*2;
0728 else if (check_interrupt(pipenum))
0729 bufnum = 4 + (pipenum - 6);
0730 else
0731 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
0732
0733 return bufnum;
0734 }
0735
0736 static u16 get_buf_bsize(u16 pipenum)
0737 {
0738 u16 buf_bsize = 0;
0739
0740 if (pipenum == 0)
0741 buf_bsize = 3;
0742 else if (check_bulk_or_isoc(pipenum))
0743 buf_bsize = R8A66597_BUF_BSIZE - 1;
0744 else if (check_interrupt(pipenum))
0745 buf_bsize = 0;
0746 else
0747 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
0748
0749 return buf_bsize;
0750 }
0751
0752
0753 static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
0754 struct r8a66597_device *dev,
0755 struct r8a66597_pipe *pipe,
0756 struct urb *urb)
0757 {
0758 int i;
0759 struct r8a66597_pipe_info *info = &pipe->info;
0760 unsigned short mbw = mbw_value(r8a66597);
0761
0762
0763 if (r8a66597->pdata->on_chip)
0764 return;
0765
0766 if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) {
0767 for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) {
0768 if ((r8a66597->dma_map & (1 << i)) != 0)
0769 continue;
0770
0771 dev_info(&dev->udev->dev,
0772 "address %d, EndpointAddress 0x%02x use "
0773 "DMA FIFO\n", usb_pipedevice(urb->pipe),
0774 info->dir_in ?
0775 USB_ENDPOINT_DIR_MASK + info->epnum
0776 : info->epnum);
0777
0778 r8a66597->dma_map |= 1 << i;
0779 dev->dma_map |= 1 << i;
0780 set_pipe_reg_addr(pipe, i);
0781
0782 cfifo_change(r8a66597, 0);
0783 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,
0784 mbw | CURPIPE, pipe->fifosel);
0785
0786 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,
0787 pipe->info.pipenum);
0788 r8a66597_bset(r8a66597, BCLR, pipe->fifoctr);
0789 break;
0790 }
0791 }
0792 }
0793
0794
0795 static void enable_r8a66597_pipe(struct r8a66597 *r8a66597, struct urb *urb,
0796 struct usb_host_endpoint *hep,
0797 struct r8a66597_pipe_info *info)
0798 {
0799 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0800 struct r8a66597_pipe *pipe = hep->hcpriv;
0801
0802 dev_dbg(&dev->udev->dev, "enable_pipe:\n");
0803
0804 pipe->info = *info;
0805 set_pipe_reg_addr(pipe, R8A66597_PIPE_NO_DMA);
0806 r8a66597->pipe_cnt[pipe->info.pipenum]++;
0807 dev->pipe_cnt[pipe->info.pipenum]++;
0808
0809 enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);
0810 }
0811
0812 static void r8a66597_urb_done(struct r8a66597 *r8a66597, struct urb *urb,
0813 int status)
0814 __releases(r8a66597->lock)
0815 __acquires(r8a66597->lock)
0816 {
0817 if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
0818 void *ptr;
0819
0820 for (ptr = urb->transfer_buffer;
0821 ptr < urb->transfer_buffer + urb->transfer_buffer_length;
0822 ptr += PAGE_SIZE)
0823 flush_dcache_page(virt_to_page(ptr));
0824 }
0825
0826 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
0827 spin_unlock(&r8a66597->lock);
0828 usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb, status);
0829 spin_lock(&r8a66597->lock);
0830 }
0831
0832
0833 static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
0834 {
0835 struct r8a66597_td *td, *next;
0836 struct urb *urb;
0837 struct list_head *list = &r8a66597->pipe_queue[pipenum];
0838
0839 if (list_empty(list))
0840 return;
0841
0842 list_for_each_entry_safe(td, next, list, queue) {
0843 if (td->address != address)
0844 continue;
0845
0846 urb = td->urb;
0847 list_del(&td->queue);
0848 kfree(td);
0849
0850 if (urb)
0851 r8a66597_urb_done(r8a66597, urb, -ENODEV);
0852
0853 break;
0854 }
0855 }
0856
0857
0858 static void disable_r8a66597_pipe_all(struct r8a66597 *r8a66597,
0859 struct r8a66597_device *dev)
0860 {
0861 int check_ep0 = 0;
0862 u16 pipenum;
0863
0864 if (!dev)
0865 return;
0866
0867 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
0868 if (!dev->pipe_cnt[pipenum])
0869 continue;
0870
0871 if (!check_ep0) {
0872 check_ep0 = 1;
0873 force_dequeue(r8a66597, 0, dev->address);
0874 }
0875
0876 r8a66597->pipe_cnt[pipenum] -= dev->pipe_cnt[pipenum];
0877 dev->pipe_cnt[pipenum] = 0;
0878 force_dequeue(r8a66597, pipenum, dev->address);
0879 }
0880
0881 dev_dbg(&dev->udev->dev, "disable_pipe\n");
0882
0883 r8a66597->dma_map &= ~(dev->dma_map);
0884 dev->dma_map = 0;
0885 }
0886
0887 static u16 get_interval(struct urb *urb, __u8 interval)
0888 {
0889 u16 time = 1;
0890 int i;
0891
0892 if (urb->dev->speed == USB_SPEED_HIGH) {
0893 if (interval > IITV)
0894 time = IITV;
0895 else
0896 time = interval ? interval - 1 : 0;
0897 } else {
0898 if (interval > 128) {
0899 time = IITV;
0900 } else {
0901
0902 for (i = 0; i < 7; i++) {
0903 if ((1 << i) < interval &&
0904 (1 << (i + 1) > interval))
0905 time = 1 << i;
0906 }
0907 }
0908 }
0909
0910 return time;
0911 }
0912
0913 static unsigned long get_timer_interval(struct urb *urb, __u8 interval)
0914 {
0915 __u8 i;
0916 unsigned long time = 1;
0917
0918 if (usb_pipeisoc(urb->pipe))
0919 return 0;
0920
0921 if (get_r8a66597_usb_speed(urb->dev->speed) == HSMODE) {
0922 for (i = 0; i < (interval - 1); i++)
0923 time *= 2;
0924 time = time * 125 / 1000;
0925 } else {
0926 time = interval;
0927 }
0928
0929 return time;
0930 }
0931
0932
0933 static void init_pipe_info(struct r8a66597 *r8a66597, struct urb *urb,
0934 struct usb_host_endpoint *hep,
0935 struct usb_endpoint_descriptor *ep)
0936 {
0937 struct r8a66597_pipe_info info;
0938
0939 info.pipenum = get_empty_pipenum(r8a66597, ep);
0940 info.address = get_urb_to_r8a66597_addr(r8a66597, urb);
0941 info.epnum = usb_endpoint_num(ep);
0942 info.maxpacket = usb_endpoint_maxp(ep);
0943 info.type = get_r8a66597_type(usb_endpoint_type(ep));
0944 info.bufnum = get_bufnum(info.pipenum);
0945 info.buf_bsize = get_buf_bsize(info.pipenum);
0946 if (info.type == R8A66597_BULK) {
0947 info.interval = 0;
0948 info.timer_interval = 0;
0949 } else {
0950 info.interval = get_interval(urb, ep->bInterval);
0951 info.timer_interval = get_timer_interval(urb, ep->bInterval);
0952 }
0953 if (usb_endpoint_dir_in(ep))
0954 info.dir_in = 1;
0955 else
0956 info.dir_in = 0;
0957
0958 enable_r8a66597_pipe(r8a66597, urb, hep, &info);
0959 }
0960
0961 static void init_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
0962 {
0963 struct r8a66597_device *dev;
0964
0965 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
0966 dev->state = USB_STATE_CONFIGURED;
0967 }
0968
0969 static void pipe_irq_enable(struct r8a66597 *r8a66597, struct urb *urb,
0970 u16 pipenum)
0971 {
0972 if (pipenum == 0 && usb_pipeout(urb->pipe))
0973 enable_irq_empty(r8a66597, pipenum);
0974 else
0975 enable_irq_ready(r8a66597, pipenum);
0976
0977 if (!usb_pipeisoc(urb->pipe))
0978 enable_irq_nrdy(r8a66597, pipenum);
0979 }
0980
0981 static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
0982 {
0983 disable_irq_ready(r8a66597, pipenum);
0984 disable_irq_nrdy(r8a66597, pipenum);
0985 }
0986
0987 static void r8a66597_root_hub_start_polling(struct r8a66597 *r8a66597)
0988 {
0989 mod_timer(&r8a66597->rh_timer,
0990 jiffies + msecs_to_jiffies(R8A66597_RH_POLL_TIME));
0991 }
0992
0993 static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port,
0994 int connect)
0995 {
0996 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
0997
0998 rh->old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
0999 rh->scount = R8A66597_MAX_SAMPLING;
1000 if (connect)
1001 rh->port |= USB_PORT_STAT_CONNECTION;
1002 else
1003 rh->port &= ~USB_PORT_STAT_CONNECTION;
1004 rh->port |= USB_PORT_STAT_C_CONNECTION << 16;
1005
1006 r8a66597_root_hub_start_polling(r8a66597);
1007 }
1008
1009
1010 static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
1011 u16 syssts)
1012 __releases(r8a66597->lock)
1013 __acquires(r8a66597->lock)
1014 {
1015 if (syssts == SE0) {
1016 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1017 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1018 } else {
1019 if (syssts == FS_JSTS)
1020 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
1021 else if (syssts == LS_JSTS)
1022 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
1023
1024 r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port));
1025 r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port));
1026
1027 if (r8a66597->bus_suspended)
1028 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1029 }
1030
1031 spin_unlock(&r8a66597->lock);
1032 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597));
1033 spin_lock(&r8a66597->lock);
1034 }
1035
1036
1037 static void r8a66597_usb_connect(struct r8a66597 *r8a66597, int port)
1038 {
1039 u16 speed = get_rh_usb_speed(r8a66597, port);
1040 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1041
1042 rh->port &= ~(USB_PORT_STAT_HIGH_SPEED | USB_PORT_STAT_LOW_SPEED);
1043 if (speed == HSMODE)
1044 rh->port |= USB_PORT_STAT_HIGH_SPEED;
1045 else if (speed == LSMODE)
1046 rh->port |= USB_PORT_STAT_LOW_SPEED;
1047
1048 rh->port &= ~USB_PORT_STAT_RESET;
1049 rh->port |= USB_PORT_STAT_ENABLE;
1050 }
1051
1052
1053 static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597, int port)
1054 {
1055 struct r8a66597_device *dev = r8a66597->root_hub[port].dev;
1056
1057 disable_r8a66597_pipe_all(r8a66597, dev);
1058 free_usb_address(r8a66597, dev, 0);
1059
1060 start_root_hub_sampling(r8a66597, port, 0);
1061 }
1062
1063
1064 static void prepare_setup_packet(struct r8a66597 *r8a66597,
1065 struct r8a66597_td *td)
1066 {
1067 int i;
1068 __le16 *p = (__le16 *)td->urb->setup_packet;
1069 unsigned long setup_addr = USBREQ;
1070
1071 r8a66597_write(r8a66597, make_devsel(td->address) | td->maxpacket,
1072 DCPMAXP);
1073 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
1074
1075 for (i = 0; i < 4; i++) {
1076 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
1077 setup_addr += 2;
1078 }
1079 r8a66597_write(r8a66597, SUREQ, DCPCTR);
1080 }
1081
1082
1083 static void prepare_packet_read(struct r8a66597 *r8a66597,
1084 struct r8a66597_td *td)
1085 {
1086 struct urb *urb = td->urb;
1087
1088 if (usb_pipecontrol(urb->pipe)) {
1089 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1090 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1091 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1092 if (urb->actual_length == 0) {
1093 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1094 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1095 }
1096 pipe_irq_disable(r8a66597, td->pipenum);
1097 pipe_start(r8a66597, td->pipe);
1098 pipe_irq_enable(r8a66597, urb, td->pipenum);
1099 } else {
1100 if (urb->actual_length == 0) {
1101 pipe_irq_disable(r8a66597, td->pipenum);
1102 pipe_setting(r8a66597, td);
1103 pipe_stop(r8a66597, td->pipe);
1104 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1105
1106 if (td->pipe->pipetre) {
1107 r8a66597_write(r8a66597, TRCLR,
1108 td->pipe->pipetre);
1109 r8a66597_write(r8a66597,
1110 DIV_ROUND_UP
1111 (urb->transfer_buffer_length,
1112 td->maxpacket),
1113 td->pipe->pipetrn);
1114 r8a66597_bset(r8a66597, TRENB,
1115 td->pipe->pipetre);
1116 }
1117
1118 pipe_start(r8a66597, td->pipe);
1119 pipe_irq_enable(r8a66597, urb, td->pipenum);
1120 }
1121 }
1122 }
1123
1124
1125 static void prepare_packet_write(struct r8a66597 *r8a66597,
1126 struct r8a66597_td *td)
1127 {
1128 u16 tmp;
1129 struct urb *urb = td->urb;
1130
1131 if (usb_pipecontrol(urb->pipe)) {
1132 pipe_stop(r8a66597, td->pipe);
1133 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1134 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1135 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1136 if (urb->actual_length == 0) {
1137 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1138 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1139 }
1140 } else {
1141 if (urb->actual_length == 0)
1142 pipe_setting(r8a66597, td);
1143 if (td->pipe->pipetre)
1144 r8a66597_bclr(r8a66597, TRENB, td->pipe->pipetre);
1145 }
1146 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1147
1148 fifo_change_from_pipe(r8a66597, td->pipe);
1149 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1150 if (unlikely((tmp & FRDY) == 0))
1151 pipe_irq_enable(r8a66597, urb, td->pipenum);
1152 else
1153 packet_write(r8a66597, td->pipenum);
1154 pipe_start(r8a66597, td->pipe);
1155 }
1156
1157
1158 static void prepare_status_packet(struct r8a66597 *r8a66597,
1159 struct r8a66597_td *td)
1160 {
1161 struct urb *urb = td->urb;
1162
1163 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1164 pipe_stop(r8a66597, td->pipe);
1165
1166 if (urb->setup_packet[0] & USB_ENDPOINT_DIR_MASK) {
1167 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1168 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1169 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1170 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
1171 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
1172 enable_irq_empty(r8a66597, 0);
1173 } else {
1174 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1175 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1176 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1177 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1178 enable_irq_ready(r8a66597, 0);
1179 }
1180 enable_irq_nrdy(r8a66597, 0);
1181 pipe_start(r8a66597, td->pipe);
1182 }
1183
1184 static int is_set_address(unsigned char *setup_packet)
1185 {
1186 if (((setup_packet[0] & USB_TYPE_MASK) == USB_TYPE_STANDARD) &&
1187 setup_packet[1] == USB_REQ_SET_ADDRESS)
1188 return 1;
1189 else
1190 return 0;
1191 }
1192
1193
1194 static int start_transfer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1195 {
1196 BUG_ON(!td);
1197
1198 switch (td->type) {
1199 case USB_PID_SETUP:
1200 if (is_set_address(td->urb->setup_packet)) {
1201 td->set_address = 1;
1202 td->urb->setup_packet[2] = alloc_usb_address(r8a66597,
1203 td->urb);
1204 if (td->urb->setup_packet[2] == 0)
1205 return -EPIPE;
1206 }
1207 prepare_setup_packet(r8a66597, td);
1208 break;
1209 case USB_PID_IN:
1210 prepare_packet_read(r8a66597, td);
1211 break;
1212 case USB_PID_OUT:
1213 prepare_packet_write(r8a66597, td);
1214 break;
1215 case USB_PID_ACK:
1216 prepare_status_packet(r8a66597, td);
1217 break;
1218 default:
1219 printk(KERN_ERR "r8a66597: invalid type.\n");
1220 break;
1221 }
1222
1223 return 0;
1224 }
1225
1226 static int check_transfer_finish(struct r8a66597_td *td, struct urb *urb)
1227 {
1228 if (usb_pipeisoc(urb->pipe)) {
1229 if (urb->number_of_packets == td->iso_cnt)
1230 return 1;
1231 }
1232
1233
1234 if ((urb->transfer_buffer_length <= urb->actual_length) ||
1235 (td->short_packet) || (td->zero_packet))
1236 return 1;
1237
1238 return 0;
1239 }
1240
1241
1242 static void set_td_timer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1243 {
1244 unsigned long time;
1245
1246 BUG_ON(!td);
1247
1248 if (!list_empty(&r8a66597->pipe_queue[td->pipenum]) &&
1249 !usb_pipecontrol(td->urb->pipe) && usb_pipein(td->urb->pipe)) {
1250 r8a66597->timeout_map |= 1 << td->pipenum;
1251 switch (usb_pipetype(td->urb->pipe)) {
1252 case PIPE_INTERRUPT:
1253 case PIPE_ISOCHRONOUS:
1254 time = 30;
1255 break;
1256 default:
1257 time = 50;
1258 break;
1259 }
1260
1261 mod_timer(&r8a66597->timers[td->pipenum].td,
1262 jiffies + msecs_to_jiffies(time));
1263 }
1264 }
1265
1266
1267 static void finish_request(struct r8a66597 *r8a66597, struct r8a66597_td *td,
1268 u16 pipenum, struct urb *urb, int status)
1269 __releases(r8a66597->lock) __acquires(r8a66597->lock)
1270 {
1271 int restart = 0;
1272 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
1273
1274 r8a66597->timeout_map &= ~(1 << pipenum);
1275
1276 if (likely(td)) {
1277 if (td->set_address && (status != 0 || urb->unlinked))
1278 r8a66597->address_map &= ~(1 << urb->setup_packet[2]);
1279
1280 pipe_toggle_save(r8a66597, td->pipe, urb);
1281 list_del(&td->queue);
1282 kfree(td);
1283 }
1284
1285 if (!list_empty(&r8a66597->pipe_queue[pipenum]))
1286 restart = 1;
1287
1288 if (likely(urb)) {
1289 if (usb_pipeisoc(urb->pipe))
1290 urb->start_frame = r8a66597_get_frame(hcd);
1291
1292 r8a66597_urb_done(r8a66597, urb, status);
1293 }
1294
1295 if (restart) {
1296 td = r8a66597_get_td(r8a66597, pipenum);
1297 if (unlikely(!td))
1298 return;
1299
1300 start_transfer(r8a66597, td);
1301 set_td_timer(r8a66597, td);
1302 }
1303 }
1304
1305 static void packet_read(struct r8a66597 *r8a66597, u16 pipenum)
1306 {
1307 u16 tmp;
1308 int rcv_len, bufsize, urb_len, size;
1309 u16 *buf;
1310 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1311 struct urb *urb;
1312 int finish = 0;
1313 int status = 0;
1314
1315 if (unlikely(!td))
1316 return;
1317 urb = td->urb;
1318
1319 fifo_change_from_pipe(r8a66597, td->pipe);
1320 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1321 if (unlikely((tmp & FRDY) == 0)) {
1322 pipe_stop(r8a66597, td->pipe);
1323 pipe_irq_disable(r8a66597, pipenum);
1324 printk(KERN_ERR "r8a66597: in fifo not ready (%d)\n", pipenum);
1325 finish_request(r8a66597, td, pipenum, td->urb, -EPIPE);
1326 return;
1327 }
1328
1329
1330 rcv_len = tmp & DTLN;
1331 if (usb_pipeisoc(urb->pipe)) {
1332 buf = (u16 *)(urb->transfer_buffer +
1333 urb->iso_frame_desc[td->iso_cnt].offset);
1334 urb_len = urb->iso_frame_desc[td->iso_cnt].length;
1335 } else {
1336 buf = (void *)urb->transfer_buffer + urb->actual_length;
1337 urb_len = urb->transfer_buffer_length - urb->actual_length;
1338 }
1339 bufsize = min(urb_len, (int) td->maxpacket);
1340 if (rcv_len <= bufsize) {
1341 size = rcv_len;
1342 } else {
1343 size = bufsize;
1344 status = -EOVERFLOW;
1345 finish = 1;
1346 }
1347
1348
1349 urb->actual_length += size;
1350 if (rcv_len == 0)
1351 td->zero_packet = 1;
1352 if (rcv_len < bufsize) {
1353 td->short_packet = 1;
1354 }
1355 if (usb_pipeisoc(urb->pipe)) {
1356 urb->iso_frame_desc[td->iso_cnt].actual_length = size;
1357 urb->iso_frame_desc[td->iso_cnt].status = status;
1358 td->iso_cnt++;
1359 finish = 0;
1360 }
1361
1362
1363 if (finish || check_transfer_finish(td, urb)) {
1364 pipe_stop(r8a66597, td->pipe);
1365 pipe_irq_disable(r8a66597, pipenum);
1366 finish = 1;
1367 }
1368
1369
1370 if (urb->transfer_buffer) {
1371 if (size == 0)
1372 r8a66597_write(r8a66597, BCLR, td->pipe->fifoctr);
1373 else
1374 r8a66597_read_fifo(r8a66597, td->pipe->fifoaddr,
1375 buf, size);
1376 }
1377
1378 if (finish && pipenum != 0)
1379 finish_request(r8a66597, td, pipenum, urb, status);
1380 }
1381
1382 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum)
1383 {
1384 u16 tmp;
1385 int bufsize, size;
1386 u16 *buf;
1387 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1388 struct urb *urb;
1389
1390 if (unlikely(!td))
1391 return;
1392 urb = td->urb;
1393
1394 fifo_change_from_pipe(r8a66597, td->pipe);
1395 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1396 if (unlikely((tmp & FRDY) == 0)) {
1397 pipe_stop(r8a66597, td->pipe);
1398 pipe_irq_disable(r8a66597, pipenum);
1399 printk(KERN_ERR "r8a66597: out fifo not ready (%d)\n", pipenum);
1400 finish_request(r8a66597, td, pipenum, urb, -EPIPE);
1401 return;
1402 }
1403
1404
1405 bufsize = td->maxpacket;
1406 if (usb_pipeisoc(urb->pipe)) {
1407 buf = (u16 *)(urb->transfer_buffer +
1408 urb->iso_frame_desc[td->iso_cnt].offset);
1409 size = min(bufsize,
1410 (int)urb->iso_frame_desc[td->iso_cnt].length);
1411 } else {
1412 buf = (u16 *)(urb->transfer_buffer + urb->actual_length);
1413 size = min_t(u32, bufsize,
1414 urb->transfer_buffer_length - urb->actual_length);
1415 }
1416
1417
1418 if (pipenum > 0)
1419 r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS);
1420 if (urb->transfer_buffer) {
1421 r8a66597_write_fifo(r8a66597, td->pipe, buf, size);
1422 if (!usb_pipebulk(urb->pipe) || td->maxpacket != size)
1423 r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr);
1424 }
1425
1426
1427 urb->actual_length += size;
1428 if (usb_pipeisoc(urb->pipe)) {
1429 urb->iso_frame_desc[td->iso_cnt].actual_length = size;
1430 urb->iso_frame_desc[td->iso_cnt].status = 0;
1431 td->iso_cnt++;
1432 }
1433
1434
1435 if (check_transfer_finish(td, urb)) {
1436 disable_irq_ready(r8a66597, pipenum);
1437 enable_irq_empty(r8a66597, pipenum);
1438 if (!usb_pipeisoc(urb->pipe))
1439 enable_irq_nrdy(r8a66597, pipenum);
1440 } else
1441 pipe_irq_enable(r8a66597, urb, pipenum);
1442 }
1443
1444
1445 static void check_next_phase(struct r8a66597 *r8a66597, int status)
1446 {
1447 struct r8a66597_td *td = r8a66597_get_td(r8a66597, 0);
1448 struct urb *urb;
1449 u8 finish = 0;
1450
1451 if (unlikely(!td))
1452 return;
1453 urb = td->urb;
1454
1455 switch (td->type) {
1456 case USB_PID_IN:
1457 case USB_PID_OUT:
1458 if (check_transfer_finish(td, urb))
1459 td->type = USB_PID_ACK;
1460 break;
1461 case USB_PID_SETUP:
1462 if (urb->transfer_buffer_length == urb->actual_length)
1463 td->type = USB_PID_ACK;
1464 else if (usb_pipeout(urb->pipe))
1465 td->type = USB_PID_OUT;
1466 else
1467 td->type = USB_PID_IN;
1468 break;
1469 case USB_PID_ACK:
1470 finish = 1;
1471 break;
1472 }
1473
1474 if (finish || status != 0 || urb->unlinked)
1475 finish_request(r8a66597, td, 0, urb, status);
1476 else
1477 start_transfer(r8a66597, td);
1478 }
1479
1480 static int get_urb_error(struct r8a66597 *r8a66597, u16 pipenum)
1481 {
1482 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1483
1484 if (td) {
1485 u16 pid = r8a66597_read(r8a66597, td->pipe->pipectr) & PID;
1486
1487 if (pid == PID_NAK)
1488 return -ECONNRESET;
1489 else
1490 return -EPIPE;
1491 }
1492 return 0;
1493 }
1494
1495 static void irq_pipe_ready(struct r8a66597 *r8a66597)
1496 {
1497 u16 check;
1498 u16 pipenum;
1499 u16 mask;
1500 struct r8a66597_td *td;
1501
1502 mask = r8a66597_read(r8a66597, BRDYSTS)
1503 & r8a66597_read(r8a66597, BRDYENB);
1504 r8a66597_write(r8a66597, ~mask, BRDYSTS);
1505 if (mask & BRDY0) {
1506 td = r8a66597_get_td(r8a66597, 0);
1507 if (td && td->type == USB_PID_IN)
1508 packet_read(r8a66597, 0);
1509 else
1510 pipe_irq_disable(r8a66597, 0);
1511 check_next_phase(r8a66597, 0);
1512 }
1513
1514 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1515 check = 1 << pipenum;
1516 if (mask & check) {
1517 td = r8a66597_get_td(r8a66597, pipenum);
1518 if (unlikely(!td))
1519 continue;
1520
1521 if (td->type == USB_PID_IN)
1522 packet_read(r8a66597, pipenum);
1523 else if (td->type == USB_PID_OUT)
1524 packet_write(r8a66597, pipenum);
1525 }
1526 }
1527 }
1528
1529 static void irq_pipe_empty(struct r8a66597 *r8a66597)
1530 {
1531 u16 tmp;
1532 u16 check;
1533 u16 pipenum;
1534 u16 mask;
1535 struct r8a66597_td *td;
1536
1537 mask = r8a66597_read(r8a66597, BEMPSTS)
1538 & r8a66597_read(r8a66597, BEMPENB);
1539 r8a66597_write(r8a66597, ~mask, BEMPSTS);
1540 if (mask & BEMP0) {
1541 cfifo_change(r8a66597, 0);
1542 td = r8a66597_get_td(r8a66597, 0);
1543 if (td && td->type != USB_PID_OUT)
1544 disable_irq_empty(r8a66597, 0);
1545 check_next_phase(r8a66597, 0);
1546 }
1547
1548 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1549 check = 1 << pipenum;
1550 if (mask & check) {
1551 struct r8a66597_td *td;
1552 td = r8a66597_get_td(r8a66597, pipenum);
1553 if (unlikely(!td))
1554 continue;
1555
1556 tmp = r8a66597_read(r8a66597, td->pipe->pipectr);
1557 if ((tmp & INBUFM) == 0) {
1558 disable_irq_empty(r8a66597, pipenum);
1559 pipe_irq_disable(r8a66597, pipenum);
1560 finish_request(r8a66597, td, pipenum, td->urb,
1561 0);
1562 }
1563 }
1564 }
1565 }
1566
1567 static void irq_pipe_nrdy(struct r8a66597 *r8a66597)
1568 {
1569 u16 check;
1570 u16 pipenum;
1571 u16 mask;
1572 int status;
1573
1574 mask = r8a66597_read(r8a66597, NRDYSTS)
1575 & r8a66597_read(r8a66597, NRDYENB);
1576 r8a66597_write(r8a66597, ~mask, NRDYSTS);
1577 if (mask & NRDY0) {
1578 cfifo_change(r8a66597, 0);
1579 status = get_urb_error(r8a66597, 0);
1580 pipe_irq_disable(r8a66597, 0);
1581 check_next_phase(r8a66597, status);
1582 }
1583
1584 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1585 check = 1 << pipenum;
1586 if (mask & check) {
1587 struct r8a66597_td *td;
1588 td = r8a66597_get_td(r8a66597, pipenum);
1589 if (unlikely(!td))
1590 continue;
1591
1592 status = get_urb_error(r8a66597, pipenum);
1593 pipe_irq_disable(r8a66597, pipenum);
1594 pipe_stop(r8a66597, td->pipe);
1595 finish_request(r8a66597, td, pipenum, td->urb, status);
1596 }
1597 }
1598 }
1599
1600 static irqreturn_t r8a66597_irq(struct usb_hcd *hcd)
1601 {
1602 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1603 u16 intsts0, intsts1, intsts2;
1604 u16 intenb0, intenb1, intenb2;
1605 u16 mask0, mask1, mask2;
1606 int status;
1607
1608 spin_lock(&r8a66597->lock);
1609
1610 intsts0 = r8a66597_read(r8a66597, INTSTS0);
1611 intsts1 = r8a66597_read(r8a66597, INTSTS1);
1612 intsts2 = r8a66597_read(r8a66597, INTSTS2);
1613 intenb0 = r8a66597_read(r8a66597, INTENB0);
1614 intenb1 = r8a66597_read(r8a66597, INTENB1);
1615 intenb2 = r8a66597_read(r8a66597, INTENB2);
1616
1617 mask2 = intsts2 & intenb2;
1618 mask1 = intsts1 & intenb1;
1619 mask0 = intsts0 & intenb0 & (BEMP | NRDY | BRDY);
1620 if (mask2) {
1621 if (mask2 & ATTCH) {
1622 r8a66597_write(r8a66597, ~ATTCH, INTSTS2);
1623 r8a66597_bclr(r8a66597, ATTCHE, INTENB2);
1624
1625
1626 start_root_hub_sampling(r8a66597, 1, 1);
1627 }
1628 if (mask2 & DTCH) {
1629 r8a66597_write(r8a66597, ~DTCH, INTSTS2);
1630 r8a66597_bclr(r8a66597, DTCHE, INTENB2);
1631 r8a66597_usb_disconnect(r8a66597, 1);
1632 }
1633 if (mask2 & BCHG) {
1634 r8a66597_write(r8a66597, ~BCHG, INTSTS2);
1635 r8a66597_bclr(r8a66597, BCHGE, INTENB2);
1636 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1637 }
1638 }
1639
1640 if (mask1) {
1641 if (mask1 & ATTCH) {
1642 r8a66597_write(r8a66597, ~ATTCH, INTSTS1);
1643 r8a66597_bclr(r8a66597, ATTCHE, INTENB1);
1644
1645
1646 start_root_hub_sampling(r8a66597, 0, 1);
1647 }
1648 if (mask1 & DTCH) {
1649 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
1650 r8a66597_bclr(r8a66597, DTCHE, INTENB1);
1651 r8a66597_usb_disconnect(r8a66597, 0);
1652 }
1653 if (mask1 & BCHG) {
1654 r8a66597_write(r8a66597, ~BCHG, INTSTS1);
1655 r8a66597_bclr(r8a66597, BCHGE, INTENB1);
1656 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1657 }
1658
1659 if (mask1 & SIGN) {
1660 r8a66597_write(r8a66597, ~SIGN, INTSTS1);
1661 status = get_urb_error(r8a66597, 0);
1662 check_next_phase(r8a66597, status);
1663 }
1664 if (mask1 & SACK) {
1665 r8a66597_write(r8a66597, ~SACK, INTSTS1);
1666 check_next_phase(r8a66597, 0);
1667 }
1668 }
1669 if (mask0) {
1670 if (mask0 & BRDY)
1671 irq_pipe_ready(r8a66597);
1672 if (mask0 & BEMP)
1673 irq_pipe_empty(r8a66597);
1674 if (mask0 & NRDY)
1675 irq_pipe_nrdy(r8a66597);
1676 }
1677
1678 spin_unlock(&r8a66597->lock);
1679 return IRQ_HANDLED;
1680 }
1681
1682
1683 static void r8a66597_root_hub_control(struct r8a66597 *r8a66597, int port)
1684 {
1685 u16 tmp;
1686 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1687
1688 if (rh->port & USB_PORT_STAT_RESET) {
1689 unsigned long dvstctr_reg = get_dvstctr_reg(port);
1690
1691 tmp = r8a66597_read(r8a66597, dvstctr_reg);
1692 if ((tmp & USBRST) == USBRST) {
1693 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT,
1694 dvstctr_reg);
1695 r8a66597_root_hub_start_polling(r8a66597);
1696 } else
1697 r8a66597_usb_connect(r8a66597, port);
1698 }
1699
1700 if (!(rh->port & USB_PORT_STAT_CONNECTION)) {
1701 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1702 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1703 }
1704
1705 if (rh->scount > 0) {
1706 tmp = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
1707 if (tmp == rh->old_syssts) {
1708 rh->scount--;
1709 if (rh->scount == 0)
1710 r8a66597_check_syssts(r8a66597, port, tmp);
1711 else
1712 r8a66597_root_hub_start_polling(r8a66597);
1713 } else {
1714 rh->scount = R8A66597_MAX_SAMPLING;
1715 rh->old_syssts = tmp;
1716 r8a66597_root_hub_start_polling(r8a66597);
1717 }
1718 }
1719 }
1720
1721 static void r8a66597_interval_timer(struct timer_list *t)
1722 {
1723 struct r8a66597_timers *timers = from_timer(timers, t, interval);
1724 struct r8a66597 *r8a66597 = timers->r8a66597;
1725 unsigned long flags;
1726 u16 pipenum;
1727 struct r8a66597_td *td;
1728
1729 spin_lock_irqsave(&r8a66597->lock, flags);
1730
1731 for (pipenum = 0; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1732 if (!(r8a66597->interval_map & (1 << pipenum)))
1733 continue;
1734 if (timer_pending(&r8a66597->timers[pipenum].interval))
1735 continue;
1736
1737 td = r8a66597_get_td(r8a66597, pipenum);
1738 if (td)
1739 start_transfer(r8a66597, td);
1740 }
1741
1742 spin_unlock_irqrestore(&r8a66597->lock, flags);
1743 }
1744
1745 static void r8a66597_td_timer(struct timer_list *t)
1746 {
1747 struct r8a66597_timers *timers = from_timer(timers, t, td);
1748 struct r8a66597 *r8a66597 = timers->r8a66597;
1749 unsigned long flags;
1750 u16 pipenum;
1751 struct r8a66597_td *td, *new_td = NULL;
1752 struct r8a66597_pipe *pipe;
1753
1754 spin_lock_irqsave(&r8a66597->lock, flags);
1755 for (pipenum = 0; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1756 if (!(r8a66597->timeout_map & (1 << pipenum)))
1757 continue;
1758 if (timer_pending(&r8a66597->timers[pipenum].td))
1759 continue;
1760
1761 td = r8a66597_get_td(r8a66597, pipenum);
1762 if (!td) {
1763 r8a66597->timeout_map &= ~(1 << pipenum);
1764 continue;
1765 }
1766
1767 if (td->urb->actual_length) {
1768 set_td_timer(r8a66597, td);
1769 break;
1770 }
1771
1772 pipe = td->pipe;
1773 pipe_stop(r8a66597, pipe);
1774
1775
1776 new_td = td;
1777 do {
1778 list_move_tail(&new_td->queue,
1779 &r8a66597->pipe_queue[pipenum]);
1780 new_td = r8a66597_get_td(r8a66597, pipenum);
1781 if (!new_td) {
1782 new_td = td;
1783 break;
1784 }
1785 } while (td != new_td && td->address == new_td->address &&
1786 td->pipe->info.epnum == new_td->pipe->info.epnum);
1787
1788 start_transfer(r8a66597, new_td);
1789
1790 if (td == new_td)
1791 r8a66597->timeout_map &= ~(1 << pipenum);
1792 else
1793 set_td_timer(r8a66597, new_td);
1794 break;
1795 }
1796 spin_unlock_irqrestore(&r8a66597->lock, flags);
1797 }
1798
1799 static void r8a66597_timer(struct timer_list *t)
1800 {
1801 struct r8a66597 *r8a66597 = from_timer(r8a66597, t, rh_timer);
1802 unsigned long flags;
1803 int port;
1804
1805 spin_lock_irqsave(&r8a66597->lock, flags);
1806
1807 for (port = 0; port < r8a66597->max_root_hub; port++)
1808 r8a66597_root_hub_control(r8a66597, port);
1809
1810 spin_unlock_irqrestore(&r8a66597->lock, flags);
1811 }
1812
1813 static int check_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
1814 {
1815 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
1816
1817 if (dev && dev->address && dev->state != USB_STATE_CONFIGURED &&
1818 (urb->dev->state == USB_STATE_CONFIGURED))
1819 return 1;
1820 else
1821 return 0;
1822 }
1823
1824 static int r8a66597_start(struct usb_hcd *hcd)
1825 {
1826 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1827
1828 hcd->state = HC_STATE_RUNNING;
1829 return enable_controller(r8a66597);
1830 }
1831
1832 static void r8a66597_stop(struct usb_hcd *hcd)
1833 {
1834 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1835
1836 disable_controller(r8a66597);
1837 }
1838
1839 static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb)
1840 {
1841 unsigned int usb_address = usb_pipedevice(urb->pipe);
1842 u16 root_port, hub_port;
1843
1844 if (usb_address == 0) {
1845 get_port_number(r8a66597, urb->dev->devpath,
1846 &root_port, &hub_port);
1847 set_devadd_reg(r8a66597, 0,
1848 get_r8a66597_usb_speed(urb->dev->speed),
1849 get_parent_r8a66597_address(r8a66597, urb->dev),
1850 hub_port, root_port);
1851 }
1852 }
1853
1854 static struct r8a66597_td *r8a66597_make_td(struct r8a66597 *r8a66597,
1855 struct urb *urb,
1856 struct usb_host_endpoint *hep)
1857 {
1858 struct r8a66597_td *td;
1859 u16 pipenum;
1860
1861 td = kzalloc(sizeof(struct r8a66597_td), GFP_ATOMIC);
1862 if (td == NULL)
1863 return NULL;
1864
1865 pipenum = r8a66597_get_pipenum(urb, hep);
1866 td->pipenum = pipenum;
1867 td->pipe = hep->hcpriv;
1868 td->urb = urb;
1869 td->address = get_urb_to_r8a66597_addr(r8a66597, urb);
1870 td->maxpacket = usb_maxpacket(urb->dev, urb->pipe);
1871 if (usb_pipecontrol(urb->pipe))
1872 td->type = USB_PID_SETUP;
1873 else if (usb_pipein(urb->pipe))
1874 td->type = USB_PID_IN;
1875 else
1876 td->type = USB_PID_OUT;
1877 INIT_LIST_HEAD(&td->queue);
1878
1879 return td;
1880 }
1881
1882 static int r8a66597_urb_enqueue(struct usb_hcd *hcd,
1883 struct urb *urb,
1884 gfp_t mem_flags)
1885 {
1886 struct usb_host_endpoint *hep = urb->ep;
1887 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1888 struct r8a66597_td *td = NULL;
1889 int ret, request = 0;
1890 unsigned long flags;
1891
1892 spin_lock_irqsave(&r8a66597->lock, flags);
1893 if (!get_urb_to_r8a66597_dev(r8a66597, urb)) {
1894 ret = -ENODEV;
1895 goto error_not_linked;
1896 }
1897
1898 ret = usb_hcd_link_urb_to_ep(hcd, urb);
1899 if (ret)
1900 goto error_not_linked;
1901
1902 if (!hep->hcpriv) {
1903 hep->hcpriv = kzalloc(sizeof(struct r8a66597_pipe),
1904 GFP_ATOMIC);
1905 if (!hep->hcpriv) {
1906 ret = -ENOMEM;
1907 goto error;
1908 }
1909 set_pipe_reg_addr(hep->hcpriv, R8A66597_PIPE_NO_DMA);
1910 if (usb_pipeendpoint(urb->pipe))
1911 init_pipe_info(r8a66597, urb, hep, &hep->desc);
1912 }
1913
1914 if (unlikely(check_pipe_config(r8a66597, urb)))
1915 init_pipe_config(r8a66597, urb);
1916
1917 set_address_zero(r8a66597, urb);
1918 td = r8a66597_make_td(r8a66597, urb, hep);
1919 if (td == NULL) {
1920 ret = -ENOMEM;
1921 goto error;
1922 }
1923 if (list_empty(&r8a66597->pipe_queue[td->pipenum]))
1924 request = 1;
1925 list_add_tail(&td->queue, &r8a66597->pipe_queue[td->pipenum]);
1926 urb->hcpriv = td;
1927
1928 if (request) {
1929 if (td->pipe->info.timer_interval) {
1930 r8a66597->interval_map |= 1 << td->pipenum;
1931 mod_timer(&r8a66597->timers[td->pipenum].interval,
1932 jiffies + msecs_to_jiffies(
1933 td->pipe->info.timer_interval));
1934 } else {
1935 ret = start_transfer(r8a66597, td);
1936 if (ret < 0) {
1937 list_del(&td->queue);
1938 kfree(td);
1939 }
1940 }
1941 } else
1942 set_td_timer(r8a66597, td);
1943
1944 error:
1945 if (ret)
1946 usb_hcd_unlink_urb_from_ep(hcd, urb);
1947 error_not_linked:
1948 spin_unlock_irqrestore(&r8a66597->lock, flags);
1949 return ret;
1950 }
1951
1952 static int r8a66597_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1953 int status)
1954 {
1955 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1956 struct r8a66597_td *td;
1957 unsigned long flags;
1958 int rc;
1959
1960 spin_lock_irqsave(&r8a66597->lock, flags);
1961 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1962 if (rc)
1963 goto done;
1964
1965 if (urb->hcpriv) {
1966 td = urb->hcpriv;
1967 pipe_stop(r8a66597, td->pipe);
1968 pipe_irq_disable(r8a66597, td->pipenum);
1969 disable_irq_empty(r8a66597, td->pipenum);
1970 finish_request(r8a66597, td, td->pipenum, urb, status);
1971 }
1972 done:
1973 spin_unlock_irqrestore(&r8a66597->lock, flags);
1974 return rc;
1975 }
1976
1977 static void r8a66597_endpoint_disable(struct usb_hcd *hcd,
1978 struct usb_host_endpoint *hep)
1979 __acquires(r8a66597->lock)
1980 __releases(r8a66597->lock)
1981 {
1982 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1983 struct r8a66597_pipe *pipe = (struct r8a66597_pipe *)hep->hcpriv;
1984 struct r8a66597_td *td;
1985 struct urb *urb = NULL;
1986 u16 pipenum;
1987 unsigned long flags;
1988
1989 if (pipe == NULL)
1990 return;
1991 pipenum = pipe->info.pipenum;
1992
1993 spin_lock_irqsave(&r8a66597->lock, flags);
1994 if (pipenum == 0) {
1995 kfree(hep->hcpriv);
1996 hep->hcpriv = NULL;
1997 spin_unlock_irqrestore(&r8a66597->lock, flags);
1998 return;
1999 }
2000
2001 pipe_stop(r8a66597, pipe);
2002 pipe_irq_disable(r8a66597, pipenum);
2003 disable_irq_empty(r8a66597, pipenum);
2004 td = r8a66597_get_td(r8a66597, pipenum);
2005 if (td)
2006 urb = td->urb;
2007 finish_request(r8a66597, td, pipenum, urb, -ESHUTDOWN);
2008 kfree(hep->hcpriv);
2009 hep->hcpriv = NULL;
2010 spin_unlock_irqrestore(&r8a66597->lock, flags);
2011 }
2012
2013 static int r8a66597_get_frame(struct usb_hcd *hcd)
2014 {
2015 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2016 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
2017 }
2018
2019 static void collect_usb_address_map(struct usb_device *udev, unsigned long *map)
2020 {
2021 int chix;
2022 struct usb_device *childdev;
2023
2024 if (udev->state == USB_STATE_CONFIGURED &&
2025 udev->parent && udev->parent->devnum > 1 &&
2026 udev->parent->descriptor.bDeviceClass == USB_CLASS_HUB)
2027 map[udev->devnum/32] |= (1 << (udev->devnum % 32));
2028
2029 usb_hub_for_each_child(udev, chix, childdev)
2030 collect_usb_address_map(childdev, map);
2031 }
2032
2033
2034 static struct r8a66597_device *get_r8a66597_device(struct r8a66597 *r8a66597,
2035 int addr)
2036 {
2037 struct r8a66597_device *dev;
2038 struct list_head *list = &r8a66597->child_device;
2039
2040 list_for_each_entry(dev, list, device_list) {
2041 if (dev->usb_address != addr)
2042 continue;
2043
2044 return dev;
2045 }
2046
2047 printk(KERN_ERR "r8a66597: get_r8a66597_device fail.(%d)\n", addr);
2048 return NULL;
2049 }
2050
2051 static void update_usb_address_map(struct r8a66597 *r8a66597,
2052 struct usb_device *root_hub,
2053 unsigned long *map)
2054 {
2055 int i, j, addr;
2056 unsigned long diff;
2057 unsigned long flags;
2058
2059 for (i = 0; i < 4; i++) {
2060 diff = r8a66597->child_connect_map[i] ^ map[i];
2061 if (!diff)
2062 continue;
2063
2064 for (j = 0; j < 32; j++) {
2065 if (!(diff & (1 << j)))
2066 continue;
2067
2068 addr = i * 32 + j;
2069 if (map[i] & (1 << j))
2070 set_child_connect_map(r8a66597, addr);
2071 else {
2072 struct r8a66597_device *dev;
2073
2074 spin_lock_irqsave(&r8a66597->lock, flags);
2075 dev = get_r8a66597_device(r8a66597, addr);
2076 disable_r8a66597_pipe_all(r8a66597, dev);
2077 free_usb_address(r8a66597, dev, 0);
2078 put_child_connect_map(r8a66597, addr);
2079 spin_unlock_irqrestore(&r8a66597->lock, flags);
2080 }
2081 }
2082 }
2083 }
2084
2085 static void r8a66597_check_detect_child(struct r8a66597 *r8a66597,
2086 struct usb_hcd *hcd)
2087 {
2088 struct usb_bus *bus;
2089 unsigned long now_map[4];
2090
2091 memset(now_map, 0, sizeof(now_map));
2092
2093 mutex_lock(&usb_bus_idr_lock);
2094 bus = idr_find(&usb_bus_idr, hcd->self.busnum);
2095 if (bus && bus->root_hub) {
2096 collect_usb_address_map(bus->root_hub, now_map);
2097 update_usb_address_map(r8a66597, bus->root_hub, now_map);
2098 }
2099 mutex_unlock(&usb_bus_idr_lock);
2100 }
2101
2102 static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf)
2103 {
2104 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2105 unsigned long flags;
2106 int i;
2107
2108 r8a66597_check_detect_child(r8a66597, hcd);
2109
2110 spin_lock_irqsave(&r8a66597->lock, flags);
2111
2112 *buf = 0;
2113
2114 for (i = 0; i < r8a66597->max_root_hub; i++) {
2115 if (r8a66597->root_hub[i].port & 0xffff0000)
2116 *buf |= 1 << (i + 1);
2117 }
2118
2119 spin_unlock_irqrestore(&r8a66597->lock, flags);
2120
2121 return (*buf != 0);
2122 }
2123
2124 static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
2125 struct usb_hub_descriptor *desc)
2126 {
2127 desc->bDescriptorType = USB_DT_HUB;
2128 desc->bHubContrCurrent = 0;
2129 desc->bNbrPorts = r8a66597->max_root_hub;
2130 desc->bDescLength = 9;
2131 desc->bPwrOn2PwrGood = 0;
2132 desc->wHubCharacteristics =
2133 cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM | HUB_CHAR_NO_OCPM);
2134 desc->u.hs.DeviceRemovable[0] =
2135 ((1 << r8a66597->max_root_hub) - 1) << 1;
2136 desc->u.hs.DeviceRemovable[1] = ~0;
2137 }
2138
2139 static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
2140 u16 wIndex, char *buf, u16 wLength)
2141 {
2142 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2143 int ret;
2144 int port = (wIndex & 0x00FF) - 1;
2145 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2146 unsigned long flags;
2147
2148 ret = 0;
2149
2150 spin_lock_irqsave(&r8a66597->lock, flags);
2151 switch (typeReq) {
2152 case ClearHubFeature:
2153 case SetHubFeature:
2154 switch (wValue) {
2155 case C_HUB_OVER_CURRENT:
2156 case C_HUB_LOCAL_POWER:
2157 break;
2158 default:
2159 goto error;
2160 }
2161 break;
2162 case ClearPortFeature:
2163 if (wIndex > r8a66597->max_root_hub)
2164 goto error;
2165 if (wLength != 0)
2166 goto error;
2167
2168 switch (wValue) {
2169 case USB_PORT_FEAT_ENABLE:
2170 rh->port &= ~USB_PORT_STAT_POWER;
2171 break;
2172 case USB_PORT_FEAT_SUSPEND:
2173 break;
2174 case USB_PORT_FEAT_POWER:
2175 r8a66597_port_power(r8a66597, port, 0);
2176 break;
2177 case USB_PORT_FEAT_C_ENABLE:
2178 case USB_PORT_FEAT_C_SUSPEND:
2179 case USB_PORT_FEAT_C_CONNECTION:
2180 case USB_PORT_FEAT_C_OVER_CURRENT:
2181 case USB_PORT_FEAT_C_RESET:
2182 break;
2183 default:
2184 goto error;
2185 }
2186 rh->port &= ~(1 << wValue);
2187 break;
2188 case GetHubDescriptor:
2189 r8a66597_hub_descriptor(r8a66597,
2190 (struct usb_hub_descriptor *)buf);
2191 break;
2192 case GetHubStatus:
2193 *buf = 0x00;
2194 break;
2195 case GetPortStatus:
2196 if (wIndex > r8a66597->max_root_hub)
2197 goto error;
2198 *(__le32 *)buf = cpu_to_le32(rh->port);
2199 break;
2200 case SetPortFeature:
2201 if (wIndex > r8a66597->max_root_hub)
2202 goto error;
2203 if (wLength != 0)
2204 goto error;
2205
2206 switch (wValue) {
2207 case USB_PORT_FEAT_SUSPEND:
2208 break;
2209 case USB_PORT_FEAT_POWER:
2210 r8a66597_port_power(r8a66597, port, 1);
2211 rh->port |= USB_PORT_STAT_POWER;
2212 break;
2213 case USB_PORT_FEAT_RESET: {
2214 struct r8a66597_device *dev = rh->dev;
2215
2216 rh->port |= USB_PORT_STAT_RESET;
2217
2218 disable_r8a66597_pipe_all(r8a66597, dev);
2219 free_usb_address(r8a66597, dev, 1);
2220
2221 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT,
2222 get_dvstctr_reg(port));
2223 mod_timer(&r8a66597->rh_timer,
2224 jiffies + msecs_to_jiffies(50));
2225 }
2226 break;
2227 default:
2228 goto error;
2229 }
2230 rh->port |= 1 << wValue;
2231 break;
2232 default:
2233 error:
2234 ret = -EPIPE;
2235 break;
2236 }
2237
2238 spin_unlock_irqrestore(&r8a66597->lock, flags);
2239 return ret;
2240 }
2241
2242 #if defined(CONFIG_PM)
2243 static int r8a66597_bus_suspend(struct usb_hcd *hcd)
2244 {
2245 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2246 int port;
2247
2248 dev_dbg(&r8a66597->device0.udev->dev, "%s\n", __func__);
2249
2250 for (port = 0; port < r8a66597->max_root_hub; port++) {
2251 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2252 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2253
2254 if (!(rh->port & USB_PORT_STAT_ENABLE))
2255 continue;
2256
2257 dev_dbg(&rh->dev->udev->dev, "suspend port = %d\n", port);
2258 r8a66597_bclr(r8a66597, UACT, dvstctr_reg);
2259 rh->port |= USB_PORT_STAT_SUSPEND;
2260
2261 if (rh->dev->udev->do_remote_wakeup) {
2262 msleep(3);
2263 r8a66597_bset(r8a66597, RWUPE, dvstctr_reg);
2264 r8a66597_write(r8a66597, ~BCHG, get_intsts_reg(port));
2265 r8a66597_bset(r8a66597, BCHGE, get_intenb_reg(port));
2266 }
2267 }
2268
2269 r8a66597->bus_suspended = 1;
2270
2271 return 0;
2272 }
2273
2274 static int r8a66597_bus_resume(struct usb_hcd *hcd)
2275 {
2276 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2277 int port;
2278
2279 dev_dbg(&r8a66597->device0.udev->dev, "%s\n", __func__);
2280
2281 for (port = 0; port < r8a66597->max_root_hub; port++) {
2282 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2283 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2284
2285 if (!(rh->port & USB_PORT_STAT_SUSPEND))
2286 continue;
2287
2288 dev_dbg(&rh->dev->udev->dev, "resume port = %d\n", port);
2289 rh->port &= ~USB_PORT_STAT_SUSPEND;
2290 rh->port |= USB_PORT_STAT_C_SUSPEND << 16;
2291 r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg);
2292 msleep(USB_RESUME_TIMEOUT);
2293 r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg);
2294 }
2295
2296 return 0;
2297
2298 }
2299 #else
2300 #define r8a66597_bus_suspend NULL
2301 #define r8a66597_bus_resume NULL
2302 #endif
2303
2304 static const struct hc_driver r8a66597_hc_driver = {
2305 .description = hcd_name,
2306 .hcd_priv_size = sizeof(struct r8a66597),
2307 .irq = r8a66597_irq,
2308
2309
2310
2311
2312 .flags = HCD_USB2,
2313
2314 .start = r8a66597_start,
2315 .stop = r8a66597_stop,
2316
2317
2318
2319
2320 .urb_enqueue = r8a66597_urb_enqueue,
2321 .urb_dequeue = r8a66597_urb_dequeue,
2322 .endpoint_disable = r8a66597_endpoint_disable,
2323
2324
2325
2326
2327 .get_frame_number = r8a66597_get_frame,
2328
2329
2330
2331
2332 .hub_status_data = r8a66597_hub_status_data,
2333 .hub_control = r8a66597_hub_control,
2334 .bus_suspend = r8a66597_bus_suspend,
2335 .bus_resume = r8a66597_bus_resume,
2336 };
2337
2338 #if defined(CONFIG_PM)
2339 static int r8a66597_suspend(struct device *dev)
2340 {
2341 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2342 int port;
2343
2344 dev_dbg(dev, "%s\n", __func__);
2345
2346 disable_controller(r8a66597);
2347
2348 for (port = 0; port < r8a66597->max_root_hub; port++) {
2349 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2350
2351 rh->port = 0x00000000;
2352 }
2353
2354 return 0;
2355 }
2356
2357 static int r8a66597_resume(struct device *dev)
2358 {
2359 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2360 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2361
2362 dev_dbg(dev, "%s\n", __func__);
2363
2364 enable_controller(r8a66597);
2365 usb_root_hub_lost_power(hcd->self.root_hub);
2366
2367 return 0;
2368 }
2369
2370 static const struct dev_pm_ops r8a66597_dev_pm_ops = {
2371 .suspend = r8a66597_suspend,
2372 .resume = r8a66597_resume,
2373 .poweroff = r8a66597_suspend,
2374 .restore = r8a66597_resume,
2375 };
2376
2377 #define R8A66597_DEV_PM_OPS (&r8a66597_dev_pm_ops)
2378 #else
2379 #define R8A66597_DEV_PM_OPS NULL
2380 #endif
2381
2382 static int r8a66597_remove(struct platform_device *pdev)
2383 {
2384 struct r8a66597 *r8a66597 = platform_get_drvdata(pdev);
2385 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2386
2387 del_timer_sync(&r8a66597->rh_timer);
2388 usb_remove_hcd(hcd);
2389 iounmap(r8a66597->reg);
2390 if (r8a66597->pdata->on_chip)
2391 clk_put(r8a66597->clk);
2392 usb_put_hcd(hcd);
2393 return 0;
2394 }
2395
2396 static int r8a66597_probe(struct platform_device *pdev)
2397 {
2398 char clk_name[8];
2399 struct resource *res = NULL, *ires;
2400 int irq = -1;
2401 void __iomem *reg = NULL;
2402 struct usb_hcd *hcd = NULL;
2403 struct r8a66597 *r8a66597;
2404 int ret = 0;
2405 int i;
2406 unsigned long irq_trigger;
2407
2408 if (usb_disabled())
2409 return -ENODEV;
2410
2411 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2412 if (!res) {
2413 ret = -ENODEV;
2414 dev_err(&pdev->dev, "platform_get_resource error.\n");
2415 goto clean_up;
2416 }
2417
2418 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2419 if (!ires) {
2420 ret = -ENODEV;
2421 dev_err(&pdev->dev,
2422 "platform_get_resource IORESOURCE_IRQ error.\n");
2423 goto clean_up;
2424 }
2425
2426 irq = ires->start;
2427 irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
2428
2429 reg = ioremap(res->start, resource_size(res));
2430 if (reg == NULL) {
2431 ret = -ENOMEM;
2432 dev_err(&pdev->dev, "ioremap error.\n");
2433 goto clean_up;
2434 }
2435
2436 if (pdev->dev.platform_data == NULL) {
2437 dev_err(&pdev->dev, "no platform data\n");
2438 ret = -ENODEV;
2439 goto clean_up;
2440 }
2441
2442
2443 hcd = usb_create_hcd(&r8a66597_hc_driver, &pdev->dev, (char *)hcd_name);
2444 if (!hcd) {
2445 ret = -ENOMEM;
2446 dev_err(&pdev->dev, "Failed to create hcd\n");
2447 goto clean_up;
2448 }
2449 r8a66597 = hcd_to_r8a66597(hcd);
2450 memset(r8a66597, 0, sizeof(struct r8a66597));
2451 platform_set_drvdata(pdev, r8a66597);
2452 r8a66597->pdata = dev_get_platdata(&pdev->dev);
2453 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
2454
2455 if (r8a66597->pdata->on_chip) {
2456 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
2457 r8a66597->clk = clk_get(&pdev->dev, clk_name);
2458 if (IS_ERR(r8a66597->clk)) {
2459 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
2460 clk_name);
2461 ret = PTR_ERR(r8a66597->clk);
2462 goto clean_up2;
2463 }
2464 r8a66597->max_root_hub = 1;
2465 } else
2466 r8a66597->max_root_hub = 2;
2467
2468 spin_lock_init(&r8a66597->lock);
2469 timer_setup(&r8a66597->rh_timer, r8a66597_timer, 0);
2470 r8a66597->reg = reg;
2471
2472
2473 ret = r8a66597_clock_enable(r8a66597);
2474 if (ret < 0)
2475 goto clean_up3;
2476 disable_controller(r8a66597);
2477
2478 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
2479 INIT_LIST_HEAD(&r8a66597->pipe_queue[i]);
2480 r8a66597->timers[i].r8a66597 = r8a66597;
2481 timer_setup(&r8a66597->timers[i].td, r8a66597_td_timer, 0);
2482 timer_setup(&r8a66597->timers[i].interval,
2483 r8a66597_interval_timer, 0);
2484 }
2485 INIT_LIST_HEAD(&r8a66597->child_device);
2486
2487 hcd->rsrc_start = res->start;
2488 hcd->has_tt = 1;
2489
2490 ret = usb_add_hcd(hcd, irq, irq_trigger);
2491 if (ret != 0) {
2492 dev_err(&pdev->dev, "Failed to add hcd\n");
2493 goto clean_up3;
2494 }
2495 device_wakeup_enable(hcd->self.controller);
2496
2497 return 0;
2498
2499 clean_up3:
2500 if (r8a66597->pdata->on_chip)
2501 clk_put(r8a66597->clk);
2502 clean_up2:
2503 usb_put_hcd(hcd);
2504
2505 clean_up:
2506 if (reg)
2507 iounmap(reg);
2508
2509 return ret;
2510 }
2511
2512 static struct platform_driver r8a66597_driver = {
2513 .probe = r8a66597_probe,
2514 .remove = r8a66597_remove,
2515 .driver = {
2516 .name = hcd_name,
2517 .pm = R8A66597_DEV_PM_OPS,
2518 },
2519 };
2520
2521 module_platform_driver(r8a66597_driver);