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0008 #ifdef CONFIG_DYNAMIC_DEBUG
0009
0010
0011
0012
0013
0014
0015 static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
0016 {
0017 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
0018
0019 ehci_dbg(ehci,
0020 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
0021 label, params,
0022 HCS_DEBUG_PORT(params),
0023 HCS_INDICATOR(params) ? " ind" : "",
0024 HCS_N_CC(params),
0025 HCS_N_PCC(params),
0026 HCS_PORTROUTED(params) ? "" : " ordered",
0027 HCS_PPC(params) ? "" : " !ppc",
0028 HCS_N_PORTS(params));
0029
0030 if (HCS_PORTROUTED(params)) {
0031 int i;
0032 char buf[46], tmp[7], byte;
0033
0034 buf[0] = 0;
0035 for (i = 0; i < HCS_N_PORTS(params); i++) {
0036
0037 byte = readb(&ehci->caps->portroute[(i >> 1)]);
0038 sprintf(tmp, "%d ",
0039 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
0040 strcat(buf, tmp);
0041 }
0042 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
0043 }
0044 }
0045
0046
0047
0048
0049
0050
0051 static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
0052 {
0053 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
0054
0055 if (HCC_ISOC_CACHE(params)) {
0056 ehci_dbg(ehci,
0057 "%s hcc_params %04x caching frame %s%s%s\n",
0058 label, params,
0059 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
0060 HCC_CANPARK(params) ? " park" : "",
0061 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
0062 } else {
0063 ehci_dbg(ehci,
0064 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
0065 label,
0066 params,
0067 HCC_ISOC_THRES(params),
0068 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
0069 HCC_CANPARK(params) ? " park" : "",
0070 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
0071 HCC_LPM(params) ? " LPM" : "",
0072 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
0073 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
0074 HCC_32FRAME_PERIODIC_LIST(params) ?
0075 " 32 periodic list" : "");
0076 }
0077 }
0078
0079 static void __maybe_unused
0080 dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
0081 {
0082 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
0083 hc32_to_cpup(ehci, &qtd->hw_next),
0084 hc32_to_cpup(ehci, &qtd->hw_alt_next),
0085 hc32_to_cpup(ehci, &qtd->hw_token),
0086 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
0087 if (qtd->hw_buf[1])
0088 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
0089 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
0090 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
0091 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
0092 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
0093 }
0094
0095 static void __maybe_unused
0096 dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
0097 {
0098 struct ehci_qh_hw *hw = qh->hw;
0099
0100 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
0101 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
0102 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
0103 }
0104
0105 static void __maybe_unused
0106 dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
0107 {
0108 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
0109 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
0110 itd->urb);
0111 ehci_dbg(ehci,
0112 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
0113 hc32_to_cpu(ehci, itd->hw_transaction[0]),
0114 hc32_to_cpu(ehci, itd->hw_transaction[1]),
0115 hc32_to_cpu(ehci, itd->hw_transaction[2]),
0116 hc32_to_cpu(ehci, itd->hw_transaction[3]),
0117 hc32_to_cpu(ehci, itd->hw_transaction[4]),
0118 hc32_to_cpu(ehci, itd->hw_transaction[5]),
0119 hc32_to_cpu(ehci, itd->hw_transaction[6]),
0120 hc32_to_cpu(ehci, itd->hw_transaction[7]));
0121 ehci_dbg(ehci,
0122 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
0123 hc32_to_cpu(ehci, itd->hw_bufp[0]),
0124 hc32_to_cpu(ehci, itd->hw_bufp[1]),
0125 hc32_to_cpu(ehci, itd->hw_bufp[2]),
0126 hc32_to_cpu(ehci, itd->hw_bufp[3]),
0127 hc32_to_cpu(ehci, itd->hw_bufp[4]),
0128 hc32_to_cpu(ehci, itd->hw_bufp[5]),
0129 hc32_to_cpu(ehci, itd->hw_bufp[6]));
0130 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
0131 itd->index[0], itd->index[1], itd->index[2],
0132 itd->index[3], itd->index[4], itd->index[5],
0133 itd->index[6], itd->index[7]);
0134 }
0135
0136 static void __maybe_unused
0137 dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
0138 {
0139 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
0140 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
0141 sitd->urb);
0142 ehci_dbg(ehci,
0143 " addr %08x sched %04x result %08x buf %08x %08x\n",
0144 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
0145 hc32_to_cpu(ehci, sitd->hw_uframe),
0146 hc32_to_cpu(ehci, sitd->hw_results),
0147 hc32_to_cpu(ehci, sitd->hw_buf[0]),
0148 hc32_to_cpu(ehci, sitd->hw_buf[1]));
0149 }
0150
0151 static int __maybe_unused
0152 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
0153 {
0154 return scnprintf(buf, len,
0155 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
0156 label, label[0] ? " " : "", status,
0157 (status & STS_PPCE_MASK) ? " PPCE" : "",
0158 (status & STS_ASS) ? " Async" : "",
0159 (status & STS_PSS) ? " Periodic" : "",
0160 (status & STS_RECL) ? " Recl" : "",
0161 (status & STS_HALT) ? " Halt" : "",
0162 (status & STS_IAA) ? " IAA" : "",
0163 (status & STS_FATAL) ? " FATAL" : "",
0164 (status & STS_FLR) ? " FLR" : "",
0165 (status & STS_PCD) ? " PCD" : "",
0166 (status & STS_ERR) ? " ERR" : "",
0167 (status & STS_INT) ? " INT" : "");
0168 }
0169
0170 static int __maybe_unused
0171 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
0172 {
0173 return scnprintf(buf, len,
0174 "%s%sintrenable %02x%s%s%s%s%s%s%s",
0175 label, label[0] ? " " : "", enable,
0176 (enable & STS_PPCE_MASK) ? " PPCE" : "",
0177 (enable & STS_IAA) ? " IAA" : "",
0178 (enable & STS_FATAL) ? " FATAL" : "",
0179 (enable & STS_FLR) ? " FLR" : "",
0180 (enable & STS_PCD) ? " PCD" : "",
0181 (enable & STS_ERR) ? " ERR" : "",
0182 (enable & STS_INT) ? " INT" : "");
0183 }
0184
0185 static const char *const fls_strings[] = { "1024", "512", "256", "??" };
0186
0187 static int
0188 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
0189 {
0190 return scnprintf(buf, len,
0191 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
0192 "period=%s%s %s",
0193 label, label[0] ? " " : "", command,
0194 (command & CMD_HIRD) ? " HIRD" : "",
0195 (command & CMD_PPCEE) ? " PPCEE" : "",
0196 (command & CMD_FSP) ? " FSP" : "",
0197 (command & CMD_ASPE) ? " ASPE" : "",
0198 (command & CMD_PSPE) ? " PSPE" : "",
0199 (command & CMD_PARK) ? " park" : "(park)",
0200 CMD_PARK_CNT(command),
0201 (command >> 16) & 0x3f,
0202 (command & CMD_LRESET) ? " LReset" : "",
0203 (command & CMD_IAAD) ? " IAAD" : "",
0204 (command & CMD_ASE) ? " Async" : "",
0205 (command & CMD_PSE) ? " Periodic" : "",
0206 fls_strings[(command >> 2) & 0x3],
0207 (command & CMD_RESET) ? " Reset" : "",
0208 (command & CMD_RUN) ? "RUN" : "HALT");
0209 }
0210
0211 static int
0212 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
0213 {
0214 char *sig;
0215
0216
0217 switch (status & (3 << 10)) {
0218 case 0 << 10:
0219 sig = "se0";
0220 break;
0221 case 1 << 10:
0222 sig = "k";
0223 break;
0224 case 2 << 10:
0225 sig = "j";
0226 break;
0227 default:
0228 sig = "?";
0229 break;
0230 }
0231
0232 return scnprintf(buf, len,
0233 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
0234 "sig=%s%s%s%s%s%s%s%s%s%s%s",
0235 label, label[0] ? " " : "", port, status,
0236 status >> 25,
0237 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
0238 " ACK" : "",
0239 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
0240 " NYET" : "",
0241 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
0242 " STALL" : "",
0243 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
0244 " ERR" : "",
0245 (status & PORT_POWER) ? " POWER" : "",
0246 (status & PORT_OWNER) ? " OWNER" : "",
0247 sig,
0248 (status & PORT_LPM) ? " LPM" : "",
0249 (status & PORT_RESET) ? " RESET" : "",
0250 (status & PORT_SUSPEND) ? " SUSPEND" : "",
0251 (status & PORT_RESUME) ? " RESUME" : "",
0252 (status & PORT_OCC) ? " OCC" : "",
0253 (status & PORT_OC) ? " OC" : "",
0254 (status & PORT_PEC) ? " PEC" : "",
0255 (status & PORT_PE) ? " PE" : "",
0256 (status & PORT_CSC) ? " CSC" : "",
0257 (status & PORT_CONNECT) ? " CONNECT" : "");
0258 }
0259
0260 static inline void
0261 dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
0262 {
0263 char buf[80];
0264
0265 dbg_status_buf(buf, sizeof(buf), label, status);
0266 ehci_dbg(ehci, "%s\n", buf);
0267 }
0268
0269 static inline void
0270 dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
0271 {
0272 char buf[80];
0273
0274 dbg_command_buf(buf, sizeof(buf), label, command);
0275 ehci_dbg(ehci, "%s\n", buf);
0276 }
0277
0278 static inline void
0279 dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
0280 {
0281 char buf[80];
0282
0283 dbg_port_buf(buf, sizeof(buf), label, port, status);
0284 ehci_dbg(ehci, "%s\n", buf);
0285 }
0286
0287
0288
0289
0290
0291 static int debug_async_open(struct inode *, struct file *);
0292 static int debug_bandwidth_open(struct inode *, struct file *);
0293 static int debug_periodic_open(struct inode *, struct file *);
0294 static int debug_registers_open(struct inode *, struct file *);
0295
0296 static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
0297 static int debug_close(struct inode *, struct file *);
0298
0299 static const struct file_operations debug_async_fops = {
0300 .owner = THIS_MODULE,
0301 .open = debug_async_open,
0302 .read = debug_output,
0303 .release = debug_close,
0304 .llseek = default_llseek,
0305 };
0306
0307 static const struct file_operations debug_bandwidth_fops = {
0308 .owner = THIS_MODULE,
0309 .open = debug_bandwidth_open,
0310 .read = debug_output,
0311 .release = debug_close,
0312 .llseek = default_llseek,
0313 };
0314
0315 static const struct file_operations debug_periodic_fops = {
0316 .owner = THIS_MODULE,
0317 .open = debug_periodic_open,
0318 .read = debug_output,
0319 .release = debug_close,
0320 .llseek = default_llseek,
0321 };
0322
0323 static const struct file_operations debug_registers_fops = {
0324 .owner = THIS_MODULE,
0325 .open = debug_registers_open,
0326 .read = debug_output,
0327 .release = debug_close,
0328 .llseek = default_llseek,
0329 };
0330
0331 static struct dentry *ehci_debug_root;
0332
0333 struct debug_buffer {
0334 ssize_t (*fill_func)(struct debug_buffer *);
0335 struct usb_bus *bus;
0336 struct mutex mutex;
0337 size_t count;
0338 char *output_buf;
0339 size_t alloc_size;
0340 };
0341
0342 static inline char speed_char(u32 info1)
0343 {
0344 switch (info1 & (3 << 12)) {
0345 case QH_FULL_SPEED:
0346 return 'f';
0347 case QH_LOW_SPEED:
0348 return 'l';
0349 case QH_HIGH_SPEED:
0350 return 'h';
0351 default:
0352 return '?';
0353 }
0354 }
0355
0356 static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
0357 {
0358 __u32 v = hc32_to_cpu(ehci, token);
0359
0360 if (v & QTD_STS_ACTIVE)
0361 return '*';
0362 if (v & QTD_STS_HALT)
0363 return '-';
0364 if (!IS_SHORT_READ(v))
0365 return ' ';
0366
0367 return '/';
0368 }
0369
0370 static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
0371 char **nextp, unsigned *sizep)
0372 {
0373 u32 scratch;
0374 u32 hw_curr;
0375 struct list_head *entry;
0376 struct ehci_qtd *td;
0377 unsigned temp;
0378 unsigned size = *sizep;
0379 char *next = *nextp;
0380 char mark;
0381 __le32 list_end = EHCI_LIST_END(ehci);
0382 struct ehci_qh_hw *hw = qh->hw;
0383
0384 if (hw->hw_qtd_next == list_end)
0385 mark = '@';
0386 else
0387 mark = token_mark(ehci, hw->hw_token);
0388 if (mark == '/') {
0389 if ((hw->hw_alt_next & QTD_MASK(ehci))
0390 == ehci->async->hw->hw_alt_next)
0391 mark = '#';
0392 else if (hw->hw_alt_next == list_end)
0393 mark = '.';
0394
0395 }
0396 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
0397 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
0398 temp = scnprintf(next, size,
0399 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
0400 " [cur %08x next %08x buf[0] %08x]",
0401 qh, scratch & 0x007f,
0402 speed_char (scratch),
0403 (scratch >> 8) & 0x000f,
0404 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
0405 hc32_to_cpup(ehci, &hw->hw_token), mark,
0406 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
0407 ? "data1" : "data0",
0408 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
0409 hc32_to_cpup(ehci, &hw->hw_current),
0410 hc32_to_cpup(ehci, &hw->hw_qtd_next),
0411 hc32_to_cpup(ehci, &hw->hw_buf[0]));
0412 size -= temp;
0413 next += temp;
0414
0415
0416 list_for_each(entry, &qh->qtd_list) {
0417 char *type;
0418
0419 td = list_entry(entry, struct ehci_qtd, qtd_list);
0420 scratch = hc32_to_cpup(ehci, &td->hw_token);
0421 mark = ' ';
0422 if (hw_curr == td->qtd_dma) {
0423 mark = '*';
0424 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
0425 mark = '+';
0426 } else if (QTD_LENGTH(scratch)) {
0427 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
0428 mark = '#';
0429 else if (td->hw_alt_next != list_end)
0430 mark = '/';
0431 }
0432 switch ((scratch >> 8) & 0x03) {
0433 case 0:
0434 type = "out";
0435 break;
0436 case 1:
0437 type = "in";
0438 break;
0439 case 2:
0440 type = "setup";
0441 break;
0442 default:
0443 type = "?";
0444 break;
0445 }
0446 temp = scnprintf(next, size,
0447 "\n\t%p%c%s len=%d %08x urb %p"
0448 " [td %08x buf[0] %08x]",
0449 td, mark, type,
0450 (scratch >> 16) & 0x7fff,
0451 scratch,
0452 td->urb,
0453 (u32) td->qtd_dma,
0454 hc32_to_cpup(ehci, &td->hw_buf[0]));
0455 size -= temp;
0456 next += temp;
0457 if (temp == size)
0458 goto done;
0459 }
0460
0461 temp = scnprintf(next, size, "\n");
0462 size -= temp;
0463 next += temp;
0464
0465 done:
0466 *sizep = size;
0467 *nextp = next;
0468 }
0469
0470 static ssize_t fill_async_buffer(struct debug_buffer *buf)
0471 {
0472 struct usb_hcd *hcd;
0473 struct ehci_hcd *ehci;
0474 unsigned long flags;
0475 unsigned temp, size;
0476 char *next;
0477 struct ehci_qh *qh;
0478
0479 hcd = bus_to_hcd(buf->bus);
0480 ehci = hcd_to_ehci(hcd);
0481 next = buf->output_buf;
0482 size = buf->alloc_size;
0483
0484 *next = 0;
0485
0486
0487
0488
0489
0490
0491 spin_lock_irqsave(&ehci->lock, flags);
0492 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
0493 qh_lines(ehci, qh, &next, &size);
0494 if (!list_empty(&ehci->async_unlink) && size > 0) {
0495 temp = scnprintf(next, size, "\nunlink =\n");
0496 size -= temp;
0497 next += temp;
0498
0499 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
0500 if (size <= 0)
0501 break;
0502 qh_lines(ehci, qh, &next, &size);
0503 }
0504 }
0505 spin_unlock_irqrestore(&ehci->lock, flags);
0506
0507 return strlen(buf->output_buf);
0508 }
0509
0510 static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
0511 {
0512 struct ehci_hcd *ehci;
0513 struct ehci_tt *tt;
0514 struct ehci_per_sched *ps;
0515 unsigned temp, size;
0516 char *next;
0517 unsigned i;
0518 u8 *bw;
0519 u16 *bf;
0520 u8 budget[EHCI_BANDWIDTH_SIZE];
0521
0522 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
0523 next = buf->output_buf;
0524 size = buf->alloc_size;
0525
0526 *next = 0;
0527
0528 spin_lock_irq(&ehci->lock);
0529
0530
0531 temp = scnprintf(next, size,
0532 "HS bandwidth allocation (us per microframe)\n");
0533 size -= temp;
0534 next += temp;
0535 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
0536 bw = &ehci->bandwidth[i];
0537 temp = scnprintf(next, size,
0538 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
0539 i, bw[0], bw[1], bw[2], bw[3],
0540 bw[4], bw[5], bw[6], bw[7]);
0541 size -= temp;
0542 next += temp;
0543 }
0544
0545
0546 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
0547 temp = scnprintf(next, size,
0548 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
0549 dev_name(&tt->usb_tt->hub->dev),
0550 tt->tt_port + !!tt->usb_tt->multi);
0551 size -= temp;
0552 next += temp;
0553
0554 bf = tt->bandwidth;
0555 temp = scnprintf(next, size,
0556 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
0557 bf[0], bf[1], bf[2], bf[3],
0558 bf[4], bf[5], bf[6], bf[7]);
0559 size -= temp;
0560 next += temp;
0561
0562 temp = scnprintf(next, size,
0563 "FS/LS budget (us per microframe)\n");
0564 size -= temp;
0565 next += temp;
0566 compute_tt_budget(budget, tt);
0567 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
0568 bw = &budget[i];
0569 temp = scnprintf(next, size,
0570 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
0571 i, bw[0], bw[1], bw[2], bw[3],
0572 bw[4], bw[5], bw[6], bw[7]);
0573 size -= temp;
0574 next += temp;
0575 }
0576 list_for_each_entry(ps, &tt->ps_list, ps_list) {
0577 temp = scnprintf(next, size,
0578 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
0579 dev_name(&ps->udev->dev),
0580 ps->ep->desc.bEndpointAddress,
0581 ps->tt_usecs,
0582 ps->bw_phase, ps->phase_uf,
0583 ps->bw_period, ps->cs_mask);
0584 size -= temp;
0585 next += temp;
0586 }
0587 }
0588 spin_unlock_irq(&ehci->lock);
0589
0590 return next - buf->output_buf;
0591 }
0592
0593 static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
0594 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
0595 {
0596 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
0597 struct ehci_qtd *qtd;
0598 char *type = "";
0599 unsigned temp = 0;
0600
0601
0602 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
0603 temp++;
0604 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
0605 case 0:
0606 type = "out";
0607 continue;
0608 case 1:
0609 type = "in";
0610 continue;
0611 }
0612 }
0613
0614 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
0615 speed_char(scratch), scratch & 0x007f,
0616 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
0617 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
0618 }
0619
0620 #define DBG_SCHED_LIMIT 64
0621 static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
0622 {
0623 struct usb_hcd *hcd;
0624 struct ehci_hcd *ehci;
0625 unsigned long flags;
0626 union ehci_shadow p, *seen;
0627 unsigned temp, size, seen_count;
0628 char *next;
0629 unsigned i;
0630 __hc32 tag;
0631
0632 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
0633 if (!seen)
0634 return 0;
0635 seen_count = 0;
0636
0637 hcd = bus_to_hcd(buf->bus);
0638 ehci = hcd_to_ehci(hcd);
0639 next = buf->output_buf;
0640 size = buf->alloc_size;
0641
0642 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
0643 size -= temp;
0644 next += temp;
0645
0646
0647
0648
0649
0650 spin_lock_irqsave(&ehci->lock, flags);
0651 for (i = 0; i < ehci->periodic_size; i++) {
0652 p = ehci->pshadow[i];
0653 if (likely(!p.ptr))
0654 continue;
0655 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
0656
0657 temp = scnprintf(next, size, "%4d: ", i);
0658 size -= temp;
0659 next += temp;
0660
0661 do {
0662 struct ehci_qh_hw *hw;
0663
0664 switch (hc32_to_cpu(ehci, tag)) {
0665 case Q_TYPE_QH:
0666 hw = p.qh->hw;
0667 temp = scnprintf(next, size, " qh%d-%04x/%p",
0668 p.qh->ps.period,
0669 hc32_to_cpup(ehci,
0670 &hw->hw_info2)
0671
0672 & (QH_CMASK | QH_SMASK),
0673 p.qh);
0674 size -= temp;
0675 next += temp;
0676
0677 for (temp = 0; temp < seen_count; temp++) {
0678 if (seen[temp].ptr != p.ptr)
0679 continue;
0680 if (p.qh->qh_next.ptr) {
0681 temp = scnprintf(next, size,
0682 " ...");
0683 size -= temp;
0684 next += temp;
0685 }
0686 break;
0687 }
0688
0689 if (temp == seen_count) {
0690 temp = output_buf_tds_dir(next, ehci,
0691 hw, p.qh, size);
0692
0693 if (seen_count < DBG_SCHED_LIMIT)
0694 seen[seen_count++].qh = p.qh;
0695 } else {
0696 temp = 0;
0697 }
0698 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
0699 p = p.qh->qh_next;
0700 break;
0701 case Q_TYPE_FSTN:
0702 temp = scnprintf(next, size,
0703 " fstn-%8x/%p", p.fstn->hw_prev,
0704 p.fstn);
0705 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
0706 p = p.fstn->fstn_next;
0707 break;
0708 case Q_TYPE_ITD:
0709 temp = scnprintf(next, size,
0710 " itd/%p", p.itd);
0711 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
0712 p = p.itd->itd_next;
0713 break;
0714 case Q_TYPE_SITD:
0715 temp = scnprintf(next, size,
0716 " sitd%d-%04x/%p",
0717 p.sitd->stream->ps.period,
0718 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
0719 & 0x0000ffff,
0720 p.sitd);
0721 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
0722 p = p.sitd->sitd_next;
0723 break;
0724 }
0725 size -= temp;
0726 next += temp;
0727 } while (p.ptr);
0728
0729 temp = scnprintf(next, size, "\n");
0730 size -= temp;
0731 next += temp;
0732 }
0733 spin_unlock_irqrestore(&ehci->lock, flags);
0734 kfree(seen);
0735
0736 return buf->alloc_size - size;
0737 }
0738 #undef DBG_SCHED_LIMIT
0739
0740 static const char *rh_state_string(struct ehci_hcd *ehci)
0741 {
0742 switch (ehci->rh_state) {
0743 case EHCI_RH_HALTED:
0744 return "halted";
0745 case EHCI_RH_SUSPENDED:
0746 return "suspended";
0747 case EHCI_RH_RUNNING:
0748 return "running";
0749 case EHCI_RH_STOPPING:
0750 return "stopping";
0751 }
0752 return "?";
0753 }
0754
0755 static ssize_t fill_registers_buffer(struct debug_buffer *buf)
0756 {
0757 struct usb_hcd *hcd;
0758 struct ehci_hcd *ehci;
0759 unsigned long flags;
0760 unsigned temp, size, i;
0761 char *next, scratch[80];
0762 static char fmt[] = "%*s\n";
0763 static char label[] = "";
0764
0765 hcd = bus_to_hcd(buf->bus);
0766 ehci = hcd_to_ehci(hcd);
0767 next = buf->output_buf;
0768 size = buf->alloc_size;
0769
0770 spin_lock_irqsave(&ehci->lock, flags);
0771
0772 if (!HCD_HW_ACCESSIBLE(hcd)) {
0773 size = scnprintf(next, size,
0774 "bus %s, device %s\n"
0775 "%s\n"
0776 "SUSPENDED (no register access)\n",
0777 hcd->self.controller->bus->name,
0778 dev_name(hcd->self.controller),
0779 hcd->product_desc);
0780 goto done;
0781 }
0782
0783
0784 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
0785 temp = scnprintf(next, size,
0786 "bus %s, device %s\n"
0787 "%s\n"
0788 "EHCI %x.%02x, rh state %s\n",
0789 hcd->self.controller->bus->name,
0790 dev_name(hcd->self.controller),
0791 hcd->product_desc,
0792 i >> 8, i & 0x0ff, rh_state_string(ehci));
0793 size -= temp;
0794 next += temp;
0795
0796 #ifdef CONFIG_USB_PCI
0797
0798 if (dev_is_pci(hcd->self.controller)) {
0799 struct pci_dev *pdev;
0800 u32 offset, cap, cap2;
0801 unsigned count = 256 / 4;
0802
0803 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
0804 offset = HCC_EXT_CAPS(ehci_readl(ehci,
0805 &ehci->caps->hcc_params));
0806 while (offset && count--) {
0807 pci_read_config_dword(pdev, offset, &cap);
0808 switch (cap & 0xff) {
0809 case 1:
0810 temp = scnprintf(next, size,
0811 "ownership %08x%s%s\n", cap,
0812 (cap & (1 << 24)) ? " linux" : "",
0813 (cap & (1 << 16)) ? " firmware" : "");
0814 size -= temp;
0815 next += temp;
0816
0817 offset += 4;
0818 pci_read_config_dword(pdev, offset, &cap2);
0819 temp = scnprintf(next, size,
0820 "SMI sts/enable 0x%08x\n", cap2);
0821 size -= temp;
0822 next += temp;
0823 break;
0824 case 0:
0825 cap = 0;
0826 fallthrough;
0827 default:
0828 break;
0829 }
0830 offset = (cap >> 8) & 0xff;
0831 }
0832 }
0833 #endif
0834
0835
0836 i = ehci_readl(ehci, &ehci->caps->hcs_params);
0837 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
0838 size -= temp;
0839 next += temp;
0840
0841 i = ehci_readl(ehci, &ehci->caps->hcc_params);
0842 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
0843 size -= temp;
0844 next += temp;
0845
0846
0847 temp = dbg_status_buf(scratch, sizeof(scratch), label,
0848 ehci_readl(ehci, &ehci->regs->status));
0849 temp = scnprintf(next, size, fmt, temp, scratch);
0850 size -= temp;
0851 next += temp;
0852
0853 temp = dbg_command_buf(scratch, sizeof(scratch), label,
0854 ehci_readl(ehci, &ehci->regs->command));
0855 temp = scnprintf(next, size, fmt, temp, scratch);
0856 size -= temp;
0857 next += temp;
0858
0859 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
0860 ehci_readl(ehci, &ehci->regs->intr_enable));
0861 temp = scnprintf(next, size, fmt, temp, scratch);
0862 size -= temp;
0863 next += temp;
0864
0865 temp = scnprintf(next, size, "uframe %04x\n",
0866 ehci_read_frame_index(ehci));
0867 size -= temp;
0868 next += temp;
0869
0870 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
0871 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
0872 ehci_readl(ehci,
0873 &ehci->regs->port_status[i - 1]));
0874 temp = scnprintf(next, size, fmt, temp, scratch);
0875 size -= temp;
0876 next += temp;
0877 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
0878 temp = scnprintf(next, size,
0879 " debug control %08x\n",
0880 ehci_readl(ehci,
0881 &ehci->debug->control));
0882 size -= temp;
0883 next += temp;
0884 }
0885 }
0886
0887 if (!list_empty(&ehci->async_unlink)) {
0888 temp = scnprintf(next, size, "async unlink qh %p\n",
0889 list_first_entry(&ehci->async_unlink,
0890 struct ehci_qh, unlink_node));
0891 size -= temp;
0892 next += temp;
0893 }
0894
0895 #ifdef EHCI_STATS
0896 temp = scnprintf(next, size,
0897 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
0898 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
0899 ehci->stats.lost_iaa);
0900 size -= temp;
0901 next += temp;
0902
0903 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
0904 ehci->stats.complete, ehci->stats.unlink);
0905 size -= temp;
0906 next += temp;
0907 #endif
0908
0909 done:
0910 spin_unlock_irqrestore(&ehci->lock, flags);
0911
0912 return buf->alloc_size - size;
0913 }
0914
0915 static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
0916 ssize_t (*fill_func)(struct debug_buffer *))
0917 {
0918 struct debug_buffer *buf;
0919
0920 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
0921
0922 if (buf) {
0923 buf->bus = bus;
0924 buf->fill_func = fill_func;
0925 mutex_init(&buf->mutex);
0926 buf->alloc_size = PAGE_SIZE;
0927 }
0928
0929 return buf;
0930 }
0931
0932 static int fill_buffer(struct debug_buffer *buf)
0933 {
0934 int ret;
0935
0936 if (!buf->output_buf)
0937 buf->output_buf = vmalloc(buf->alloc_size);
0938
0939 if (!buf->output_buf) {
0940 ret = -ENOMEM;
0941 goto out;
0942 }
0943
0944 ret = buf->fill_func(buf);
0945
0946 if (ret >= 0) {
0947 buf->count = ret;
0948 ret = 0;
0949 }
0950
0951 out:
0952 return ret;
0953 }
0954
0955 static ssize_t debug_output(struct file *file, char __user *user_buf,
0956 size_t len, loff_t *offset)
0957 {
0958 struct debug_buffer *buf = file->private_data;
0959 int ret;
0960
0961 mutex_lock(&buf->mutex);
0962 if (buf->count == 0) {
0963 ret = fill_buffer(buf);
0964 if (ret != 0) {
0965 mutex_unlock(&buf->mutex);
0966 goto out;
0967 }
0968 }
0969 mutex_unlock(&buf->mutex);
0970
0971 ret = simple_read_from_buffer(user_buf, len, offset,
0972 buf->output_buf, buf->count);
0973
0974 out:
0975 return ret;
0976 }
0977
0978 static int debug_close(struct inode *inode, struct file *file)
0979 {
0980 struct debug_buffer *buf = file->private_data;
0981
0982 if (buf) {
0983 vfree(buf->output_buf);
0984 kfree(buf);
0985 }
0986
0987 return 0;
0988 }
0989
0990 static int debug_async_open(struct inode *inode, struct file *file)
0991 {
0992 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
0993
0994 return file->private_data ? 0 : -ENOMEM;
0995 }
0996
0997 static int debug_bandwidth_open(struct inode *inode, struct file *file)
0998 {
0999 file->private_data = alloc_buffer(inode->i_private,
1000 fill_bandwidth_buffer);
1001
1002 return file->private_data ? 0 : -ENOMEM;
1003 }
1004
1005 static int debug_periodic_open(struct inode *inode, struct file *file)
1006 {
1007 struct debug_buffer *buf;
1008
1009 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1010 if (!buf)
1011 return -ENOMEM;
1012
1013 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
1014 file->private_data = buf;
1015 return 0;
1016 }
1017
1018 static int debug_registers_open(struct inode *inode, struct file *file)
1019 {
1020 file->private_data = alloc_buffer(inode->i_private,
1021 fill_registers_buffer);
1022
1023 return file->private_data ? 0 : -ENOMEM;
1024 }
1025
1026 static inline void create_debug_files(struct ehci_hcd *ehci)
1027 {
1028 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1029
1030 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1031
1032 debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1033 &debug_async_fops);
1034 debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1035 &debug_bandwidth_fops);
1036 debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1037 &debug_periodic_fops);
1038 debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1039 &debug_registers_fops);
1040 }
1041
1042 static inline void remove_debug_files(struct ehci_hcd *ehci)
1043 {
1044 debugfs_remove_recursive(ehci->debug_dir);
1045 }
1046
1047 #else
1048
1049 static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) { }
1050 static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) { }
1051
1052 static inline void __maybe_unused dbg_qh(const char *label,
1053 struct ehci_hcd *ehci, struct ehci_qh *qh) { }
1054
1055 static inline int __maybe_unused dbg_status_buf(const char *buf,
1056 unsigned int len, const char *label, u32 status)
1057 { return 0; }
1058
1059 static inline int __maybe_unused dbg_command_buf(const char *buf,
1060 unsigned int len, const char *label, u32 command)
1061 { return 0; }
1062
1063 static inline int __maybe_unused dbg_intr_buf(const char *buf,
1064 unsigned int len, const char *label, u32 enable)
1065 { return 0; }
1066
1067 static inline int __maybe_unused dbg_port_buf(char *buf,
1068 unsigned int len, const char *label, int port, u32 status)
1069 { return 0; }
1070
1071 static inline void dbg_status(struct ehci_hcd *ehci, const char *label,
1072 u32 status) { }
1073 static inline void dbg_cmd(struct ehci_hcd *ehci, const char *label,
1074 u32 command) { }
1075 static inline void dbg_port(struct ehci_hcd *ehci, const char *label,
1076 int port, u32 status) { }
1077
1078 static inline void create_debug_files(struct ehci_hcd *bus) { }
1079 static inline void remove_debug_files(struct ehci_hcd *bus) { }
1080
1081 #endif