usb/dwc3/gadget.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * gadget.h - DesignWare USB3 DRD Gadget Header
0004  *
0005  * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Authors: Felipe Balbi <balbi@ti.com>,
0008  *      Sebastian Andrzej Siewior <bigeasy@linutronix.de>
0009  */
0010
0011 #ifndef __DRIVERS_USB_DWC3_GADGET_H
0012 #define __DRIVERS_USB_DWC3_GADGET_H
0013
0014 #include <linux/list.h>
0015 #include <linux/usb/gadget.h>
0016 #include "io.h"
0017
0018 struct dwc3;
0019 #define to_dwc3_ep(ep)      (container_of(ep, struct dwc3_ep, endpoint))
0020 #define gadget_to_dwc(g)    (dev_get_platdata(&g->dev))
0021
0022 /* DEPCFG parameter 1 */
0023 #define DWC3_DEPCFG_INT_NUM(n)      (((n) & 0x1f) << 0)
0024 #define DWC3_DEPCFG_XFER_COMPLETE_EN    BIT(8)
0025 #define DWC3_DEPCFG_XFER_IN_PROGRESS_EN BIT(9)
0026 #define DWC3_DEPCFG_XFER_NOT_READY_EN   BIT(10)
0027 #define DWC3_DEPCFG_FIFO_ERROR_EN   BIT(11)
0028 #define DWC3_DEPCFG_STREAM_EVENT_EN BIT(13)
0029 #define DWC3_DEPCFG_BINTERVAL_M1(n) (((n) & 0xff) << 16)
0030 #define DWC3_DEPCFG_STREAM_CAPABLE  BIT(24)
0031 #define DWC3_DEPCFG_EP_NUMBER(n)    (((n) & 0x1f) << 25)
0032 #define DWC3_DEPCFG_BULK_BASED      BIT(30)
0033 #define DWC3_DEPCFG_FIFO_BASED      BIT(31)
0034
0035 /* DEPCFG parameter 0 */
0036 #define DWC3_DEPCFG_EP_TYPE(n)      (((n) & 0x3) << 1)
0037 #define DWC3_DEPCFG_MAX_PACKET_SIZE(n)  (((n) & 0x7ff) << 3)
0038 #define DWC3_DEPCFG_FIFO_NUMBER(n)  (((n) & 0x1f) << 17)
0039 #define DWC3_DEPCFG_BURST_SIZE(n)   (((n) & 0xf) << 22)
0040 #define DWC3_DEPCFG_DATA_SEQ_NUM(n) ((n) << 26)
0041 /* This applies for core versions earlier than 1.94a */
0042 #define DWC3_DEPCFG_IGN_SEQ_NUM     BIT(31)
0043 /* These apply for core versions 1.94a and later */
0044 #define DWC3_DEPCFG_ACTION_INIT     (0 << 30)
0045 #define DWC3_DEPCFG_ACTION_RESTORE  BIT(30)
0046 #define DWC3_DEPCFG_ACTION_MODIFY   (2 << 30)
0047
0048 /* DEPXFERCFG parameter 0 */
0049 #define DWC3_DEPXFERCFG_NUM_XFER_RES(n) ((n) & 0xffff)
0050
0051 /* U1 Device exit Latency */
0052 #define DWC3_DEFAULT_U1_DEV_EXIT_LAT    0x0A    /* Less then 10 microsec */
0053
0054 /* U2 Device exit Latency */
0055 #define DWC3_DEFAULT_U2_DEV_EXIT_LAT    0x1FF   /* Less then 511 microsec */
0056
0057 /* Frame/Microframe Number Mask */
0058 #define DWC3_FRNUMBER_MASK      0x3fff
0059 /* -------------------------------------------------------------------------- */
0060
0061 #define to_dwc3_request(r)  (container_of(r, struct dwc3_request, request))
0062
0063 /**
0064  * next_request - gets the next request on the given list
0065  * @list: the request list to operate on
0066  *
0067  * Caller should take care of locking. This function return %NULL or the first
0068  * request available on @list.
0069  */
0070 static inline struct dwc3_request *next_request(struct list_head *list)
0071 {
0072     return list_first_entry_or_null(list, struct dwc3_request, list);
0073 }
0074
0075 /**
0076  * dwc3_gadget_move_started_request - move @req to the started_list
0077  * @req: the request to be moved
0078  *
0079  * Caller should take care of locking. This function will move @req from its
0080  * current list to the endpoint's started_list.
0081  */
0082 static inline void dwc3_gadget_move_started_request(struct dwc3_request *req)
0083 {
0084     struct dwc3_ep      *dep = req->dep;
0085
0086     req->status = DWC3_REQUEST_STATUS_STARTED;
0087     list_move_tail(&req->list, &dep->started_list);
0088 }
0089
0090 /**
0091  * dwc3_gadget_move_cancelled_request - move @req to the cancelled_list
0092  * @req: the request to be moved
0093  * @reason: cancelled reason for the dwc3 request
0094  *
0095  * Caller should take care of locking. This function will move @req from its
0096  * current list to the endpoint's cancelled_list.
0097  */
0098 static inline void dwc3_gadget_move_cancelled_request(struct dwc3_request *req,
0099         unsigned int reason)
0100 {
0101     struct dwc3_ep      *dep = req->dep;
0102
0103     req->status = reason;
0104     list_move_tail(&req->list, &dep->cancelled_list);
0105 }
0106
0107 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
0108         int status);
0109
0110 void dwc3_ep0_interrupt(struct dwc3 *dwc,
0111         const struct dwc3_event_depevt *event);
0112 void dwc3_ep0_out_start(struct dwc3 *dwc);
0113 void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep);
0114 void dwc3_ep0_stall_and_restart(struct dwc3 *dwc);
0115 int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value);
0116 int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value);
0117 int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
0118         gfp_t gfp_flags);
0119 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol);
0120 void dwc3_ep0_send_delayed_status(struct dwc3 *dwc);
0121 void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, bool interrupt);
0122
0123 /**
0124  * dwc3_gadget_ep_get_transfer_index - Gets transfer index from HW
0125  * @dep: dwc3 endpoint
0126  *
0127  * Caller should take care of locking. Returns the transfer resource
0128  * index for a given endpoint.
0129  */
0130 static inline void dwc3_gadget_ep_get_transfer_index(struct dwc3_ep *dep)
0131 {
0132     u32         res_id;
0133
0134     res_id = dwc3_readl(dep->regs, DWC3_DEPCMD);
0135     dep->resource_index = DWC3_DEPCMD_GET_RSC_IDX(res_id);
0136 }
0137
0138 /**
0139  * dwc3_gadget_dctl_write_safe - write to DCTL safe from link state change
0140  * @dwc: pointer to our context structure
0141  * @value: value to write to DCTL
0142  *
0143  * Use this function when doing read-modify-write to DCTL. It will not
0144  * send link state change request.
0145  */
0146 static inline void dwc3_gadget_dctl_write_safe(struct dwc3 *dwc, u32 value)
0147 {
0148     value &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
0149     dwc3_writel(dwc->regs, DWC3_DCTL, value);
0150 }
0151
0152 #endif /* __DRIVERS_USB_DWC3_GADGET_H */