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0008 #include <linux/clk.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/io.h>
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/pm_runtime.h>
0016
0017 #include "core.h"
0018
0019
0020 #define USB_WAKEUP_CTRL 0x00
0021
0022
0023 #define USB_WAKEUP_EN BIT(31)
0024
0025 #define USB_WAKEUP_SS_CONN BIT(5)
0026
0027 #define USB_WAKEUP_VBUS_SRC_SESS_VAL BIT(4)
0028
0029 #define USB_WAKEUP_U3_EN BIT(3)
0030
0031 #define USB_WAKEUP_ID_EN BIT(2)
0032
0033 #define USB_WAKEUP_VBUS_EN BIT(1)
0034
0035 #define USB_WAKEUP_DPDM_EN BIT(0)
0036
0037 #define USB_WAKEUP_EN_MASK GENMASK(5, 0)
0038
0039
0040 #define USB_CTRL0 0x00
0041 #define USB_CTRL1 0x04
0042
0043 #define USB_CTRL0_PORTPWR_EN BIT(12)
0044 #define USB_CTRL0_USB3_FIXED BIT(22)
0045 #define USB_CTRL0_USB2_FIXED BIT(23)
0046
0047 #define USB_CTRL1_OC_POLARITY BIT(16)
0048 #define USB_CTRL1_PWR_POLARITY BIT(17)
0049
0050 struct dwc3_imx8mp {
0051 struct device *dev;
0052 struct platform_device *dwc3;
0053 void __iomem *hsio_blk_base;
0054 void __iomem *glue_base;
0055 struct clk *hsio_clk;
0056 struct clk *suspend_clk;
0057 int irq;
0058 bool pm_suspended;
0059 bool wakeup_pending;
0060 };
0061
0062 static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx)
0063 {
0064 struct device *dev = dwc3_imx->dev;
0065 u32 value;
0066
0067 if (!dwc3_imx->glue_base)
0068 return;
0069
0070 value = readl(dwc3_imx->glue_base + USB_CTRL0);
0071
0072 if (device_property_read_bool(dev, "fsl,permanently-attached"))
0073 value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
0074 else
0075 value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
0076
0077 if (device_property_read_bool(dev, "fsl,disable-port-power-control"))
0078 value &= ~(USB_CTRL0_PORTPWR_EN);
0079 else
0080 value |= USB_CTRL0_PORTPWR_EN;
0081
0082 writel(value, dwc3_imx->glue_base + USB_CTRL0);
0083
0084 value = readl(dwc3_imx->glue_base + USB_CTRL1);
0085 if (device_property_read_bool(dev, "fsl,over-current-active-low"))
0086 value |= USB_CTRL1_OC_POLARITY;
0087 else
0088 value &= ~USB_CTRL1_OC_POLARITY;
0089
0090 if (device_property_read_bool(dev, "fsl,power-active-low"))
0091 value |= USB_CTRL1_PWR_POLARITY;
0092 else
0093 value &= ~USB_CTRL1_PWR_POLARITY;
0094
0095 writel(value, dwc3_imx->glue_base + USB_CTRL1);
0096 }
0097
0098 static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx)
0099 {
0100 struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
0101 u32 val;
0102
0103 if (!dwc3)
0104 return;
0105
0106 val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
0107
0108 if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci)
0109 val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN |
0110 USB_WAKEUP_U3_EN | USB_WAKEUP_DPDM_EN;
0111 else if (dwc3->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
0112 val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN |
0113 USB_WAKEUP_VBUS_SRC_SESS_VAL;
0114
0115 writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
0116 }
0117
0118 static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx)
0119 {
0120 u32 val;
0121
0122 val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
0123 val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK);
0124 writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
0125 }
0126
0127 static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
0128 {
0129 struct dwc3_imx8mp *dwc3_imx = _dwc3_imx;
0130 struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
0131
0132 if (!dwc3_imx->pm_suspended)
0133 return IRQ_HANDLED;
0134
0135 disable_irq_nosync(dwc3_imx->irq);
0136 dwc3_imx->wakeup_pending = true;
0137
0138 if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci)
0139 pm_runtime_resume(&dwc->xhci->dev);
0140 else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
0141 pm_runtime_get(dwc->dev);
0142
0143 return IRQ_HANDLED;
0144 }
0145
0146 static int dwc3_imx8mp_probe(struct platform_device *pdev)
0147 {
0148 struct device *dev = &pdev->dev;
0149 struct device_node *dwc3_np, *node = dev->of_node;
0150 struct dwc3_imx8mp *dwc3_imx;
0151 struct resource *res;
0152 int err, irq;
0153
0154 if (!node) {
0155 dev_err(dev, "device node not found\n");
0156 return -EINVAL;
0157 }
0158
0159 dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL);
0160 if (!dwc3_imx)
0161 return -ENOMEM;
0162
0163 platform_set_drvdata(pdev, dwc3_imx);
0164
0165 dwc3_imx->dev = dev;
0166
0167 dwc3_imx->hsio_blk_base = devm_platform_ioremap_resource(pdev, 0);
0168 if (IS_ERR(dwc3_imx->hsio_blk_base))
0169 return PTR_ERR(dwc3_imx->hsio_blk_base);
0170
0171 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
0172 if (!res) {
0173 dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though.");
0174 } else {
0175 dwc3_imx->glue_base = devm_ioremap_resource(dev, res);
0176 if (IS_ERR(dwc3_imx->glue_base))
0177 return PTR_ERR(dwc3_imx->glue_base);
0178 }
0179
0180 dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio");
0181 if (IS_ERR(dwc3_imx->hsio_clk)) {
0182 err = PTR_ERR(dwc3_imx->hsio_clk);
0183 dev_err(dev, "Failed to get hsio clk, err=%d\n", err);
0184 return err;
0185 }
0186
0187 err = clk_prepare_enable(dwc3_imx->hsio_clk);
0188 if (err) {
0189 dev_err(dev, "Failed to enable hsio clk, err=%d\n", err);
0190 return err;
0191 }
0192
0193 dwc3_imx->suspend_clk = devm_clk_get(dev, "suspend");
0194 if (IS_ERR(dwc3_imx->suspend_clk)) {
0195 err = PTR_ERR(dwc3_imx->suspend_clk);
0196 dev_err(dev, "Failed to get suspend clk, err=%d\n", err);
0197 goto disable_hsio_clk;
0198 }
0199
0200 err = clk_prepare_enable(dwc3_imx->suspend_clk);
0201 if (err) {
0202 dev_err(dev, "Failed to enable suspend clk, err=%d\n", err);
0203 goto disable_hsio_clk;
0204 }
0205
0206 irq = platform_get_irq(pdev, 0);
0207 if (irq < 0) {
0208 err = irq;
0209 goto disable_clks;
0210 }
0211 dwc3_imx->irq = irq;
0212
0213 imx8mp_configure_glue(dwc3_imx);
0214
0215 pm_runtime_set_active(dev);
0216 pm_runtime_enable(dev);
0217 err = pm_runtime_get_sync(dev);
0218 if (err < 0)
0219 goto disable_rpm;
0220
0221 dwc3_np = of_get_compatible_child(node, "snps,dwc3");
0222 if (!dwc3_np) {
0223 err = -ENODEV;
0224 dev_err(dev, "failed to find dwc3 core child\n");
0225 goto disable_rpm;
0226 }
0227
0228 err = of_platform_populate(node, NULL, NULL, dev);
0229 if (err) {
0230 dev_err(&pdev->dev, "failed to create dwc3 core\n");
0231 goto err_node_put;
0232 }
0233
0234 dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
0235 if (!dwc3_imx->dwc3) {
0236 dev_err(dev, "failed to get dwc3 platform device\n");
0237 err = -ENODEV;
0238 goto depopulate;
0239 }
0240 of_node_put(dwc3_np);
0241
0242 err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
0243 IRQF_ONESHOT, dev_name(dev), dwc3_imx);
0244 if (err) {
0245 dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err);
0246 goto depopulate;
0247 }
0248
0249 device_set_wakeup_capable(dev, true);
0250 pm_runtime_put(dev);
0251
0252 return 0;
0253
0254 depopulate:
0255 of_platform_depopulate(dev);
0256 err_node_put:
0257 of_node_put(dwc3_np);
0258 disable_rpm:
0259 pm_runtime_disable(dev);
0260 pm_runtime_put_noidle(dev);
0261 disable_clks:
0262 clk_disable_unprepare(dwc3_imx->suspend_clk);
0263 disable_hsio_clk:
0264 clk_disable_unprepare(dwc3_imx->hsio_clk);
0265
0266 return err;
0267 }
0268
0269 static int dwc3_imx8mp_remove(struct platform_device *pdev)
0270 {
0271 struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
0272 struct device *dev = &pdev->dev;
0273
0274 pm_runtime_get_sync(dev);
0275 of_platform_depopulate(dev);
0276
0277 clk_disable_unprepare(dwc3_imx->suspend_clk);
0278 clk_disable_unprepare(dwc3_imx->hsio_clk);
0279
0280 pm_runtime_disable(dev);
0281 pm_runtime_put_noidle(dev);
0282 platform_set_drvdata(pdev, NULL);
0283
0284 return 0;
0285 }
0286
0287 static int __maybe_unused dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx,
0288 pm_message_t msg)
0289 {
0290 if (dwc3_imx->pm_suspended)
0291 return 0;
0292
0293
0294 if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev))
0295 dwc3_imx8mp_wakeup_enable(dwc3_imx);
0296
0297 dwc3_imx->pm_suspended = true;
0298
0299 return 0;
0300 }
0301
0302 static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx,
0303 pm_message_t msg)
0304 {
0305 struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
0306 int ret = 0;
0307
0308 if (!dwc3_imx->pm_suspended)
0309 return 0;
0310
0311
0312 dwc3_imx8mp_wakeup_disable(dwc3_imx);
0313 dwc3_imx->pm_suspended = false;
0314
0315
0316 imx8mp_configure_glue(dwc3_imx);
0317
0318 if (dwc3_imx->wakeup_pending) {
0319 dwc3_imx->wakeup_pending = false;
0320 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {
0321 pm_runtime_mark_last_busy(dwc->dev);
0322 pm_runtime_put_autosuspend(dwc->dev);
0323 } else {
0324
0325
0326
0327
0328 usleep_range(9000, 10000);
0329 }
0330 enable_irq(dwc3_imx->irq);
0331 }
0332
0333 return ret;
0334 }
0335
0336 static int __maybe_unused dwc3_imx8mp_pm_suspend(struct device *dev)
0337 {
0338 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
0339 int ret;
0340
0341 ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND);
0342
0343 if (device_may_wakeup(dwc3_imx->dev))
0344 enable_irq_wake(dwc3_imx->irq);
0345 else
0346 clk_disable_unprepare(dwc3_imx->suspend_clk);
0347
0348 clk_disable_unprepare(dwc3_imx->hsio_clk);
0349 dev_dbg(dev, "dwc3 imx8mp pm suspend.\n");
0350
0351 return ret;
0352 }
0353
0354 static int __maybe_unused dwc3_imx8mp_pm_resume(struct device *dev)
0355 {
0356 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
0357 int ret;
0358
0359 if (device_may_wakeup(dwc3_imx->dev)) {
0360 disable_irq_wake(dwc3_imx->irq);
0361 } else {
0362 ret = clk_prepare_enable(dwc3_imx->suspend_clk);
0363 if (ret)
0364 return ret;
0365 }
0366
0367 ret = clk_prepare_enable(dwc3_imx->hsio_clk);
0368 if (ret)
0369 return ret;
0370
0371 ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME);
0372
0373 pm_runtime_disable(dev);
0374 pm_runtime_set_active(dev);
0375 pm_runtime_enable(dev);
0376
0377 dev_dbg(dev, "dwc3 imx8mp pm resume.\n");
0378
0379 return ret;
0380 }
0381
0382 static int __maybe_unused dwc3_imx8mp_runtime_suspend(struct device *dev)
0383 {
0384 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
0385
0386 dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n");
0387
0388 return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND);
0389 }
0390
0391 static int __maybe_unused dwc3_imx8mp_runtime_resume(struct device *dev)
0392 {
0393 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
0394
0395 dev_dbg(dev, "dwc3 imx8mp runtime resume.\n");
0396
0397 return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME);
0398 }
0399
0400 static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = {
0401 SET_SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume)
0402 SET_RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend,
0403 dwc3_imx8mp_runtime_resume, NULL)
0404 };
0405
0406 static const struct of_device_id dwc3_imx8mp_of_match[] = {
0407 { .compatible = "fsl,imx8mp-dwc3", },
0408 {},
0409 };
0410 MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match);
0411
0412 static struct platform_driver dwc3_imx8mp_driver = {
0413 .probe = dwc3_imx8mp_probe,
0414 .remove = dwc3_imx8mp_remove,
0415 .driver = {
0416 .name = "imx8mp-dwc3",
0417 .pm = &dwc3_imx8mp_dev_pm_ops,
0418 .of_match_table = dwc3_imx8mp_of_match,
0419 },
0420 };
0421
0422 module_platform_driver(dwc3_imx8mp_driver);
0423
0424 MODULE_ALIAS("platform:imx8mp-dwc3");
0425 MODULE_AUTHOR("jun.li@nxp.com");
0426 MODULE_LICENSE("GPL v2");
0427 MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer");