usb/dwc2/debugfs.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * debugfs.c - Designware USB2 DRD controller debugfs
0004  *
0005  * Copyright (C) 2015 Intel Corporation
0006  * Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
0007  */
0008
0009 #include <linux/spinlock.h>
0010 #include <linux/debugfs.h>
0011 #include <linux/seq_file.h>
0012 #include <linux/uaccess.h>
0013
0014 #include "core.h"
0015 #include "debug.h"
0016
0017 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
0018     IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
0019
0020 /**
0021  * testmode_write() - change usb test mode state.
0022  * @file: The  file to write to.
0023  * @ubuf: The buffer where user wrote.
0024  * @count: The ubuf size.
0025  * @ppos: Unused parameter.
0026  */
0027 static ssize_t testmode_write(struct file *file, const char __user *ubuf, size_t
0028         count, loff_t *ppos)
0029 {
0030     struct seq_file     *s = file->private_data;
0031     struct dwc2_hsotg   *hsotg = s->private;
0032     unsigned long       flags;
0033     u32         testmode = 0;
0034     char            buf[32];
0035
0036     if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
0037         return -EFAULT;
0038
0039     if (!strncmp(buf, "test_j", 6))
0040         testmode = USB_TEST_J;
0041     else if (!strncmp(buf, "test_k", 6))
0042         testmode = USB_TEST_K;
0043     else if (!strncmp(buf, "test_se0_nak", 12))
0044         testmode = USB_TEST_SE0_NAK;
0045     else if (!strncmp(buf, "test_packet", 11))
0046         testmode = USB_TEST_PACKET;
0047     else if (!strncmp(buf, "test_force_enable", 17))
0048         testmode = USB_TEST_FORCE_ENABLE;
0049     else
0050         testmode = 0;
0051
0052     spin_lock_irqsave(&hsotg->lock, flags);
0053     dwc2_hsotg_set_test_mode(hsotg, testmode);
0054     spin_unlock_irqrestore(&hsotg->lock, flags);
0055     return count;
0056 }
0057
0058 /**
0059  * testmode_show() - debugfs: show usb test mode state
0060  * @s: The seq file to write to.
0061  * @unused: Unused parameter.
0062  *
0063  * This debugfs entry shows which usb test mode is currently enabled.
0064  */
0065 static int testmode_show(struct seq_file *s, void *unused)
0066 {
0067     struct dwc2_hsotg *hsotg = s->private;
0068     unsigned long flags;
0069     int dctl;
0070
0071     spin_lock_irqsave(&hsotg->lock, flags);
0072     dctl = dwc2_readl(hsotg, DCTL);
0073     dctl &= DCTL_TSTCTL_MASK;
0074     dctl >>= DCTL_TSTCTL_SHIFT;
0075     spin_unlock_irqrestore(&hsotg->lock, flags);
0076
0077     switch (dctl) {
0078     case 0:
0079         seq_puts(s, "no test\n");
0080         break;
0081     case USB_TEST_J:
0082         seq_puts(s, "test_j\n");
0083         break;
0084     case USB_TEST_K:
0085         seq_puts(s, "test_k\n");
0086         break;
0087     case USB_TEST_SE0_NAK:
0088         seq_puts(s, "test_se0_nak\n");
0089         break;
0090     case USB_TEST_PACKET:
0091         seq_puts(s, "test_packet\n");
0092         break;
0093     case USB_TEST_FORCE_ENABLE:
0094         seq_puts(s, "test_force_enable\n");
0095         break;
0096     default:
0097         seq_printf(s, "UNKNOWN %d\n", dctl);
0098     }
0099
0100     return 0;
0101 }
0102
0103 static int testmode_open(struct inode *inode, struct file *file)
0104 {
0105     return single_open(file, testmode_show, inode->i_private);
0106 }
0107
0108 static const struct file_operations testmode_fops = {
0109     .owner      = THIS_MODULE,
0110     .open       = testmode_open,
0111     .write      = testmode_write,
0112     .read       = seq_read,
0113     .llseek     = seq_lseek,
0114     .release    = single_release,
0115 };
0116
0117 /**
0118  * state_show - debugfs: show overall driver and device state.
0119  * @seq: The seq file to write to.
0120  * @v: Unused parameter.
0121  *
0122  * This debugfs entry shows the overall state of the hardware and
0123  * some general information about each of the endpoints available
0124  * to the system.
0125  */
0126 static int state_show(struct seq_file *seq, void *v)
0127 {
0128     struct dwc2_hsotg *hsotg = seq->private;
0129     int idx;
0130
0131     seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n",
0132            dwc2_readl(hsotg, DCFG),
0133          dwc2_readl(hsotg, DCTL),
0134          dwc2_readl(hsotg, DSTS));
0135
0136     seq_printf(seq, "DIEPMSK=0x%08x, DOEPMASK=0x%08x\n",
0137            dwc2_readl(hsotg, DIEPMSK), dwc2_readl(hsotg, DOEPMSK));
0138
0139     seq_printf(seq, "GINTMSK=0x%08x, GINTSTS=0x%08x\n",
0140            dwc2_readl(hsotg, GINTMSK),
0141            dwc2_readl(hsotg, GINTSTS));
0142
0143     seq_printf(seq, "DAINTMSK=0x%08x, DAINT=0x%08x\n",
0144            dwc2_readl(hsotg, DAINTMSK),
0145            dwc2_readl(hsotg, DAINT));
0146
0147     seq_printf(seq, "GNPTXSTS=0x%08x, GRXSTSR=%08x\n",
0148            dwc2_readl(hsotg, GNPTXSTS),
0149            dwc2_readl(hsotg, GRXSTSR));
0150
0151     seq_puts(seq, "\nEndpoint status:\n");
0152
0153     for (idx = 0; idx < hsotg->num_of_eps; idx++) {
0154         u32 in, out;
0155
0156         in = dwc2_readl(hsotg, DIEPCTL(idx));
0157         out = dwc2_readl(hsotg, DOEPCTL(idx));
0158
0159         seq_printf(seq, "ep%d: DIEPCTL=0x%08x, DOEPCTL=0x%08x",
0160                idx, in, out);
0161
0162         in = dwc2_readl(hsotg, DIEPTSIZ(idx));
0163         out = dwc2_readl(hsotg, DOEPTSIZ(idx));
0164
0165         seq_printf(seq, ", DIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x",
0166                in, out);
0167
0168         seq_puts(seq, "\n");
0169     }
0170
0171     return 0;
0172 }
0173 DEFINE_SHOW_ATTRIBUTE(state);
0174
0175 /**
0176  * fifo_show - debugfs: show the fifo information
0177  * @seq: The seq_file to write data to.
0178  * @v: Unused parameter.
0179  *
0180  * Show the FIFO information for the overall fifo and all the
0181  * periodic transmission FIFOs.
0182  */
0183 static int fifo_show(struct seq_file *seq, void *v)
0184 {
0185     struct dwc2_hsotg *hsotg = seq->private;
0186     int fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
0187     u32 val;
0188     int idx;
0189
0190     seq_puts(seq, "Non-periodic FIFOs:\n");
0191     seq_printf(seq, "RXFIFO: Size %d\n", dwc2_readl(hsotg, GRXFSIZ));
0192
0193     val = dwc2_readl(hsotg, GNPTXFSIZ);
0194     seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n",
0195            val >> FIFOSIZE_DEPTH_SHIFT,
0196            val & FIFOSIZE_STARTADDR_MASK);
0197
0198     seq_puts(seq, "\nPeriodic TXFIFOs:\n");
0199
0200     for (idx = 1; idx <= fifo_count; idx++) {
0201         val = dwc2_readl(hsotg, DPTXFSIZN(idx));
0202
0203         seq_printf(seq, "\tDPTXFIFO%2d: Size %d, Start 0x%08x\n", idx,
0204                val >> FIFOSIZE_DEPTH_SHIFT,
0205                val & FIFOSIZE_STARTADDR_MASK);
0206     }
0207
0208     return 0;
0209 }
0210 DEFINE_SHOW_ATTRIBUTE(fifo);
0211
0212 static const char *decode_direction(int is_in)
0213 {
0214     return is_in ? "in" : "out";
0215 }
0216
0217 /**
0218  * ep_show - debugfs: show the state of an endpoint.
0219  * @seq: The seq_file to write data to.
0220  * @v: Unused parameter.
0221  *
0222  * This debugfs entry shows the state of the given endpoint (one is
0223  * registered for each available).
0224  */
0225 static int ep_show(struct seq_file *seq, void *v)
0226 {
0227     struct dwc2_hsotg_ep *ep = seq->private;
0228     struct dwc2_hsotg *hsotg = ep->parent;
0229     struct dwc2_hsotg_req *req;
0230     int index = ep->index;
0231     int show_limit = 15;
0232     unsigned long flags;
0233
0234     seq_printf(seq, "Endpoint index %d, named %s,  dir %s:\n",
0235            ep->index, ep->ep.name, decode_direction(ep->dir_in));
0236
0237     /* first show the register state */
0238
0239     seq_printf(seq, "\tDIEPCTL=0x%08x, DOEPCTL=0x%08x\n",
0240            dwc2_readl(hsotg, DIEPCTL(index)),
0241            dwc2_readl(hsotg, DOEPCTL(index)));
0242
0243     seq_printf(seq, "\tDIEPDMA=0x%08x, DOEPDMA=0x%08x\n",
0244            dwc2_readl(hsotg, DIEPDMA(index)),
0245            dwc2_readl(hsotg, DOEPDMA(index)));
0246
0247     seq_printf(seq, "\tDIEPINT=0x%08x, DOEPINT=0x%08x\n",
0248            dwc2_readl(hsotg, DIEPINT(index)),
0249            dwc2_readl(hsotg, DOEPINT(index)));
0250
0251     seq_printf(seq, "\tDIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x\n",
0252            dwc2_readl(hsotg, DIEPTSIZ(index)),
0253            dwc2_readl(hsotg, DOEPTSIZ(index)));
0254
0255     seq_puts(seq, "\n");
0256     seq_printf(seq, "mps %d\n", ep->ep.maxpacket);
0257     seq_printf(seq, "total_data=%ld\n", ep->total_data);
0258
0259     seq_printf(seq, "request list (%p,%p):\n",
0260            ep->queue.next, ep->queue.prev);
0261
0262     spin_lock_irqsave(&hsotg->lock, flags);
0263
0264     list_for_each_entry(req, &ep->queue, queue) {
0265         if (--show_limit < 0) {
0266             seq_puts(seq, "not showing more requests...\n");
0267             break;
0268         }
0269
0270         seq_printf(seq, "%c req %p: %d bytes @%p, ",
0271                req == ep->req ? '*' : ' ',
0272                req, req->req.length, req->req.buf);
0273         seq_printf(seq, "%d done, res %d\n",
0274                req->req.actual, req->req.status);
0275     }
0276
0277     spin_unlock_irqrestore(&hsotg->lock, flags);
0278
0279     return 0;
0280 }
0281 DEFINE_SHOW_ATTRIBUTE(ep);
0282
0283 /**
0284  * dwc2_hsotg_create_debug - create debugfs directory and files
0285  * @hsotg: The driver state
0286  *
0287  * Create the debugfs files to allow the user to get information
0288  * about the state of the system. The directory name is created
0289  * with the same name as the device itself, in case we end up
0290  * with multiple blocks in future systems.
0291  */
0292 static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg)
0293 {
0294     struct dentry *root;
0295     unsigned int epidx;
0296
0297     root = hsotg->debug_root;
0298
0299     /* create general state file */
0300     debugfs_create_file("state", 0444, root, hsotg, &state_fops);
0301     debugfs_create_file("testmode", 0644, root, hsotg, &testmode_fops);
0302     debugfs_create_file("fifo", 0444, root, hsotg, &fifo_fops);
0303
0304     /* Create one file for each out endpoint */
0305     for (epidx = 0; epidx < hsotg->num_of_eps; epidx++) {
0306         struct dwc2_hsotg_ep *ep;
0307
0308         ep = hsotg->eps_out[epidx];
0309         if (ep)
0310             debugfs_create_file(ep->name, 0444, root, ep, &ep_fops);
0311     }
0312     /* Create one file for each in endpoint. EP0 is handled with out eps */
0313     for (epidx = 1; epidx < hsotg->num_of_eps; epidx++) {
0314         struct dwc2_hsotg_ep *ep;
0315
0316         ep = hsotg->eps_in[epidx];
0317         if (ep)
0318             debugfs_create_file(ep->name, 0444, root, ep, &ep_fops);
0319     }
0320 }
0321 #else
0322 static inline void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) {}
0323 #endif
0324
0325 /* dwc2_hsotg_delete_debug is removed as cleanup in done in dwc2_debugfs_exit */
0326
0327 #define dump_register(nm)   \
0328 {               \
0329     .name   = #nm,      \
0330     .offset = nm,       \
0331 }
0332
0333 static const struct debugfs_reg32 dwc2_regs[] = {
0334     /*
0335      * Accessing registers like this can trigger mode mismatch interrupt.
0336      * However, according to dwc2 databook, the register access, in this
0337      * case, is completed on the processor bus but is ignored by the core
0338      * and does not affect its operation.
0339      */
0340     dump_register(GOTGCTL),
0341     dump_register(GOTGINT),
0342     dump_register(GAHBCFG),
0343     dump_register(GUSBCFG),
0344     dump_register(GRSTCTL),
0345     dump_register(GINTSTS),
0346     dump_register(GINTMSK),
0347     dump_register(GRXSTSR),
0348     /* Omit GRXSTSP */
0349     dump_register(GRXFSIZ),
0350     dump_register(GNPTXFSIZ),
0351     dump_register(GNPTXSTS),
0352     dump_register(GI2CCTL),
0353     dump_register(GPVNDCTL),
0354     dump_register(GGPIO),
0355     dump_register(GUID),
0356     dump_register(GSNPSID),
0357     dump_register(GHWCFG1),
0358     dump_register(GHWCFG2),
0359     dump_register(GHWCFG3),
0360     dump_register(GHWCFG4),
0361     dump_register(GLPMCFG),
0362     dump_register(GPWRDN),
0363     dump_register(GDFIFOCFG),
0364     dump_register(ADPCTL),
0365     dump_register(HPTXFSIZ),
0366     dump_register(DPTXFSIZN(1)),
0367     dump_register(DPTXFSIZN(2)),
0368     dump_register(DPTXFSIZN(3)),
0369     dump_register(DPTXFSIZN(4)),
0370     dump_register(DPTXFSIZN(5)),
0371     dump_register(DPTXFSIZN(6)),
0372     dump_register(DPTXFSIZN(7)),
0373     dump_register(DPTXFSIZN(8)),
0374     dump_register(DPTXFSIZN(9)),
0375     dump_register(DPTXFSIZN(10)),
0376     dump_register(DPTXFSIZN(11)),
0377     dump_register(DPTXFSIZN(12)),
0378     dump_register(DPTXFSIZN(13)),
0379     dump_register(DPTXFSIZN(14)),
0380     dump_register(DPTXFSIZN(15)),
0381     dump_register(DCFG),
0382     dump_register(DCTL),
0383     dump_register(DSTS),
0384     dump_register(DIEPMSK),
0385     dump_register(DOEPMSK),
0386     dump_register(DAINT),
0387     dump_register(DAINTMSK),
0388     dump_register(DTKNQR1),
0389     dump_register(DTKNQR2),
0390     dump_register(DTKNQR3),
0391     dump_register(DTKNQR4),
0392     dump_register(DVBUSDIS),
0393     dump_register(DVBUSPULSE),
0394     dump_register(DIEPCTL(0)),
0395     dump_register(DIEPCTL(1)),
0396     dump_register(DIEPCTL(2)),
0397     dump_register(DIEPCTL(3)),
0398     dump_register(DIEPCTL(4)),
0399     dump_register(DIEPCTL(5)),
0400     dump_register(DIEPCTL(6)),
0401     dump_register(DIEPCTL(7)),
0402     dump_register(DIEPCTL(8)),
0403     dump_register(DIEPCTL(9)),
0404     dump_register(DIEPCTL(10)),
0405     dump_register(DIEPCTL(11)),
0406     dump_register(DIEPCTL(12)),
0407     dump_register(DIEPCTL(13)),
0408     dump_register(DIEPCTL(14)),
0409     dump_register(DIEPCTL(15)),
0410     dump_register(DOEPCTL(0)),
0411     dump_register(DOEPCTL(1)),
0412     dump_register(DOEPCTL(2)),
0413     dump_register(DOEPCTL(3)),
0414     dump_register(DOEPCTL(4)),
0415     dump_register(DOEPCTL(5)),
0416     dump_register(DOEPCTL(6)),
0417     dump_register(DOEPCTL(7)),
0418     dump_register(DOEPCTL(8)),
0419     dump_register(DOEPCTL(9)),
0420     dump_register(DOEPCTL(10)),
0421     dump_register(DOEPCTL(11)),
0422     dump_register(DOEPCTL(12)),
0423     dump_register(DOEPCTL(13)),
0424     dump_register(DOEPCTL(14)),
0425     dump_register(DOEPCTL(15)),
0426     dump_register(DIEPINT(0)),
0427     dump_register(DIEPINT(1)),
0428     dump_register(DIEPINT(2)),
0429     dump_register(DIEPINT(3)),
0430     dump_register(DIEPINT(4)),
0431     dump_register(DIEPINT(5)),
0432     dump_register(DIEPINT(6)),
0433     dump_register(DIEPINT(7)),
0434     dump_register(DIEPINT(8)),
0435     dump_register(DIEPINT(9)),
0436     dump_register(DIEPINT(10)),
0437     dump_register(DIEPINT(11)),
0438     dump_register(DIEPINT(12)),
0439     dump_register(DIEPINT(13)),
0440     dump_register(DIEPINT(14)),
0441     dump_register(DIEPINT(15)),
0442     dump_register(DOEPINT(0)),
0443     dump_register(DOEPINT(1)),
0444     dump_register(DOEPINT(2)),
0445     dump_register(DOEPINT(3)),
0446     dump_register(DOEPINT(4)),
0447     dump_register(DOEPINT(5)),
0448     dump_register(DOEPINT(6)),
0449     dump_register(DOEPINT(7)),
0450     dump_register(DOEPINT(8)),
0451     dump_register(DOEPINT(9)),
0452     dump_register(DOEPINT(10)),
0453     dump_register(DOEPINT(11)),
0454     dump_register(DOEPINT(12)),
0455     dump_register(DOEPINT(13)),
0456     dump_register(DOEPINT(14)),
0457     dump_register(DOEPINT(15)),
0458     dump_register(DIEPTSIZ(0)),
0459     dump_register(DIEPTSIZ(1)),
0460     dump_register(DIEPTSIZ(2)),
0461     dump_register(DIEPTSIZ(3)),
0462     dump_register(DIEPTSIZ(4)),
0463     dump_register(DIEPTSIZ(5)),
0464     dump_register(DIEPTSIZ(6)),
0465     dump_register(DIEPTSIZ(7)),
0466     dump_register(DIEPTSIZ(8)),
0467     dump_register(DIEPTSIZ(9)),
0468     dump_register(DIEPTSIZ(10)),
0469     dump_register(DIEPTSIZ(11)),
0470     dump_register(DIEPTSIZ(12)),
0471     dump_register(DIEPTSIZ(13)),
0472     dump_register(DIEPTSIZ(14)),
0473     dump_register(DIEPTSIZ(15)),
0474     dump_register(DOEPTSIZ(0)),
0475     dump_register(DOEPTSIZ(1)),
0476     dump_register(DOEPTSIZ(2)),
0477     dump_register(DOEPTSIZ(3)),
0478     dump_register(DOEPTSIZ(4)),
0479     dump_register(DOEPTSIZ(5)),
0480     dump_register(DOEPTSIZ(6)),
0481     dump_register(DOEPTSIZ(7)),
0482     dump_register(DOEPTSIZ(8)),
0483     dump_register(DOEPTSIZ(9)),
0484     dump_register(DOEPTSIZ(10)),
0485     dump_register(DOEPTSIZ(11)),
0486     dump_register(DOEPTSIZ(12)),
0487     dump_register(DOEPTSIZ(13)),
0488     dump_register(DOEPTSIZ(14)),
0489     dump_register(DOEPTSIZ(15)),
0490     dump_register(DIEPDMA(0)),
0491     dump_register(DIEPDMA(1)),
0492     dump_register(DIEPDMA(2)),
0493     dump_register(DIEPDMA(3)),
0494     dump_register(DIEPDMA(4)),
0495     dump_register(DIEPDMA(5)),
0496     dump_register(DIEPDMA(6)),
0497     dump_register(DIEPDMA(7)),
0498     dump_register(DIEPDMA(8)),
0499     dump_register(DIEPDMA(9)),
0500     dump_register(DIEPDMA(10)),
0501     dump_register(DIEPDMA(11)),
0502     dump_register(DIEPDMA(12)),
0503     dump_register(DIEPDMA(13)),
0504     dump_register(DIEPDMA(14)),
0505     dump_register(DIEPDMA(15)),
0506     dump_register(DOEPDMA(0)),
0507     dump_register(DOEPDMA(1)),
0508     dump_register(DOEPDMA(2)),
0509     dump_register(DOEPDMA(3)),
0510     dump_register(DOEPDMA(4)),
0511     dump_register(DOEPDMA(5)),
0512     dump_register(DOEPDMA(6)),
0513     dump_register(DOEPDMA(7)),
0514     dump_register(DOEPDMA(8)),
0515     dump_register(DOEPDMA(9)),
0516     dump_register(DOEPDMA(10)),
0517     dump_register(DOEPDMA(11)),
0518     dump_register(DOEPDMA(12)),
0519     dump_register(DOEPDMA(13)),
0520     dump_register(DOEPDMA(14)),
0521     dump_register(DOEPDMA(15)),
0522     dump_register(DTXFSTS(0)),
0523     dump_register(DTXFSTS(1)),
0524     dump_register(DTXFSTS(2)),
0525     dump_register(DTXFSTS(3)),
0526     dump_register(DTXFSTS(4)),
0527     dump_register(DTXFSTS(5)),
0528     dump_register(DTXFSTS(6)),
0529     dump_register(DTXFSTS(7)),
0530     dump_register(DTXFSTS(8)),
0531     dump_register(DTXFSTS(9)),
0532     dump_register(DTXFSTS(10)),
0533     dump_register(DTXFSTS(11)),
0534     dump_register(DTXFSTS(12)),
0535     dump_register(DTXFSTS(13)),
0536     dump_register(DTXFSTS(14)),
0537     dump_register(DTXFSTS(15)),
0538     dump_register(PCGCTL),
0539     dump_register(HCFG),
0540     dump_register(HFIR),
0541     dump_register(HFNUM),
0542     dump_register(HPTXSTS),
0543     dump_register(HAINT),
0544     dump_register(HAINTMSK),
0545     dump_register(HFLBADDR),
0546     dump_register(HPRT0),
0547     dump_register(HCCHAR(0)),
0548     dump_register(HCCHAR(1)),
0549     dump_register(HCCHAR(2)),
0550     dump_register(HCCHAR(3)),
0551     dump_register(HCCHAR(4)),
0552     dump_register(HCCHAR(5)),
0553     dump_register(HCCHAR(6)),
0554     dump_register(HCCHAR(7)),
0555     dump_register(HCCHAR(8)),
0556     dump_register(HCCHAR(9)),
0557     dump_register(HCCHAR(10)),
0558     dump_register(HCCHAR(11)),
0559     dump_register(HCCHAR(12)),
0560     dump_register(HCCHAR(13)),
0561     dump_register(HCCHAR(14)),
0562     dump_register(HCCHAR(15)),
0563     dump_register(HCSPLT(0)),
0564     dump_register(HCSPLT(1)),
0565     dump_register(HCSPLT(2)),
0566     dump_register(HCSPLT(3)),
0567     dump_register(HCSPLT(4)),
0568     dump_register(HCSPLT(5)),
0569     dump_register(HCSPLT(6)),
0570     dump_register(HCSPLT(7)),
0571     dump_register(HCSPLT(8)),
0572     dump_register(HCSPLT(9)),
0573     dump_register(HCSPLT(10)),
0574     dump_register(HCSPLT(11)),
0575     dump_register(HCSPLT(12)),
0576     dump_register(HCSPLT(13)),
0577     dump_register(HCSPLT(14)),
0578     dump_register(HCSPLT(15)),
0579     dump_register(HCINT(0)),
0580     dump_register(HCINT(1)),
0581     dump_register(HCINT(2)),
0582     dump_register(HCINT(3)),
0583     dump_register(HCINT(4)),
0584     dump_register(HCINT(5)),
0585     dump_register(HCINT(6)),
0586     dump_register(HCINT(7)),
0587     dump_register(HCINT(8)),
0588     dump_register(HCINT(9)),
0589     dump_register(HCINT(10)),
0590     dump_register(HCINT(11)),
0591     dump_register(HCINT(12)),
0592     dump_register(HCINT(13)),
0593     dump_register(HCINT(14)),
0594     dump_register(HCINT(15)),
0595     dump_register(HCINTMSK(0)),
0596     dump_register(HCINTMSK(1)),
0597     dump_register(HCINTMSK(2)),
0598     dump_register(HCINTMSK(3)),
0599     dump_register(HCINTMSK(4)),
0600     dump_register(HCINTMSK(5)),
0601     dump_register(HCINTMSK(6)),
0602     dump_register(HCINTMSK(7)),
0603     dump_register(HCINTMSK(8)),
0604     dump_register(HCINTMSK(9)),
0605     dump_register(HCINTMSK(10)),
0606     dump_register(HCINTMSK(11)),
0607     dump_register(HCINTMSK(12)),
0608     dump_register(HCINTMSK(13)),
0609     dump_register(HCINTMSK(14)),
0610     dump_register(HCINTMSK(15)),
0611     dump_register(HCTSIZ(0)),
0612     dump_register(HCTSIZ(1)),
0613     dump_register(HCTSIZ(2)),
0614     dump_register(HCTSIZ(3)),
0615     dump_register(HCTSIZ(4)),
0616     dump_register(HCTSIZ(5)),
0617     dump_register(HCTSIZ(6)),
0618     dump_register(HCTSIZ(7)),
0619     dump_register(HCTSIZ(8)),
0620     dump_register(HCTSIZ(9)),
0621     dump_register(HCTSIZ(10)),
0622     dump_register(HCTSIZ(11)),
0623     dump_register(HCTSIZ(12)),
0624     dump_register(HCTSIZ(13)),
0625     dump_register(HCTSIZ(14)),
0626     dump_register(HCTSIZ(15)),
0627     dump_register(HCDMA(0)),
0628     dump_register(HCDMA(1)),
0629     dump_register(HCDMA(2)),
0630     dump_register(HCDMA(3)),
0631     dump_register(HCDMA(4)),
0632     dump_register(HCDMA(5)),
0633     dump_register(HCDMA(6)),
0634     dump_register(HCDMA(7)),
0635     dump_register(HCDMA(8)),
0636     dump_register(HCDMA(9)),
0637     dump_register(HCDMA(10)),
0638     dump_register(HCDMA(11)),
0639     dump_register(HCDMA(12)),
0640     dump_register(HCDMA(13)),
0641     dump_register(HCDMA(14)),
0642     dump_register(HCDMA(15)),
0643     dump_register(HCDMAB(0)),
0644     dump_register(HCDMAB(1)),
0645     dump_register(HCDMAB(2)),
0646     dump_register(HCDMAB(3)),
0647     dump_register(HCDMAB(4)),
0648     dump_register(HCDMAB(5)),
0649     dump_register(HCDMAB(6)),
0650     dump_register(HCDMAB(7)),
0651     dump_register(HCDMAB(8)),
0652     dump_register(HCDMAB(9)),
0653     dump_register(HCDMAB(10)),
0654     dump_register(HCDMAB(11)),
0655     dump_register(HCDMAB(12)),
0656     dump_register(HCDMAB(13)),
0657     dump_register(HCDMAB(14)),
0658     dump_register(HCDMAB(15)),
0659 };
0660
0661 #define print_param(_seq, _ptr, _param) \
0662 seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param)
0663
0664 #define print_param_hex(_seq, _ptr, _param) \
0665 seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param)
0666
0667 static int params_show(struct seq_file *seq, void *v)
0668 {
0669     struct dwc2_hsotg *hsotg = seq->private;
0670     struct dwc2_core_params *p = &hsotg->params;
0671     int i;
0672
0673     print_param(seq, p, otg_caps.hnp_support);
0674     print_param(seq, p, otg_caps.srp_support);
0675     print_param(seq, p, otg_caps.otg_rev);
0676     print_param(seq, p, dma_desc_enable);
0677     print_param(seq, p, dma_desc_fs_enable);
0678     print_param(seq, p, speed);
0679     print_param(seq, p, enable_dynamic_fifo);
0680     print_param(seq, p, en_multiple_tx_fifo);
0681     print_param(seq, p, host_rx_fifo_size);
0682     print_param(seq, p, host_nperio_tx_fifo_size);
0683     print_param(seq, p, host_perio_tx_fifo_size);
0684     print_param(seq, p, max_transfer_size);
0685     print_param(seq, p, max_packet_count);
0686     print_param(seq, p, host_channels);
0687     print_param(seq, p, phy_type);
0688     print_param(seq, p, phy_utmi_width);
0689     print_param(seq, p, phy_ulpi_ddr);
0690     print_param(seq, p, phy_ulpi_ext_vbus);
0691     print_param(seq, p, i2c_enable);
0692     print_param(seq, p, ipg_isoc_en);
0693     print_param(seq, p, ulpi_fs_ls);
0694     print_param(seq, p, host_support_fs_ls_low_power);
0695     print_param(seq, p, host_ls_low_power_phy_clk);
0696     print_param(seq, p, activate_stm_fs_transceiver);
0697     print_param(seq, p, activate_stm_id_vb_detection);
0698     print_param(seq, p, ts_dline);
0699     print_param(seq, p, reload_ctl);
0700     print_param_hex(seq, p, ahbcfg);
0701     print_param(seq, p, uframe_sched);
0702     print_param(seq, p, external_id_pin_ctl);
0703     print_param(seq, p, power_down);
0704     print_param(seq, p, lpm);
0705     print_param(seq, p, lpm_clock_gating);
0706     print_param(seq, p, besl);
0707     print_param(seq, p, hird_threshold_en);
0708     print_param(seq, p, hird_threshold);
0709     print_param(seq, p, service_interval);
0710     print_param(seq, p, host_dma);
0711     print_param(seq, p, g_dma);
0712     print_param(seq, p, g_dma_desc);
0713     print_param(seq, p, g_rx_fifo_size);
0714     print_param(seq, p, g_np_tx_fifo_size);
0715
0716     for (i = 0; i < MAX_EPS_CHANNELS; i++) {
0717         char str[32];
0718
0719         snprintf(str, 32, "g_tx_fifo_size[%d]", i);
0720         seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]);
0721     }
0722
0723     return 0;
0724 }
0725 DEFINE_SHOW_ATTRIBUTE(params);
0726
0727 static int hw_params_show(struct seq_file *seq, void *v)
0728 {
0729     struct dwc2_hsotg *hsotg = seq->private;
0730     struct dwc2_hw_params *hw = &hsotg->hw_params;
0731
0732     print_param(seq, hw, op_mode);
0733     print_param(seq, hw, arch);
0734     print_param(seq, hw, dma_desc_enable);
0735     print_param(seq, hw, enable_dynamic_fifo);
0736     print_param(seq, hw, en_multiple_tx_fifo);
0737     print_param(seq, hw, rx_fifo_size);
0738     print_param(seq, hw, host_nperio_tx_fifo_size);
0739     print_param(seq, hw, dev_nperio_tx_fifo_size);
0740     print_param(seq, hw, host_perio_tx_fifo_size);
0741     print_param(seq, hw, nperio_tx_q_depth);
0742     print_param(seq, hw, host_perio_tx_q_depth);
0743     print_param(seq, hw, dev_token_q_depth);
0744     print_param(seq, hw, max_transfer_size);
0745     print_param(seq, hw, max_packet_count);
0746     print_param(seq, hw, host_channels);
0747     print_param(seq, hw, hs_phy_type);
0748     print_param(seq, hw, fs_phy_type);
0749     print_param(seq, hw, i2c_enable);
0750     print_param(seq, hw, num_dev_ep);
0751     print_param(seq, hw, num_dev_perio_in_ep);
0752     print_param(seq, hw, total_fifo_size);
0753     print_param(seq, hw, power_optimized);
0754     print_param(seq, hw, utmi_phy_data_width);
0755     print_param_hex(seq, hw, snpsid);
0756     print_param_hex(seq, hw, dev_ep_dirs);
0757
0758     return 0;
0759 }
0760 DEFINE_SHOW_ATTRIBUTE(hw_params);
0761
0762 static int dr_mode_show(struct seq_file *seq, void *v)
0763 {
0764     struct dwc2_hsotg *hsotg = seq->private;
0765     const char *dr_mode = "";
0766
0767     device_property_read_string(hsotg->dev, "dr_mode", &dr_mode);
0768     seq_printf(seq, "%s\n", dr_mode);
0769     return 0;
0770 }
0771 DEFINE_SHOW_ATTRIBUTE(dr_mode);
0772
0773 int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
0774 {
0775     int         ret;
0776     struct dentry       *root;
0777
0778     root = debugfs_create_dir(dev_name(hsotg->dev), usb_debug_root);
0779     hsotg->debug_root = root;
0780
0781     debugfs_create_file("params", 0444, root, hsotg, &params_fops);
0782     debugfs_create_file("hw_params", 0444, root, hsotg, &hw_params_fops);
0783     debugfs_create_file("dr_mode", 0444, root, hsotg, &dr_mode_fops);
0784
0785     /* Add gadget debugfs nodes */
0786     dwc2_hsotg_create_debug(hsotg);
0787
0788     hsotg->regset = devm_kzalloc(hsotg->dev, sizeof(*hsotg->regset),
0789                                 GFP_KERNEL);
0790     if (!hsotg->regset) {
0791         ret = -ENOMEM;
0792         goto err;
0793     }
0794
0795     hsotg->regset->regs = dwc2_regs;
0796     hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs);
0797     hsotg->regset->base = hsotg->regs;
0798
0799     debugfs_create_regset32("regdump", 0444, root, hsotg->regset);
0800
0801     return 0;
0802 err:
0803     debugfs_remove_recursive(hsotg->debug_root);
0804     return ret;
0805 }
0806
0807 void dwc2_debugfs_exit(struct dwc2_hsotg *hsotg)
0808 {
0809     debugfs_remove_recursive(hsotg->debug_root);
0810     hsotg->debug_root = NULL;
0811 }