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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
0004  *
0005  * Copyright (C) 2014 Freescale Semiconductor, Inc.
0006  *
0007  * Author: Jun Li
0008  */
0009 
0010 /*
0011  * This file mainly handles OTG fsm, it includes OTG fsm operations
0012  * for HNP and SRP.
0013  *
0014  * TODO List
0015  * - ADP
0016  * - OTG test device
0017  */
0018 
0019 #include <linux/usb/otg.h>
0020 #include <linux/usb/gadget.h>
0021 #include <linux/usb/hcd.h>
0022 #include <linux/usb/chipidea.h>
0023 #include <linux/regulator/consumer.h>
0024 
0025 #include "ci.h"
0026 #include "bits.h"
0027 #include "otg.h"
0028 #include "otg_fsm.h"
0029 
0030 /* Add for otg: interact with user space app */
0031 static ssize_t
0032 a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
0033 {
0034     char        *next;
0035     unsigned    size, t;
0036     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0037 
0038     next = buf;
0039     size = PAGE_SIZE;
0040     t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req);
0041     size -= t;
0042     next += t;
0043 
0044     return PAGE_SIZE - size;
0045 }
0046 
0047 static ssize_t
0048 a_bus_req_store(struct device *dev, struct device_attribute *attr,
0049                     const char *buf, size_t count)
0050 {
0051     struct ci_hdrc *ci = dev_get_drvdata(dev);
0052 
0053     if (count > 2)
0054         return -1;
0055 
0056     mutex_lock(&ci->fsm.lock);
0057     if (buf[0] == '0') {
0058         ci->fsm.a_bus_req = 0;
0059     } else if (buf[0] == '1') {
0060         /* If a_bus_drop is TRUE, a_bus_req can't be set */
0061         if (ci->fsm.a_bus_drop) {
0062             mutex_unlock(&ci->fsm.lock);
0063             return count;
0064         }
0065         ci->fsm.a_bus_req = 1;
0066         if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
0067             ci->gadget.host_request_flag = 1;
0068             mutex_unlock(&ci->fsm.lock);
0069             return count;
0070         }
0071     }
0072 
0073     ci_otg_queue_work(ci);
0074     mutex_unlock(&ci->fsm.lock);
0075 
0076     return count;
0077 }
0078 static DEVICE_ATTR_RW(a_bus_req);
0079 
0080 static ssize_t
0081 a_bus_drop_show(struct device *dev, struct device_attribute *attr, char *buf)
0082 {
0083     char        *next;
0084     unsigned    size, t;
0085     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0086 
0087     next = buf;
0088     size = PAGE_SIZE;
0089     t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop);
0090     size -= t;
0091     next += t;
0092 
0093     return PAGE_SIZE - size;
0094 }
0095 
0096 static ssize_t
0097 a_bus_drop_store(struct device *dev, struct device_attribute *attr,
0098                     const char *buf, size_t count)
0099 {
0100     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0101 
0102     if (count > 2)
0103         return -1;
0104 
0105     mutex_lock(&ci->fsm.lock);
0106     if (buf[0] == '0') {
0107         ci->fsm.a_bus_drop = 0;
0108     } else if (buf[0] == '1') {
0109         ci->fsm.a_bus_drop = 1;
0110         ci->fsm.a_bus_req = 0;
0111     }
0112 
0113     ci_otg_queue_work(ci);
0114     mutex_unlock(&ci->fsm.lock);
0115 
0116     return count;
0117 }
0118 static DEVICE_ATTR_RW(a_bus_drop);
0119 
0120 static ssize_t
0121 b_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
0122 {
0123     char        *next;
0124     unsigned    size, t;
0125     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0126 
0127     next = buf;
0128     size = PAGE_SIZE;
0129     t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req);
0130     size -= t;
0131     next += t;
0132 
0133     return PAGE_SIZE - size;
0134 }
0135 
0136 static ssize_t
0137 b_bus_req_store(struct device *dev, struct device_attribute *attr,
0138                     const char *buf, size_t count)
0139 {
0140     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0141 
0142     if (count > 2)
0143         return -1;
0144 
0145     mutex_lock(&ci->fsm.lock);
0146     if (buf[0] == '0')
0147         ci->fsm.b_bus_req = 0;
0148     else if (buf[0] == '1') {
0149         ci->fsm.b_bus_req = 1;
0150         if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
0151             ci->gadget.host_request_flag = 1;
0152             mutex_unlock(&ci->fsm.lock);
0153             return count;
0154         }
0155     }
0156 
0157     ci_otg_queue_work(ci);
0158     mutex_unlock(&ci->fsm.lock);
0159 
0160     return count;
0161 }
0162 static DEVICE_ATTR_RW(b_bus_req);
0163 
0164 static ssize_t
0165 a_clr_err_store(struct device *dev, struct device_attribute *attr,
0166                     const char *buf, size_t count)
0167 {
0168     struct ci_hdrc  *ci = dev_get_drvdata(dev);
0169 
0170     if (count > 2)
0171         return -1;
0172 
0173     mutex_lock(&ci->fsm.lock);
0174     if (buf[0] == '1')
0175         ci->fsm.a_clr_err = 1;
0176 
0177     ci_otg_queue_work(ci);
0178     mutex_unlock(&ci->fsm.lock);
0179 
0180     return count;
0181 }
0182 static DEVICE_ATTR_WO(a_clr_err);
0183 
0184 static struct attribute *inputs_attrs[] = {
0185     &dev_attr_a_bus_req.attr,
0186     &dev_attr_a_bus_drop.attr,
0187     &dev_attr_b_bus_req.attr,
0188     &dev_attr_a_clr_err.attr,
0189     NULL,
0190 };
0191 
0192 static const struct attribute_group inputs_attr_group = {
0193     .name = "inputs",
0194     .attrs = inputs_attrs,
0195 };
0196 
0197 /*
0198  * Keep this list in the same order as timers indexed
0199  * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
0200  */
0201 static unsigned otg_timer_ms[] = {
0202     TA_WAIT_VRISE,
0203     TA_WAIT_VFALL,
0204     TA_WAIT_BCON,
0205     TA_AIDL_BDIS,
0206     TB_ASE0_BRST,
0207     TA_BIDL_ADIS,
0208     TB_AIDL_BDIS,
0209     TB_SE0_SRP,
0210     TB_SRP_FAIL,
0211     0,
0212     TB_DATA_PLS,
0213     TB_SSEND_SRP,
0214 };
0215 
0216 /*
0217  * Add timer to active timer list
0218  */
0219 static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
0220 {
0221     unsigned long flags, timer_sec, timer_nsec;
0222 
0223     if (t >= NUM_OTG_FSM_TIMERS)
0224         return;
0225 
0226     spin_lock_irqsave(&ci->lock, flags);
0227     timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
0228     timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
0229     ci->hr_timeouts[t] = ktime_add(ktime_get(),
0230                 ktime_set(timer_sec, timer_nsec));
0231     ci->enabled_otg_timer_bits |= (1 << t);
0232     if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
0233             ktime_after(ci->hr_timeouts[ci->next_otg_timer],
0234                         ci->hr_timeouts[t])) {
0235             ci->next_otg_timer = t;
0236             hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
0237                     ci->hr_timeouts[t], NSEC_PER_MSEC,
0238                             HRTIMER_MODE_ABS);
0239     }
0240     spin_unlock_irqrestore(&ci->lock, flags);
0241 }
0242 
0243 /*
0244  * Remove timer from active timer list
0245  */
0246 static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
0247 {
0248     unsigned long flags, enabled_timer_bits;
0249     enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
0250 
0251     if ((t >= NUM_OTG_FSM_TIMERS) ||
0252             !(ci->enabled_otg_timer_bits & (1 << t)))
0253         return;
0254 
0255     spin_lock_irqsave(&ci->lock, flags);
0256     ci->enabled_otg_timer_bits &= ~(1 << t);
0257     if (ci->next_otg_timer == t) {
0258         if (ci->enabled_otg_timer_bits == 0) {
0259             /* No enabled timers after delete it */
0260             hrtimer_cancel(&ci->otg_fsm_hrtimer);
0261             ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
0262         } else {
0263             /* Find the next timer */
0264             enabled_timer_bits = ci->enabled_otg_timer_bits;
0265             for_each_set_bit(cur_timer, &enabled_timer_bits,
0266                             NUM_OTG_FSM_TIMERS) {
0267                 if ((next_timer == NUM_OTG_FSM_TIMERS) ||
0268                     ktime_before(ci->hr_timeouts[next_timer],
0269                      ci->hr_timeouts[cur_timer]))
0270                     next_timer = cur_timer;
0271             }
0272         }
0273     }
0274     if (next_timer != NUM_OTG_FSM_TIMERS) {
0275         ci->next_otg_timer = next_timer;
0276         hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
0277             ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
0278                             HRTIMER_MODE_ABS);
0279     }
0280     spin_unlock_irqrestore(&ci->lock, flags);
0281 }
0282 
0283 /* OTG FSM timer handlers */
0284 static int a_wait_vrise_tmout(struct ci_hdrc *ci)
0285 {
0286     ci->fsm.a_wait_vrise_tmout = 1;
0287     return 0;
0288 }
0289 
0290 static int a_wait_vfall_tmout(struct ci_hdrc *ci)
0291 {
0292     ci->fsm.a_wait_vfall_tmout = 1;
0293     return 0;
0294 }
0295 
0296 static int a_wait_bcon_tmout(struct ci_hdrc *ci)
0297 {
0298     ci->fsm.a_wait_bcon_tmout = 1;
0299     return 0;
0300 }
0301 
0302 static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
0303 {
0304     ci->fsm.a_aidl_bdis_tmout = 1;
0305     return 0;
0306 }
0307 
0308 static int b_ase0_brst_tmout(struct ci_hdrc *ci)
0309 {
0310     ci->fsm.b_ase0_brst_tmout = 1;
0311     return 0;
0312 }
0313 
0314 static int a_bidl_adis_tmout(struct ci_hdrc *ci)
0315 {
0316     ci->fsm.a_bidl_adis_tmout = 1;
0317     return 0;
0318 }
0319 
0320 static int b_aidl_bdis_tmout(struct ci_hdrc *ci)
0321 {
0322     ci->fsm.a_bus_suspend = 1;
0323     return 0;
0324 }
0325 
0326 static int b_se0_srp_tmout(struct ci_hdrc *ci)
0327 {
0328     ci->fsm.b_se0_srp = 1;
0329     return 0;
0330 }
0331 
0332 static int b_srp_fail_tmout(struct ci_hdrc *ci)
0333 {
0334     ci->fsm.b_srp_done = 1;
0335     return 1;
0336 }
0337 
0338 static int b_data_pls_tmout(struct ci_hdrc *ci)
0339 {
0340     ci->fsm.b_srp_done = 1;
0341     ci->fsm.b_bus_req = 0;
0342     if (ci->fsm.power_up)
0343         ci->fsm.power_up = 0;
0344     hw_write_otgsc(ci, OTGSC_HABA, 0);
0345     pm_runtime_put(ci->dev);
0346     return 0;
0347 }
0348 
0349 static int b_ssend_srp_tmout(struct ci_hdrc *ci)
0350 {
0351     ci->fsm.b_ssend_srp = 1;
0352     /* only vbus fall below B_sess_vld in b_idle state */
0353     if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
0354         return 0;
0355     else
0356         return 1;
0357 }
0358 
0359 /*
0360  * Keep this list in the same order as timers indexed
0361  * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
0362  */
0363 static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
0364     a_wait_vrise_tmout, /* A_WAIT_VRISE */
0365     a_wait_vfall_tmout, /* A_WAIT_VFALL */
0366     a_wait_bcon_tmout,  /* A_WAIT_BCON */
0367     a_aidl_bdis_tmout,  /* A_AIDL_BDIS */
0368     b_ase0_brst_tmout,  /* B_ASE0_BRST */
0369     a_bidl_adis_tmout,  /* A_BIDL_ADIS */
0370     b_aidl_bdis_tmout,  /* B_AIDL_BDIS */
0371     b_se0_srp_tmout,    /* B_SE0_SRP */
0372     b_srp_fail_tmout,   /* B_SRP_FAIL */
0373     NULL,           /* A_WAIT_ENUM */
0374     b_data_pls_tmout,   /* B_DATA_PLS */
0375     b_ssend_srp_tmout,  /* B_SSEND_SRP */
0376 };
0377 
0378 /*
0379  * Enable the next nearest enabled timer if have
0380  */
0381 static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
0382 {
0383     struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
0384     ktime_t now, *timeout;
0385     unsigned long   enabled_timer_bits;
0386     unsigned long   flags;
0387     enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
0388     int ret = -EINVAL;
0389 
0390     spin_lock_irqsave(&ci->lock, flags);
0391     enabled_timer_bits = ci->enabled_otg_timer_bits;
0392     ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
0393 
0394     now = ktime_get();
0395     for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
0396         if (ktime_compare(now, ci->hr_timeouts[cur_timer]) >= 0) {
0397             ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
0398             if (otg_timer_handlers[cur_timer])
0399                 ret = otg_timer_handlers[cur_timer](ci);
0400         } else {
0401             if ((next_timer == NUM_OTG_FSM_TIMERS) ||
0402                 ktime_before(ci->hr_timeouts[cur_timer],
0403                     ci->hr_timeouts[next_timer]))
0404                 next_timer = cur_timer;
0405         }
0406     }
0407     /* Enable the next nearest timer */
0408     if (next_timer < NUM_OTG_FSM_TIMERS) {
0409         timeout = &ci->hr_timeouts[next_timer];
0410         hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
0411                     NSEC_PER_MSEC, HRTIMER_MODE_ABS);
0412         ci->next_otg_timer = next_timer;
0413     }
0414     spin_unlock_irqrestore(&ci->lock, flags);
0415 
0416     if (!ret)
0417         ci_otg_queue_work(ci);
0418 
0419     return HRTIMER_NORESTART;
0420 }
0421 
0422 /* Initialize timers */
0423 static int ci_otg_init_timers(struct ci_hdrc *ci)
0424 {
0425     hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
0426     ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
0427 
0428     return 0;
0429 }
0430 
0431 /* -------------------------------------------------------------*/
0432 /* Operations that will be called from OTG Finite State Machine */
0433 /* -------------------------------------------------------------*/
0434 static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
0435 {
0436     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0437 
0438     if (t < NUM_OTG_FSM_TIMERS)
0439         ci_otg_add_timer(ci, t);
0440     return;
0441 }
0442 
0443 static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
0444 {
0445     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0446 
0447     if (t < NUM_OTG_FSM_TIMERS)
0448         ci_otg_del_timer(ci, t);
0449     return;
0450 }
0451 
0452 /*
0453  * A-device drive vbus: turn on vbus regulator and enable port power
0454  * Data pulse irq should be disabled while vbus is on.
0455  */
0456 static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
0457 {
0458     int ret;
0459     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0460 
0461     if (on) {
0462         /* Enable power */
0463         hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
0464                             PORTSC_PP);
0465         if (ci->platdata->reg_vbus) {
0466             ret = regulator_enable(ci->platdata->reg_vbus);
0467             if (ret) {
0468                 dev_err(ci->dev,
0469                 "Failed to enable vbus regulator, ret=%d\n",
0470                 ret);
0471                 return;
0472             }
0473         }
0474         /* Disable data pulse irq */
0475         hw_write_otgsc(ci, OTGSC_DPIE, 0);
0476 
0477         fsm->a_srp_det = 0;
0478         fsm->power_up = 0;
0479     } else {
0480         if (ci->platdata->reg_vbus)
0481             regulator_disable(ci->platdata->reg_vbus);
0482 
0483         fsm->a_bus_drop = 1;
0484         fsm->a_bus_req = 0;
0485     }
0486 }
0487 
0488 /*
0489  * Control data line by Run Stop bit.
0490  */
0491 static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
0492 {
0493     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0494 
0495     if (on)
0496         hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
0497     else
0498         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
0499 }
0500 
0501 /*
0502  * Generate SOF by host.
0503  * In host mode, controller will automatically send SOF.
0504  * Suspend will block the data on the port.
0505  *
0506  * This is controlled through usbcore by usb autosuspend,
0507  * so the usb device class driver need support autosuspend,
0508  * otherwise the bus suspend will not happen.
0509  */
0510 static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
0511 {
0512     struct usb_device *udev;
0513 
0514     if (!fsm->otg->host)
0515         return;
0516 
0517     udev = usb_hub_find_child(fsm->otg->host->root_hub, 1);
0518     if (!udev)
0519         return;
0520 
0521     if (on) {
0522         usb_disable_autosuspend(udev);
0523     } else {
0524         pm_runtime_set_autosuspend_delay(&udev->dev, 0);
0525         usb_enable_autosuspend(udev);
0526     }
0527 }
0528 
0529 /*
0530  * Start SRP pulsing by data-line pulsing,
0531  * no v-bus pulsing followed
0532  */
0533 static void ci_otg_start_pulse(struct otg_fsm *fsm)
0534 {
0535     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0536 
0537     /* Hardware Assistant Data pulse */
0538     hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
0539 
0540     pm_runtime_get(ci->dev);
0541     ci_otg_add_timer(ci, B_DATA_PLS);
0542 }
0543 
0544 static int ci_otg_start_host(struct otg_fsm *fsm, int on)
0545 {
0546     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0547 
0548     if (on) {
0549         ci_role_stop(ci);
0550         ci_role_start(ci, CI_ROLE_HOST);
0551     } else {
0552         ci_role_stop(ci);
0553         ci_role_start(ci, CI_ROLE_GADGET);
0554     }
0555     return 0;
0556 }
0557 
0558 static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
0559 {
0560     struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
0561 
0562     if (on)
0563         usb_gadget_vbus_connect(&ci->gadget);
0564     else
0565         usb_gadget_vbus_disconnect(&ci->gadget);
0566 
0567     return 0;
0568 }
0569 
0570 static struct otg_fsm_ops ci_otg_ops = {
0571     .drv_vbus = ci_otg_drv_vbus,
0572     .loc_conn = ci_otg_loc_conn,
0573     .loc_sof = ci_otg_loc_sof,
0574     .start_pulse = ci_otg_start_pulse,
0575     .add_timer = ci_otg_fsm_add_timer,
0576     .del_timer = ci_otg_fsm_del_timer,
0577     .start_host = ci_otg_start_host,
0578     .start_gadget = ci_otg_start_gadget,
0579 };
0580 
0581 int ci_otg_fsm_work(struct ci_hdrc *ci)
0582 {
0583     /*
0584      * Don't do fsm transition for B device
0585      * when there is no gadget class driver
0586      */
0587     if (ci->fsm.id && !(ci->driver) &&
0588         ci->fsm.otg->state < OTG_STATE_A_IDLE)
0589         return 0;
0590 
0591     pm_runtime_get_sync(ci->dev);
0592     if (otg_statemachine(&ci->fsm)) {
0593         if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
0594             /*
0595              * Further state change for cases:
0596              * a_idle to b_idle; or
0597              * a_idle to a_wait_vrise due to ID change(1->0), so
0598              * B-dev becomes A-dev can try to start new session
0599              * consequently; or
0600              * a_idle to a_wait_vrise when power up
0601              */
0602             if ((ci->fsm.id) || (ci->id_event) ||
0603                         (ci->fsm.power_up)) {
0604                 ci_otg_queue_work(ci);
0605             } else {
0606                 /* Enable data pulse irq */
0607                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
0608                                 PORTSC_PP, 0);
0609                 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
0610                 hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
0611             }
0612             if (ci->id_event)
0613                 ci->id_event = false;
0614         } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
0615             if (ci->fsm.b_sess_vld) {
0616                 ci->fsm.power_up = 0;
0617                 /*
0618                  * Further transite to b_periphearl state
0619                  * when register gadget driver with vbus on
0620                  */
0621                 ci_otg_queue_work(ci);
0622             }
0623         } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) {
0624             pm_runtime_mark_last_busy(ci->dev);
0625             pm_runtime_put_autosuspend(ci->dev);
0626             return 0;
0627         }
0628     }
0629     pm_runtime_put_sync(ci->dev);
0630     return 0;
0631 }
0632 
0633 /*
0634  * Update fsm variables in each state if catching expected interrupts,
0635  * called by otg fsm isr.
0636  */
0637 static void ci_otg_fsm_event(struct ci_hdrc *ci)
0638 {
0639     u32 intr_sts, otg_bsess_vld, port_conn;
0640     struct otg_fsm *fsm = &ci->fsm;
0641 
0642     intr_sts = hw_read_intr_status(ci);
0643     otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
0644     port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
0645 
0646     switch (ci->fsm.otg->state) {
0647     case OTG_STATE_A_WAIT_BCON:
0648         if (port_conn) {
0649             fsm->b_conn = 1;
0650             fsm->a_bus_req = 1;
0651             ci_otg_queue_work(ci);
0652         }
0653         break;
0654     case OTG_STATE_B_IDLE:
0655         if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
0656             fsm->b_sess_vld = 1;
0657             ci_otg_queue_work(ci);
0658         }
0659         break;
0660     case OTG_STATE_B_PERIPHERAL:
0661         if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
0662             ci_otg_add_timer(ci, B_AIDL_BDIS);
0663         } else if (intr_sts & USBi_PCI) {
0664             ci_otg_del_timer(ci, B_AIDL_BDIS);
0665             if (fsm->a_bus_suspend == 1)
0666                 fsm->a_bus_suspend = 0;
0667         }
0668         break;
0669     case OTG_STATE_B_HOST:
0670         if ((intr_sts & USBi_PCI) && !port_conn) {
0671             fsm->a_conn = 0;
0672             fsm->b_bus_req = 0;
0673             ci_otg_queue_work(ci);
0674         }
0675         break;
0676     case OTG_STATE_A_PERIPHERAL:
0677         if (intr_sts & USBi_SLI) {
0678              fsm->b_bus_suspend = 1;
0679             /*
0680              * Init a timer to know how long this suspend
0681              * will continue, if time out, indicates B no longer
0682              * wants to be host role
0683              */
0684              ci_otg_add_timer(ci, A_BIDL_ADIS);
0685         }
0686 
0687         if (intr_sts & USBi_URI)
0688             ci_otg_del_timer(ci, A_BIDL_ADIS);
0689 
0690         if (intr_sts & USBi_PCI) {
0691             if (fsm->b_bus_suspend == 1) {
0692                 ci_otg_del_timer(ci, A_BIDL_ADIS);
0693                 fsm->b_bus_suspend = 0;
0694             }
0695         }
0696         break;
0697     case OTG_STATE_A_SUSPEND:
0698         if ((intr_sts & USBi_PCI) && !port_conn) {
0699             fsm->b_conn = 0;
0700 
0701             /* if gadget driver is binded */
0702             if (ci->driver) {
0703                 /* A device to be peripheral mode */
0704                 ci->gadget.is_a_peripheral = 1;
0705             }
0706             ci_otg_queue_work(ci);
0707         }
0708         break;
0709     case OTG_STATE_A_HOST:
0710         if ((intr_sts & USBi_PCI) && !port_conn) {
0711             fsm->b_conn = 0;
0712             ci_otg_queue_work(ci);
0713         }
0714         break;
0715     case OTG_STATE_B_WAIT_ACON:
0716         if ((intr_sts & USBi_PCI) && port_conn) {
0717             fsm->a_conn = 1;
0718             ci_otg_queue_work(ci);
0719         }
0720         break;
0721     default:
0722         break;
0723     }
0724 }
0725 
0726 /*
0727  * ci_otg_irq - otg fsm related irq handling
0728  * and also update otg fsm variable by monitoring usb host and udc
0729  * state change interrupts.
0730  * @ci: ci_hdrc
0731  */
0732 irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
0733 {
0734     irqreturn_t retval =  IRQ_NONE;
0735     u32 otgsc, otg_int_src = 0;
0736     struct otg_fsm *fsm = &ci->fsm;
0737 
0738     otgsc = hw_read_otgsc(ci, ~0);
0739     otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
0740     fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
0741 
0742     if (otg_int_src) {
0743         if (otg_int_src & OTGSC_DPIS) {
0744             hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
0745             fsm->a_srp_det = 1;
0746             fsm->a_bus_drop = 0;
0747         } else if (otg_int_src & OTGSC_IDIS) {
0748             hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
0749             if (fsm->id == 0) {
0750                 fsm->a_bus_drop = 0;
0751                 fsm->a_bus_req = 1;
0752                 ci->id_event = true;
0753             }
0754         } else if (otg_int_src & OTGSC_BSVIS) {
0755             hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
0756             if (otgsc & OTGSC_BSV) {
0757                 fsm->b_sess_vld = 1;
0758                 ci_otg_del_timer(ci, B_SSEND_SRP);
0759                 ci_otg_del_timer(ci, B_SRP_FAIL);
0760                 fsm->b_ssend_srp = 0;
0761             } else {
0762                 fsm->b_sess_vld = 0;
0763                 if (fsm->id)
0764                     ci_otg_add_timer(ci, B_SSEND_SRP);
0765             }
0766         } else if (otg_int_src & OTGSC_AVVIS) {
0767             hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
0768             if (otgsc & OTGSC_AVV) {
0769                 fsm->a_vbus_vld = 1;
0770             } else {
0771                 fsm->a_vbus_vld = 0;
0772                 fsm->b_conn = 0;
0773             }
0774         }
0775         ci_otg_queue_work(ci);
0776         return IRQ_HANDLED;
0777     }
0778 
0779     ci_otg_fsm_event(ci);
0780 
0781     return retval;
0782 }
0783 
0784 void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
0785 {
0786     ci_otg_queue_work(ci);
0787 }
0788 
0789 int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
0790 {
0791     int retval = 0;
0792 
0793     if (ci->phy)
0794         ci->otg.phy = ci->phy;
0795     else
0796         ci->otg.usb_phy = ci->usb_phy;
0797 
0798     ci->otg.gadget = &ci->gadget;
0799     ci->fsm.otg = &ci->otg;
0800     ci->fsm.power_up = 1;
0801     ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
0802     ci->fsm.otg->state = OTG_STATE_UNDEFINED;
0803     ci->fsm.ops = &ci_otg_ops;
0804     ci->gadget.hnp_polling_support = 1;
0805     ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL);
0806     if (!ci->fsm.host_req_flag)
0807         return -ENOMEM;
0808 
0809     mutex_init(&ci->fsm.lock);
0810 
0811     retval = ci_otg_init_timers(ci);
0812     if (retval) {
0813         dev_err(ci->dev, "Couldn't init OTG timers\n");
0814         return retval;
0815     }
0816     ci->enabled_otg_timer_bits = 0;
0817     ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
0818 
0819     retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
0820     if (retval < 0) {
0821         dev_dbg(ci->dev,
0822             "Can't register sysfs attr group: %d\n", retval);
0823         return retval;
0824     }
0825 
0826     /* Enable A vbus valid irq */
0827     hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
0828 
0829     if (ci->fsm.id) {
0830         ci->fsm.b_ssend_srp =
0831             hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
0832         ci->fsm.b_sess_vld =
0833             hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
0834         /* Enable BSV irq */
0835         hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
0836     }
0837 
0838     return 0;
0839 }
0840 
0841 void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
0842 {
0843     sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group);
0844 }
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