usb/chipidea/host.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * host.c - ChipIdea USB host controller driver
0004  *
0005  * Copyright (c) 2012 Intel Corporation
0006  *
0007  * Author: Alexander Shishkin
0008  */
0009
0010 #include <linux/kernel.h>
0011 #include <linux/io.h>
0012 #include <linux/usb.h>
0013 #include <linux/usb/hcd.h>
0014 #include <linux/usb/chipidea.h>
0015 #include <linux/regulator/consumer.h>
0016 #include <linux/pinctrl/consumer.h>
0017
0018 #include "../host/ehci.h"
0019
0020 #include "ci.h"
0021 #include "bits.h"
0022 #include "host.h"
0023
0024 static struct hc_driver __read_mostly ci_ehci_hc_driver;
0025 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
0026
0027 struct ehci_ci_priv {
0028     struct regulator *reg_vbus;
0029     bool enabled;
0030 };
0031
0032 struct ci_hdrc_dma_aligned_buffer {
0033     void *kmalloc_ptr;
0034     void *old_xfer_buffer;
0035     u8 data[];
0036 };
0037
0038 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
0039 {
0040     struct ehci_hcd *ehci = hcd_to_ehci(hcd);
0041     struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
0042     struct device *dev = hcd->self.controller;
0043     struct ci_hdrc *ci = dev_get_drvdata(dev);
0044     int ret = 0;
0045     int port = HCS_N_PORTS(ehci->hcs_params);
0046
0047     if (priv->reg_vbus && enable != priv->enabled) {
0048         if (port > 1) {
0049             dev_warn(dev,
0050                 "Not support multi-port regulator control\n");
0051             return 0;
0052         }
0053         if (enable)
0054             ret = regulator_enable(priv->reg_vbus);
0055         else
0056             ret = regulator_disable(priv->reg_vbus);
0057         if (ret) {
0058             dev_err(dev,
0059                 "Failed to %s vbus regulator, ret=%d\n",
0060                 enable ? "enable" : "disable", ret);
0061             return ret;
0062         }
0063         priv->enabled = enable;
0064     }
0065
0066     if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
0067         /*
0068          * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
0069          * As HSIC is always HS, this should be safe for others.
0070          */
0071         hw_port_test_set(ci, 5);
0072         hw_port_test_set(ci, 0);
0073     }
0074     return 0;
0075 };
0076
0077 static int ehci_ci_reset(struct usb_hcd *hcd)
0078 {
0079     struct device *dev = hcd->self.controller;
0080     struct ci_hdrc *ci = dev_get_drvdata(dev);
0081     struct ehci_hcd *ehci = hcd_to_ehci(hcd);
0082     int ret;
0083
0084     ret = ehci_setup(hcd);
0085     if (ret)
0086         return ret;
0087
0088     ehci->need_io_watchdog = 0;
0089
0090     if (ci->platdata->notify_event) {
0091         ret = ci->platdata->notify_event(ci,
0092                 CI_HDRC_CONTROLLER_RESET_EVENT);
0093         if (ret)
0094             return ret;
0095     }
0096
0097     ci_platform_configure(ci);
0098
0099     return ret;
0100 }
0101
0102 static const struct ehci_driver_overrides ehci_ci_overrides = {
0103     .extra_priv_size = sizeof(struct ehci_ci_priv),
0104     .port_power  = ehci_ci_portpower,
0105     .reset       = ehci_ci_reset,
0106 };
0107
0108 static irqreturn_t host_irq(struct ci_hdrc *ci)
0109 {
0110     return usb_hcd_irq(ci->irq, ci->hcd);
0111 }
0112
0113 static int host_start(struct ci_hdrc *ci)
0114 {
0115     struct usb_hcd *hcd;
0116     struct ehci_hcd *ehci;
0117     struct ehci_ci_priv *priv;
0118     int ret;
0119
0120     if (usb_disabled())
0121         return -ENODEV;
0122
0123     hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
0124                    ci->dev, dev_name(ci->dev), NULL);
0125     if (!hcd)
0126         return -ENOMEM;
0127
0128     dev_set_drvdata(ci->dev, ci);
0129     hcd->rsrc_start = ci->hw_bank.phys;
0130     hcd->rsrc_len = ci->hw_bank.size;
0131     hcd->regs = ci->hw_bank.abs;
0132     hcd->has_tt = 1;
0133
0134     hcd->power_budget = ci->platdata->power_budget;
0135     hcd->tpl_support = ci->platdata->tpl_support;
0136     if (ci->phy || ci->usb_phy) {
0137         hcd->skip_phy_initialization = 1;
0138         if (ci->usb_phy)
0139             hcd->usb_phy = ci->usb_phy;
0140     }
0141
0142     ehci = hcd_to_ehci(hcd);
0143     ehci->caps = ci->hw_bank.cap;
0144     ehci->has_hostpc = ci->hw_bank.lpm;
0145     ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
0146     ehci->imx28_write_fix = ci->imx28_write_fix;
0147
0148     priv = (struct ehci_ci_priv *)ehci->priv;
0149     priv->reg_vbus = NULL;
0150
0151     if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
0152         if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
0153             ret = regulator_enable(ci->platdata->reg_vbus);
0154             if (ret) {
0155                 dev_err(ci->dev,
0156                 "Failed to enable vbus regulator, ret=%d\n",
0157                                     ret);
0158                 goto put_hcd;
0159             }
0160         } else {
0161             priv->reg_vbus = ci->platdata->reg_vbus;
0162         }
0163     }
0164
0165     if (ci->platdata->pins_host)
0166         pinctrl_select_state(ci->platdata->pctl,
0167                      ci->platdata->pins_host);
0168
0169     ci->hcd = hcd;
0170
0171     ret = usb_add_hcd(hcd, 0, 0);
0172     if (ret) {
0173         ci->hcd = NULL;
0174         goto disable_reg;
0175     } else {
0176         struct usb_otg *otg = &ci->otg;
0177
0178         if (ci_otg_is_fsm_mode(ci)) {
0179             otg->host = &hcd->self;
0180             hcd->self.otg_port = 1;
0181         }
0182
0183         if (ci->platdata->notify_event &&
0184             (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
0185             ci->platdata->notify_event
0186                 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
0187     }
0188
0189     return ret;
0190
0191 disable_reg:
0192     if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
0193             (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
0194         regulator_disable(ci->platdata->reg_vbus);
0195 put_hcd:
0196     usb_put_hcd(hcd);
0197
0198     return ret;
0199 }
0200
0201 static void host_stop(struct ci_hdrc *ci)
0202 {
0203     struct usb_hcd *hcd = ci->hcd;
0204
0205     if (hcd) {
0206         if (ci->platdata->notify_event)
0207             ci->platdata->notify_event(ci,
0208                 CI_HDRC_CONTROLLER_STOPPED_EVENT);
0209         usb_remove_hcd(hcd);
0210         ci->role = CI_ROLE_END;
0211         synchronize_irq(ci->irq);
0212         usb_put_hcd(hcd);
0213         if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
0214             (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
0215                 regulator_disable(ci->platdata->reg_vbus);
0216     }
0217     ci->hcd = NULL;
0218     ci->otg.host = NULL;
0219
0220     if (ci->platdata->pins_host && ci->platdata->pins_default)
0221         pinctrl_select_state(ci->platdata->pctl,
0222                      ci->platdata->pins_default);
0223 }
0224
0225
0226 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
0227 {
0228     if (ci->role == CI_ROLE_HOST && ci->hcd)
0229         host_stop(ci);
0230 }
0231
0232 /* The below code is based on tegra ehci driver */
0233 static int ci_ehci_hub_control(
0234     struct usb_hcd  *hcd,
0235     u16     typeReq,
0236     u16     wValue,
0237     u16     wIndex,
0238     char        *buf,
0239     u16     wLength
0240 )
0241 {
0242     struct ehci_hcd *ehci = hcd_to_ehci(hcd);
0243     unsigned int    ports = HCS_N_PORTS(ehci->hcs_params);
0244     u32 __iomem *status_reg;
0245     u32     temp, port_index;
0246     unsigned long   flags;
0247     int     retval = 0;
0248     bool        done = false;
0249     struct device *dev = hcd->self.controller;
0250     struct ci_hdrc *ci = dev_get_drvdata(dev);
0251
0252     port_index = wIndex & 0xff;
0253     port_index -= (port_index > 0);
0254     status_reg = &ehci->regs->port_status[port_index];
0255
0256     spin_lock_irqsave(&ehci->lock, flags);
0257
0258     if (ci->platdata->hub_control) {
0259         retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
0260                            buf, wLength, &done, &flags);
0261         if (done)
0262             goto done;
0263     }
0264
0265     if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
0266         if (!wIndex || wIndex > ports) {
0267             retval = -EPIPE;
0268             goto done;
0269         }
0270
0271         temp = ehci_readl(ehci, status_reg);
0272         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
0273             retval = -EPIPE;
0274             goto done;
0275         }
0276
0277         temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
0278         temp |= PORT_WKDISC_E | PORT_WKOC_E;
0279         ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
0280
0281         /*
0282          * If a transaction is in progress, there may be a delay in
0283          * suspending the port. Poll until the port is suspended.
0284          */
0285         if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
0286             PORT_SUSPEND, 5000))
0287             ehci_err(ehci, "timeout waiting for SUSPEND\n");
0288
0289         if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
0290             if (ci->platdata->notify_event)
0291                 ci->platdata->notify_event(ci,
0292                     CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
0293
0294             temp = ehci_readl(ehci, status_reg);
0295             temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
0296             ehci_writel(ehci, temp, status_reg);
0297         }
0298
0299         set_bit(port_index, &ehci->suspended_ports);
0300         goto done;
0301     }
0302
0303     /*
0304      * After resume has finished, it needs do some post resume
0305      * operation for some SoCs.
0306      */
0307     else if (typeReq == ClearPortFeature &&
0308         wValue == USB_PORT_FEAT_C_SUSPEND) {
0309         /* Make sure the resume has finished, it should be finished */
0310         if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
0311             ehci_err(ehci, "timeout waiting for resume\n");
0312     }
0313
0314     spin_unlock_irqrestore(&ehci->lock, flags);
0315
0316     /* Handle the hub control events here */
0317     return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
0318 done:
0319     spin_unlock_irqrestore(&ehci->lock, flags);
0320     return retval;
0321 }
0322 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
0323 {
0324     struct ehci_hcd *ehci = hcd_to_ehci(hcd);
0325     struct device *dev = hcd->self.controller;
0326     struct ci_hdrc *ci = dev_get_drvdata(dev);
0327     int port;
0328     u32 tmp;
0329
0330     int ret = orig_bus_suspend(hcd);
0331
0332     if (ret)
0333         return ret;
0334
0335     port = HCS_N_PORTS(ehci->hcs_params);
0336     while (port--) {
0337         u32 __iomem *reg = &ehci->regs->port_status[port];
0338         u32 portsc = ehci_readl(ehci, reg);
0339
0340         if (portsc & PORT_CONNECT) {
0341             /*
0342              * For chipidea, the resume signal will be ended
0343              * automatically, so for remote wakeup case, the
0344              * usbcmd.rs may not be set before the resume has
0345              * ended if other resume paths consumes too much
0346              * time (~24ms), in that case, the SOF will not
0347              * send out within 3ms after resume ends, then the
0348              * high speed device will enter full speed mode.
0349              */
0350
0351             tmp = ehci_readl(ehci, &ehci->regs->command);
0352             tmp |= CMD_RUN;
0353             ehci_writel(ehci, tmp, &ehci->regs->command);
0354             /*
0355              * It needs a short delay between set RS bit and PHCD.
0356              */
0357             usleep_range(150, 200);
0358             /*
0359              * Need to clear WKCN and WKOC for imx HSIC,
0360              * otherwise, there will be wakeup event.
0361              */
0362             if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
0363                 tmp = ehci_readl(ehci, reg);
0364                 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
0365                 ehci_writel(ehci, tmp, reg);
0366             }
0367
0368             break;
0369         }
0370     }
0371
0372     return 0;
0373 }
0374
0375 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb)
0376 {
0377     struct ci_hdrc_dma_aligned_buffer *temp;
0378     size_t length;
0379
0380     if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
0381         return;
0382
0383     temp = container_of(urb->transfer_buffer,
0384                 struct ci_hdrc_dma_aligned_buffer, data);
0385
0386     if (usb_urb_dir_in(urb)) {
0387         if (usb_pipeisoc(urb->pipe))
0388             length = urb->transfer_buffer_length;
0389         else
0390             length = urb->actual_length;
0391
0392         memcpy(temp->old_xfer_buffer, temp->data, length);
0393     }
0394     urb->transfer_buffer = temp->old_xfer_buffer;
0395     kfree(temp->kmalloc_ptr);
0396
0397     urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
0398 }
0399
0400 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
0401 {
0402     struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr;
0403     const unsigned int ci_hdrc_usb_dma_align = 32;
0404     size_t kmalloc_size;
0405
0406     if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 ||
0407         !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1)))
0408         return 0;
0409
0410     /* Allocate a buffer with enough padding for alignment */
0411     kmalloc_size = urb->transfer_buffer_length +
0412                sizeof(struct ci_hdrc_dma_aligned_buffer) +
0413                ci_hdrc_usb_dma_align - 1;
0414
0415     kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
0416     if (!kmalloc_ptr)
0417         return -ENOMEM;
0418
0419     /* Position our struct dma_aligned_buffer such that data is aligned */
0420     temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1;
0421     temp->kmalloc_ptr = kmalloc_ptr;
0422     temp->old_xfer_buffer = urb->transfer_buffer;
0423     if (usb_urb_dir_out(urb))
0424         memcpy(temp->data, urb->transfer_buffer,
0425                urb->transfer_buffer_length);
0426     urb->transfer_buffer = temp->data;
0427
0428     urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
0429
0430     return 0;
0431 }
0432
0433 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
0434                    gfp_t mem_flags)
0435 {
0436     int ret;
0437
0438     ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
0439     if (ret)
0440         return ret;
0441
0442     ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
0443     if (ret)
0444         ci_hdrc_free_dma_aligned_buffer(urb);
0445
0446     return ret;
0447 }
0448
0449 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
0450 {
0451     usb_hcd_unmap_urb_for_dma(hcd, urb);
0452     ci_hdrc_free_dma_aligned_buffer(urb);
0453 }
0454
0455 int ci_hdrc_host_init(struct ci_hdrc *ci)
0456 {
0457     struct ci_role_driver *rdrv;
0458
0459     if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
0460         return -ENXIO;
0461
0462     rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
0463     if (!rdrv)
0464         return -ENOMEM;
0465
0466     rdrv->start = host_start;
0467     rdrv->stop  = host_stop;
0468     rdrv->irq   = host_irq;
0469     rdrv->name  = "host";
0470     ci->roles[CI_ROLE_HOST] = rdrv;
0471
0472     if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
0473         ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
0474         ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
0475     }
0476
0477     return 0;
0478 }
0479
0480 void ci_hdrc_host_driver_init(void)
0481 {
0482     ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
0483     orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
0484     ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
0485     ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
0486 }