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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * core.c - ChipIdea USB IP core family device controller
0004  *
0005  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
0006  * Copyright (C) 2020 NXP
0007  *
0008  * Author: David Lopo
0009  *     Peter Chen <peter.chen@nxp.com>
0010  *
0011  * Main Features:
0012  * - Four transfers are supported, usbtest is passed
0013  * - USB Certification for gadget: CH9 and Mass Storage are passed
0014  * - Low power mode
0015  * - USB wakeup
0016  */
0017 #include <linux/delay.h>
0018 #include <linux/device.h>
0019 #include <linux/dma-mapping.h>
0020 #include <linux/extcon.h>
0021 #include <linux/phy/phy.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/module.h>
0024 #include <linux/idr.h>
0025 #include <linux/interrupt.h>
0026 #include <linux/io.h>
0027 #include <linux/kernel.h>
0028 #include <linux/slab.h>
0029 #include <linux/pm_runtime.h>
0030 #include <linux/pinctrl/consumer.h>
0031 #include <linux/usb/ch9.h>
0032 #include <linux/usb/gadget.h>
0033 #include <linux/usb/otg.h>
0034 #include <linux/usb/chipidea.h>
0035 #include <linux/usb/of.h>
0036 #include <linux/of.h>
0037 #include <linux/regulator/consumer.h>
0038 #include <linux/usb/ehci_def.h>
0039 
0040 #include "ci.h"
0041 #include "udc.h"
0042 #include "bits.h"
0043 #include "host.h"
0044 #include "otg.h"
0045 #include "otg_fsm.h"
0046 
0047 /* Controller register map */
0048 static const u8 ci_regs_nolpm[] = {
0049     [CAP_CAPLENGTH]     = 0x00U,
0050     [CAP_HCCPARAMS]     = 0x08U,
0051     [CAP_DCCPARAMS]     = 0x24U,
0052     [CAP_TESTMODE]      = 0x38U,
0053     [OP_USBCMD]     = 0x00U,
0054     [OP_USBSTS]     = 0x04U,
0055     [OP_USBINTR]        = 0x08U,
0056     [OP_FRINDEX]        = 0x0CU,
0057     [OP_DEVICEADDR]     = 0x14U,
0058     [OP_ENDPTLISTADDR]  = 0x18U,
0059     [OP_TTCTRL]     = 0x1CU,
0060     [OP_BURSTSIZE]      = 0x20U,
0061     [OP_ULPI_VIEWPORT]  = 0x30U,
0062     [OP_PORTSC]     = 0x44U,
0063     [OP_DEVLC]      = 0x84U,
0064     [OP_OTGSC]      = 0x64U,
0065     [OP_USBMODE]        = 0x68U,
0066     [OP_ENDPTSETUPSTAT] = 0x6CU,
0067     [OP_ENDPTPRIME]     = 0x70U,
0068     [OP_ENDPTFLUSH]     = 0x74U,
0069     [OP_ENDPTSTAT]      = 0x78U,
0070     [OP_ENDPTCOMPLETE]  = 0x7CU,
0071     [OP_ENDPTCTRL]      = 0x80U,
0072 };
0073 
0074 static const u8 ci_regs_lpm[] = {
0075     [CAP_CAPLENGTH]     = 0x00U,
0076     [CAP_HCCPARAMS]     = 0x08U,
0077     [CAP_DCCPARAMS]     = 0x24U,
0078     [CAP_TESTMODE]      = 0xFCU,
0079     [OP_USBCMD]     = 0x00U,
0080     [OP_USBSTS]     = 0x04U,
0081     [OP_USBINTR]        = 0x08U,
0082     [OP_FRINDEX]        = 0x0CU,
0083     [OP_DEVICEADDR]     = 0x14U,
0084     [OP_ENDPTLISTADDR]  = 0x18U,
0085     [OP_TTCTRL]     = 0x1CU,
0086     [OP_BURSTSIZE]      = 0x20U,
0087     [OP_ULPI_VIEWPORT]  = 0x30U,
0088     [OP_PORTSC]     = 0x44U,
0089     [OP_DEVLC]      = 0x84U,
0090     [OP_OTGSC]      = 0xC4U,
0091     [OP_USBMODE]        = 0xC8U,
0092     [OP_ENDPTSETUPSTAT] = 0xD8U,
0093     [OP_ENDPTPRIME]     = 0xDCU,
0094     [OP_ENDPTFLUSH]     = 0xE0U,
0095     [OP_ENDPTSTAT]      = 0xE4U,
0096     [OP_ENDPTCOMPLETE]  = 0xE8U,
0097     [OP_ENDPTCTRL]      = 0xECU,
0098 };
0099 
0100 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
0101 {
0102     int i;
0103 
0104     for (i = 0; i < OP_ENDPTCTRL; i++)
0105         ci->hw_bank.regmap[i] =
0106             (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
0107             (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
0108 
0109     for (; i <= OP_LAST; i++)
0110         ci->hw_bank.regmap[i] = ci->hw_bank.op +
0111             4 * (i - OP_ENDPTCTRL) +
0112             (is_lpm
0113              ? ci_regs_lpm[OP_ENDPTCTRL]
0114              : ci_regs_nolpm[OP_ENDPTCTRL]);
0115 
0116 }
0117 
0118 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
0119 {
0120     int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
0121     enum ci_revision rev = CI_REVISION_UNKNOWN;
0122 
0123     if (ver == 0x2) {
0124         rev = hw_read_id_reg(ci, ID_ID, REVISION)
0125             >> __ffs(REVISION);
0126         rev += CI_REVISION_20;
0127     } else if (ver == 0x0) {
0128         rev = CI_REVISION_1X;
0129     }
0130 
0131     return rev;
0132 }
0133 
0134 /**
0135  * hw_read_intr_enable: returns interrupt enable register
0136  *
0137  * @ci: the controller
0138  *
0139  * This function returns register data
0140  */
0141 u32 hw_read_intr_enable(struct ci_hdrc *ci)
0142 {
0143     return hw_read(ci, OP_USBINTR, ~0);
0144 }
0145 
0146 /**
0147  * hw_read_intr_status: returns interrupt status register
0148  *
0149  * @ci: the controller
0150  *
0151  * This function returns register data
0152  */
0153 u32 hw_read_intr_status(struct ci_hdrc *ci)
0154 {
0155     return hw_read(ci, OP_USBSTS, ~0);
0156 }
0157 
0158 /**
0159  * hw_port_test_set: writes port test mode (execute without interruption)
0160  * @ci: the controller
0161  * @mode: new value
0162  *
0163  * This function returns an error code
0164  */
0165 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
0166 {
0167     const u8 TEST_MODE_MAX = 7;
0168 
0169     if (mode > TEST_MODE_MAX)
0170         return -EINVAL;
0171 
0172     hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
0173     return 0;
0174 }
0175 
0176 /**
0177  * hw_port_test_get: reads port test mode value
0178  *
0179  * @ci: the controller
0180  *
0181  * This function returns port test mode value
0182  */
0183 u8 hw_port_test_get(struct ci_hdrc *ci)
0184 {
0185     return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
0186 }
0187 
0188 static void hw_wait_phy_stable(void)
0189 {
0190     /*
0191      * The phy needs some delay to output the stable status from low
0192      * power mode. And for OTGSC, the status inputs are debounced
0193      * using a 1 ms time constant, so, delay 2ms for controller to get
0194      * the stable status, like vbus and id when the phy leaves low power.
0195      */
0196     usleep_range(2000, 2500);
0197 }
0198 
0199 /* The PHY enters/leaves low power mode */
0200 static void ci_hdrc_enter_lpm_common(struct ci_hdrc *ci, bool enable)
0201 {
0202     enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
0203     bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
0204 
0205     if (enable && !lpm)
0206         hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
0207                 PORTSC_PHCD(ci->hw_bank.lpm));
0208     else if (!enable && lpm)
0209         hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
0210                 0);
0211 }
0212 
0213 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
0214 {
0215     return ci->platdata->enter_lpm(ci, enable);
0216 }
0217 
0218 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
0219 {
0220     u32 reg;
0221 
0222     /* bank is a module variable */
0223     ci->hw_bank.abs = base;
0224 
0225     ci->hw_bank.cap = ci->hw_bank.abs;
0226     ci->hw_bank.cap += ci->platdata->capoffset;
0227     ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
0228 
0229     hw_alloc_regmap(ci, false);
0230     reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
0231         __ffs(HCCPARAMS_LEN);
0232     ci->hw_bank.lpm  = reg;
0233     if (reg)
0234         hw_alloc_regmap(ci, !!reg);
0235     ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
0236     ci->hw_bank.size += OP_LAST;
0237     ci->hw_bank.size /= sizeof(u32);
0238 
0239     reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
0240         __ffs(DCCPARAMS_DEN);
0241     ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
0242 
0243     if (ci->hw_ep_max > ENDPT_MAX)
0244         return -ENODEV;
0245 
0246     ci_hdrc_enter_lpm(ci, false);
0247 
0248     /* Disable all interrupts bits */
0249     hw_write(ci, OP_USBINTR, 0xffffffff, 0);
0250 
0251     /* Clear all interrupts status bits*/
0252     hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
0253 
0254     ci->rev = ci_get_revision(ci);
0255 
0256     dev_dbg(ci->dev,
0257         "revision: %d, lpm: %d; cap: %px op: %px\n",
0258         ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
0259 
0260     /* setup lock mode ? */
0261 
0262     /* ENDPTSETUPSTAT is '0' by default */
0263 
0264     /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
0265 
0266     return 0;
0267 }
0268 
0269 void hw_phymode_configure(struct ci_hdrc *ci)
0270 {
0271     u32 portsc, lpm, sts = 0;
0272 
0273     switch (ci->platdata->phy_mode) {
0274     case USBPHY_INTERFACE_MODE_UTMI:
0275         portsc = PORTSC_PTS(PTS_UTMI);
0276         lpm = DEVLC_PTS(PTS_UTMI);
0277         break;
0278     case USBPHY_INTERFACE_MODE_UTMIW:
0279         portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
0280         lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
0281         break;
0282     case USBPHY_INTERFACE_MODE_ULPI:
0283         portsc = PORTSC_PTS(PTS_ULPI);
0284         lpm = DEVLC_PTS(PTS_ULPI);
0285         break;
0286     case USBPHY_INTERFACE_MODE_SERIAL:
0287         portsc = PORTSC_PTS(PTS_SERIAL);
0288         lpm = DEVLC_PTS(PTS_SERIAL);
0289         sts = 1;
0290         break;
0291     case USBPHY_INTERFACE_MODE_HSIC:
0292         portsc = PORTSC_PTS(PTS_HSIC);
0293         lpm = DEVLC_PTS(PTS_HSIC);
0294         break;
0295     default:
0296         return;
0297     }
0298 
0299     if (ci->hw_bank.lpm) {
0300         hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
0301         if (sts)
0302             hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
0303     } else {
0304         hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
0305         if (sts)
0306             hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
0307     }
0308 }
0309 EXPORT_SYMBOL_GPL(hw_phymode_configure);
0310 
0311 /**
0312  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
0313  * interfaces
0314  * @ci: the controller
0315  *
0316  * This function returns an error code if the phy failed to init
0317  */
0318 static int _ci_usb_phy_init(struct ci_hdrc *ci)
0319 {
0320     int ret;
0321 
0322     if (ci->phy) {
0323         ret = phy_init(ci->phy);
0324         if (ret)
0325             return ret;
0326 
0327         ret = phy_power_on(ci->phy);
0328         if (ret) {
0329             phy_exit(ci->phy);
0330             return ret;
0331         }
0332     } else {
0333         ret = usb_phy_init(ci->usb_phy);
0334     }
0335 
0336     return ret;
0337 }
0338 
0339 /**
0340  * ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
0341  * interfaces
0342  * @ci: the controller
0343  */
0344 static void ci_usb_phy_exit(struct ci_hdrc *ci)
0345 {
0346     if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
0347         return;
0348 
0349     if (ci->phy) {
0350         phy_power_off(ci->phy);
0351         phy_exit(ci->phy);
0352     } else {
0353         usb_phy_shutdown(ci->usb_phy);
0354     }
0355 }
0356 
0357 /**
0358  * ci_usb_phy_init: initialize phy according to different phy type
0359  * @ci: the controller
0360  *
0361  * This function returns an error code if usb_phy_init has failed
0362  */
0363 static int ci_usb_phy_init(struct ci_hdrc *ci)
0364 {
0365     int ret;
0366 
0367     if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
0368         return 0;
0369 
0370     switch (ci->platdata->phy_mode) {
0371     case USBPHY_INTERFACE_MODE_UTMI:
0372     case USBPHY_INTERFACE_MODE_UTMIW:
0373     case USBPHY_INTERFACE_MODE_HSIC:
0374         ret = _ci_usb_phy_init(ci);
0375         if (!ret)
0376             hw_wait_phy_stable();
0377         else
0378             return ret;
0379         hw_phymode_configure(ci);
0380         break;
0381     case USBPHY_INTERFACE_MODE_ULPI:
0382     case USBPHY_INTERFACE_MODE_SERIAL:
0383         hw_phymode_configure(ci);
0384         ret = _ci_usb_phy_init(ci);
0385         if (ret)
0386             return ret;
0387         break;
0388     default:
0389         ret = _ci_usb_phy_init(ci);
0390         if (!ret)
0391             hw_wait_phy_stable();
0392     }
0393 
0394     return ret;
0395 }
0396 
0397 
0398 /**
0399  * ci_platform_configure: do controller configure
0400  * @ci: the controller
0401  *
0402  */
0403 void ci_platform_configure(struct ci_hdrc *ci)
0404 {
0405     bool is_device_mode, is_host_mode;
0406 
0407     is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
0408     is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
0409 
0410     if (is_device_mode) {
0411         phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
0412 
0413         if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
0414             hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
0415                  USBMODE_CI_SDIS);
0416     }
0417 
0418     if (is_host_mode) {
0419         phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
0420 
0421         if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
0422             hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
0423                  USBMODE_CI_SDIS);
0424     }
0425 
0426     if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
0427         if (ci->hw_bank.lpm)
0428             hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
0429         else
0430             hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
0431     }
0432 
0433     if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
0434         hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
0435 
0436     hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
0437 
0438     if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
0439         hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
0440             ci->platdata->ahb_burst_config);
0441 
0442     /* override burst size, take effect only when ahb_burst_config is 0 */
0443     if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
0444         if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
0445             hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
0446             ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
0447 
0448         if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
0449             hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
0450                 ci->platdata->rx_burst_size);
0451     }
0452 }
0453 
0454 /**
0455  * hw_controller_reset: do controller reset
0456  * @ci: the controller
0457   *
0458  * This function returns an error code
0459  */
0460 static int hw_controller_reset(struct ci_hdrc *ci)
0461 {
0462     int count = 0;
0463 
0464     hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
0465     while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
0466         udelay(10);
0467         if (count++ > 1000)
0468             return -ETIMEDOUT;
0469     }
0470 
0471     return 0;
0472 }
0473 
0474 /**
0475  * hw_device_reset: resets chip (execute without interruption)
0476  * @ci: the controller
0477  *
0478  * This function returns an error code
0479  */
0480 int hw_device_reset(struct ci_hdrc *ci)
0481 {
0482     int ret;
0483 
0484     /* should flush & stop before reset */
0485     hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
0486     hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
0487 
0488     ret = hw_controller_reset(ci);
0489     if (ret) {
0490         dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
0491         return ret;
0492     }
0493 
0494     if (ci->platdata->notify_event) {
0495         ret = ci->platdata->notify_event(ci,
0496             CI_HDRC_CONTROLLER_RESET_EVENT);
0497         if (ret)
0498             return ret;
0499     }
0500 
0501     /* USBMODE should be configured step by step */
0502     hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
0503     hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
0504     /* HW >= 2.3 */
0505     hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
0506 
0507     if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
0508         dev_err(ci->dev, "cannot enter in %s device mode\n",
0509             ci_role(ci)->name);
0510         dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
0511         return -ENODEV;
0512     }
0513 
0514     ci_platform_configure(ci);
0515 
0516     return 0;
0517 }
0518 
0519 static irqreturn_t ci_irq_handler(int irq, void *data)
0520 {
0521     struct ci_hdrc *ci = data;
0522     irqreturn_t ret = IRQ_NONE;
0523     u32 otgsc = 0;
0524 
0525     if (ci->in_lpm) {
0526         disable_irq_nosync(irq);
0527         ci->wakeup_int = true;
0528         pm_runtime_get(ci->dev);
0529         return IRQ_HANDLED;
0530     }
0531 
0532     if (ci->is_otg) {
0533         otgsc = hw_read_otgsc(ci, ~0);
0534         if (ci_otg_is_fsm_mode(ci)) {
0535             ret = ci_otg_fsm_irq(ci);
0536             if (ret == IRQ_HANDLED)
0537                 return ret;
0538         }
0539     }
0540 
0541     /*
0542      * Handle id change interrupt, it indicates device/host function
0543      * switch.
0544      */
0545     if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
0546         ci->id_event = true;
0547         /* Clear ID change irq status */
0548         hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
0549         ci_otg_queue_work(ci);
0550         return IRQ_HANDLED;
0551     }
0552 
0553     /*
0554      * Handle vbus change interrupt, it indicates device connection
0555      * and disconnection events.
0556      */
0557     if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
0558         ci->b_sess_valid_event = true;
0559         /* Clear BSV irq */
0560         hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
0561         ci_otg_queue_work(ci);
0562         return IRQ_HANDLED;
0563     }
0564 
0565     /* Handle device/host interrupt */
0566     if (ci->role != CI_ROLE_END)
0567         ret = ci_role(ci)->irq(ci);
0568 
0569     return ret;
0570 }
0571 
0572 static void ci_irq(struct ci_hdrc *ci)
0573 {
0574     unsigned long flags;
0575 
0576     local_irq_save(flags);
0577     ci_irq_handler(ci->irq, ci);
0578     local_irq_restore(flags);
0579 }
0580 
0581 static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
0582                  void *ptr)
0583 {
0584     struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
0585     struct ci_hdrc *ci = cbl->ci;
0586 
0587     cbl->connected = event;
0588     cbl->changed = true;
0589 
0590     ci_irq(ci);
0591     return NOTIFY_DONE;
0592 }
0593 
0594 static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw)
0595 {
0596     struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
0597     enum usb_role role;
0598     unsigned long flags;
0599 
0600     spin_lock_irqsave(&ci->lock, flags);
0601     role = ci_role_to_usb_role(ci);
0602     spin_unlock_irqrestore(&ci->lock, flags);
0603 
0604     return role;
0605 }
0606 
0607 static int ci_usb_role_switch_set(struct usb_role_switch *sw,
0608                   enum usb_role role)
0609 {
0610     struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
0611     struct ci_hdrc_cable *cable = NULL;
0612     enum usb_role current_role = ci_role_to_usb_role(ci);
0613     enum ci_role ci_role = usb_role_to_ci_role(role);
0614     unsigned long flags;
0615 
0616     if ((ci_role != CI_ROLE_END && !ci->roles[ci_role]) ||
0617         (current_role == role))
0618         return 0;
0619 
0620     pm_runtime_get_sync(ci->dev);
0621     /* Stop current role */
0622     spin_lock_irqsave(&ci->lock, flags);
0623     if (current_role == USB_ROLE_DEVICE)
0624         cable = &ci->platdata->vbus_extcon;
0625     else if (current_role == USB_ROLE_HOST)
0626         cable = &ci->platdata->id_extcon;
0627 
0628     if (cable) {
0629         cable->changed = true;
0630         cable->connected = false;
0631         ci_irq(ci);
0632         spin_unlock_irqrestore(&ci->lock, flags);
0633         if (ci->wq && role != USB_ROLE_NONE)
0634             flush_workqueue(ci->wq);
0635         spin_lock_irqsave(&ci->lock, flags);
0636     }
0637 
0638     cable = NULL;
0639 
0640     /* Start target role */
0641     if (role == USB_ROLE_DEVICE)
0642         cable = &ci->platdata->vbus_extcon;
0643     else if (role == USB_ROLE_HOST)
0644         cable = &ci->platdata->id_extcon;
0645 
0646     if (cable) {
0647         cable->changed = true;
0648         cable->connected = true;
0649         ci_irq(ci);
0650     }
0651     spin_unlock_irqrestore(&ci->lock, flags);
0652     pm_runtime_put_sync(ci->dev);
0653 
0654     return 0;
0655 }
0656 
0657 static struct usb_role_switch_desc ci_role_switch = {
0658     .set = ci_usb_role_switch_set,
0659     .get = ci_usb_role_switch_get,
0660     .allow_userspace_control = true,
0661 };
0662 
0663 static int ci_get_platdata(struct device *dev,
0664         struct ci_hdrc_platform_data *platdata)
0665 {
0666     struct extcon_dev *ext_vbus, *ext_id;
0667     struct ci_hdrc_cable *cable;
0668     int ret;
0669 
0670     if (!platdata->phy_mode)
0671         platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
0672 
0673     if (!platdata->dr_mode)
0674         platdata->dr_mode = usb_get_dr_mode(dev);
0675 
0676     if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
0677         platdata->dr_mode = USB_DR_MODE_OTG;
0678 
0679     if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
0680         /* Get the vbus regulator */
0681         platdata->reg_vbus = devm_regulator_get_optional(dev, "vbus");
0682         if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
0683             return -EPROBE_DEFER;
0684         } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
0685             /* no vbus regulator is needed */
0686             platdata->reg_vbus = NULL;
0687         } else if (IS_ERR(platdata->reg_vbus)) {
0688             dev_err(dev, "Getting regulator error: %ld\n",
0689                 PTR_ERR(platdata->reg_vbus));
0690             return PTR_ERR(platdata->reg_vbus);
0691         }
0692         /* Get TPL support */
0693         if (!platdata->tpl_support)
0694             platdata->tpl_support =
0695                 of_usb_host_tpl_support(dev->of_node);
0696     }
0697 
0698     if (platdata->dr_mode == USB_DR_MODE_OTG) {
0699         /* We can support HNP and SRP of OTG 2.0 */
0700         platdata->ci_otg_caps.otg_rev = 0x0200;
0701         platdata->ci_otg_caps.hnp_support = true;
0702         platdata->ci_otg_caps.srp_support = true;
0703 
0704         /* Update otg capabilities by DT properties */
0705         ret = of_usb_update_otg_caps(dev->of_node,
0706                     &platdata->ci_otg_caps);
0707         if (ret)
0708             return ret;
0709     }
0710 
0711     if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
0712         platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
0713 
0714     of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
0715                      &platdata->phy_clkgate_delay_us);
0716 
0717     platdata->itc_setting = 1;
0718 
0719     of_property_read_u32(dev->of_node, "itc-setting",
0720                     &platdata->itc_setting);
0721 
0722     ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
0723                 &platdata->ahb_burst_config);
0724     if (!ret) {
0725         platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
0726     } else if (ret != -EINVAL) {
0727         dev_err(dev, "failed to get ahb-burst-config\n");
0728         return ret;
0729     }
0730 
0731     ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
0732                 &platdata->tx_burst_size);
0733     if (!ret) {
0734         platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
0735     } else if (ret != -EINVAL) {
0736         dev_err(dev, "failed to get tx-burst-size-dword\n");
0737         return ret;
0738     }
0739 
0740     ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
0741                 &platdata->rx_burst_size);
0742     if (!ret) {
0743         platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
0744     } else if (ret != -EINVAL) {
0745         dev_err(dev, "failed to get rx-burst-size-dword\n");
0746         return ret;
0747     }
0748 
0749     if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
0750         platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
0751 
0752     ext_id = ERR_PTR(-ENODEV);
0753     ext_vbus = ERR_PTR(-ENODEV);
0754     if (of_property_read_bool(dev->of_node, "extcon")) {
0755         /* Each one of them is not mandatory */
0756         ext_vbus = extcon_get_edev_by_phandle(dev, 0);
0757         if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
0758             return PTR_ERR(ext_vbus);
0759 
0760         ext_id = extcon_get_edev_by_phandle(dev, 1);
0761         if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
0762             return PTR_ERR(ext_id);
0763     }
0764 
0765     cable = &platdata->vbus_extcon;
0766     cable->nb.notifier_call = ci_cable_notifier;
0767     cable->edev = ext_vbus;
0768 
0769     if (!IS_ERR(ext_vbus)) {
0770         ret = extcon_get_state(cable->edev, EXTCON_USB);
0771         if (ret)
0772             cable->connected = true;
0773         else
0774             cable->connected = false;
0775     }
0776 
0777     cable = &platdata->id_extcon;
0778     cable->nb.notifier_call = ci_cable_notifier;
0779     cable->edev = ext_id;
0780 
0781     if (!IS_ERR(ext_id)) {
0782         ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
0783         if (ret)
0784             cable->connected = true;
0785         else
0786             cable->connected = false;
0787     }
0788 
0789     if (device_property_read_bool(dev, "usb-role-switch"))
0790         ci_role_switch.fwnode = dev->fwnode;
0791 
0792     platdata->pctl = devm_pinctrl_get(dev);
0793     if (!IS_ERR(platdata->pctl)) {
0794         struct pinctrl_state *p;
0795 
0796         p = pinctrl_lookup_state(platdata->pctl, "default");
0797         if (!IS_ERR(p))
0798             platdata->pins_default = p;
0799 
0800         p = pinctrl_lookup_state(platdata->pctl, "host");
0801         if (!IS_ERR(p))
0802             platdata->pins_host = p;
0803 
0804         p = pinctrl_lookup_state(platdata->pctl, "device");
0805         if (!IS_ERR(p))
0806             platdata->pins_device = p;
0807     }
0808 
0809     if (!platdata->enter_lpm)
0810         platdata->enter_lpm = ci_hdrc_enter_lpm_common;
0811 
0812     return 0;
0813 }
0814 
0815 static int ci_extcon_register(struct ci_hdrc *ci)
0816 {
0817     struct ci_hdrc_cable *id, *vbus;
0818     int ret;
0819 
0820     id = &ci->platdata->id_extcon;
0821     id->ci = ci;
0822     if (!IS_ERR_OR_NULL(id->edev)) {
0823         ret = devm_extcon_register_notifier(ci->dev, id->edev,
0824                         EXTCON_USB_HOST, &id->nb);
0825         if (ret < 0) {
0826             dev_err(ci->dev, "register ID failed\n");
0827             return ret;
0828         }
0829     }
0830 
0831     vbus = &ci->platdata->vbus_extcon;
0832     vbus->ci = ci;
0833     if (!IS_ERR_OR_NULL(vbus->edev)) {
0834         ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
0835                         EXTCON_USB, &vbus->nb);
0836         if (ret < 0) {
0837             dev_err(ci->dev, "register VBUS failed\n");
0838             return ret;
0839         }
0840     }
0841 
0842     return 0;
0843 }
0844 
0845 static DEFINE_IDA(ci_ida);
0846 
0847 struct platform_device *ci_hdrc_add_device(struct device *dev,
0848             struct resource *res, int nres,
0849             struct ci_hdrc_platform_data *platdata)
0850 {
0851     struct platform_device *pdev;
0852     int id, ret;
0853 
0854     ret = ci_get_platdata(dev, platdata);
0855     if (ret)
0856         return ERR_PTR(ret);
0857 
0858     id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
0859     if (id < 0)
0860         return ERR_PTR(id);
0861 
0862     pdev = platform_device_alloc("ci_hdrc", id);
0863     if (!pdev) {
0864         ret = -ENOMEM;
0865         goto put_id;
0866     }
0867 
0868     pdev->dev.parent = dev;
0869     device_set_of_node_from_dev(&pdev->dev, dev);
0870 
0871     ret = platform_device_add_resources(pdev, res, nres);
0872     if (ret)
0873         goto err;
0874 
0875     ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
0876     if (ret)
0877         goto err;
0878 
0879     ret = platform_device_add(pdev);
0880     if (ret)
0881         goto err;
0882 
0883     return pdev;
0884 
0885 err:
0886     platform_device_put(pdev);
0887 put_id:
0888     ida_simple_remove(&ci_ida, id);
0889     return ERR_PTR(ret);
0890 }
0891 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
0892 
0893 void ci_hdrc_remove_device(struct platform_device *pdev)
0894 {
0895     int id = pdev->id;
0896     platform_device_unregister(pdev);
0897     ida_simple_remove(&ci_ida, id);
0898 }
0899 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
0900 
0901 /**
0902  * ci_hdrc_query_available_role: get runtime available operation mode
0903  *
0904  * The glue layer can get current operation mode (host/peripheral/otg)
0905  * This function should be called after ci core device has created.
0906  *
0907  * @pdev: the platform device of ci core.
0908  *
0909  * Return runtime usb_dr_mode.
0910  */
0911 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev)
0912 {
0913     struct ci_hdrc *ci = platform_get_drvdata(pdev);
0914 
0915     if (!ci)
0916         return USB_DR_MODE_UNKNOWN;
0917     if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])
0918         return USB_DR_MODE_OTG;
0919     else if (ci->roles[CI_ROLE_HOST])
0920         return USB_DR_MODE_HOST;
0921     else if (ci->roles[CI_ROLE_GADGET])
0922         return USB_DR_MODE_PERIPHERAL;
0923     else
0924         return USB_DR_MODE_UNKNOWN;
0925 }
0926 EXPORT_SYMBOL_GPL(ci_hdrc_query_available_role);
0927 
0928 static inline void ci_role_destroy(struct ci_hdrc *ci)
0929 {
0930     ci_hdrc_gadget_destroy(ci);
0931     ci_hdrc_host_destroy(ci);
0932     if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
0933         ci_hdrc_otg_destroy(ci);
0934 }
0935 
0936 static void ci_get_otg_capable(struct ci_hdrc *ci)
0937 {
0938     if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
0939         ci->is_otg = false;
0940     else
0941         ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
0942                 DCCPARAMS_DC | DCCPARAMS_HC)
0943                     == (DCCPARAMS_DC | DCCPARAMS_HC));
0944     if (ci->is_otg) {
0945         dev_dbg(ci->dev, "It is OTG capable controller\n");
0946         /* Disable and clear all OTG irq */
0947         hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
0948                             OTGSC_INT_STATUS_BITS);
0949     }
0950 }
0951 
0952 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
0953               char *buf)
0954 {
0955     struct ci_hdrc *ci = dev_get_drvdata(dev);
0956 
0957     if (ci->role != CI_ROLE_END)
0958         return sprintf(buf, "%s\n", ci_role(ci)->name);
0959 
0960     return 0;
0961 }
0962 
0963 static ssize_t role_store(struct device *dev,
0964         struct device_attribute *attr, const char *buf, size_t n)
0965 {
0966     struct ci_hdrc *ci = dev_get_drvdata(dev);
0967     enum ci_role role;
0968     int ret;
0969 
0970     if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
0971         dev_warn(dev, "Current configuration is not dual-role, quit\n");
0972         return -EPERM;
0973     }
0974 
0975     for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
0976         if (!strncmp(buf, ci->roles[role]->name,
0977                  strlen(ci->roles[role]->name)))
0978             break;
0979 
0980     if (role == CI_ROLE_END || role == ci->role)
0981         return -EINVAL;
0982 
0983     pm_runtime_get_sync(dev);
0984     disable_irq(ci->irq);
0985     ci_role_stop(ci);
0986     ret = ci_role_start(ci, role);
0987     if (!ret && ci->role == CI_ROLE_GADGET)
0988         ci_handle_vbus_change(ci);
0989     enable_irq(ci->irq);
0990     pm_runtime_put_sync(dev);
0991 
0992     return (ret == 0) ? n : ret;
0993 }
0994 static DEVICE_ATTR_RW(role);
0995 
0996 static struct attribute *ci_attrs[] = {
0997     &dev_attr_role.attr,
0998     NULL,
0999 };
1000 ATTRIBUTE_GROUPS(ci);
1001 
1002 static int ci_hdrc_probe(struct platform_device *pdev)
1003 {
1004     struct device   *dev = &pdev->dev;
1005     struct ci_hdrc  *ci;
1006     struct resource *res;
1007     void __iomem    *base;
1008     int     ret;
1009     enum usb_dr_mode dr_mode;
1010 
1011     if (!dev_get_platdata(dev)) {
1012         dev_err(dev, "platform data missing\n");
1013         return -ENODEV;
1014     }
1015 
1016     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1017     base = devm_ioremap_resource(dev, res);
1018     if (IS_ERR(base))
1019         return PTR_ERR(base);
1020 
1021     ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
1022     if (!ci)
1023         return -ENOMEM;
1024 
1025     spin_lock_init(&ci->lock);
1026     ci->dev = dev;
1027     ci->platdata = dev_get_platdata(dev);
1028     ci->imx28_write_fix = !!(ci->platdata->flags &
1029         CI_HDRC_IMX28_WRITE_FIX);
1030     ci->supports_runtime_pm = !!(ci->platdata->flags &
1031         CI_HDRC_SUPPORTS_RUNTIME_PM);
1032     platform_set_drvdata(pdev, ci);
1033 
1034     ret = hw_device_init(ci, base);
1035     if (ret < 0) {
1036         dev_err(dev, "can't initialize hardware\n");
1037         return -ENODEV;
1038     }
1039 
1040     ret = ci_ulpi_init(ci);
1041     if (ret)
1042         return ret;
1043 
1044     if (ci->platdata->phy) {
1045         ci->phy = ci->platdata->phy;
1046     } else if (ci->platdata->usb_phy) {
1047         ci->usb_phy = ci->platdata->usb_phy;
1048     } else {
1049         /* Look for a generic PHY first */
1050         ci->phy = devm_phy_get(dev->parent, "usb-phy");
1051 
1052         if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1053             ret = -EPROBE_DEFER;
1054             goto ulpi_exit;
1055         } else if (IS_ERR(ci->phy)) {
1056             ci->phy = NULL;
1057         }
1058 
1059         /* Look for a legacy USB PHY from device-tree next */
1060         if (!ci->phy) {
1061             ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1062                                   "phys", 0);
1063 
1064             if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1065                 ret = -EPROBE_DEFER;
1066                 goto ulpi_exit;
1067             } else if (IS_ERR(ci->usb_phy)) {
1068                 ci->usb_phy = NULL;
1069             }
1070         }
1071 
1072         /* Look for any registered legacy USB PHY as last resort */
1073         if (!ci->phy && !ci->usb_phy) {
1074             ci->usb_phy = devm_usb_get_phy(dev->parent,
1075                                USB_PHY_TYPE_USB2);
1076 
1077             if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1078                 ret = -EPROBE_DEFER;
1079                 goto ulpi_exit;
1080             } else if (IS_ERR(ci->usb_phy)) {
1081                 ci->usb_phy = NULL;
1082             }
1083         }
1084 
1085         /* No USB PHY was found in the end */
1086         if (!ci->phy && !ci->usb_phy) {
1087             ret = -ENXIO;
1088             goto ulpi_exit;
1089         }
1090     }
1091 
1092     ret = ci_usb_phy_init(ci);
1093     if (ret) {
1094         dev_err(dev, "unable to init phy: %d\n", ret);
1095         return ret;
1096     }
1097 
1098     ci->hw_bank.phys = res->start;
1099 
1100     ci->irq = platform_get_irq(pdev, 0);
1101     if (ci->irq < 0) {
1102         ret = ci->irq;
1103         goto deinit_phy;
1104     }
1105 
1106     ci_get_otg_capable(ci);
1107 
1108     dr_mode = ci->platdata->dr_mode;
1109     /* initialize role(s) before the interrupt is requested */
1110     if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
1111         ret = ci_hdrc_host_init(ci);
1112         if (ret) {
1113             if (ret == -ENXIO)
1114                 dev_info(dev, "doesn't support host\n");
1115             else
1116                 goto deinit_phy;
1117         }
1118     }
1119 
1120     if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
1121         ret = ci_hdrc_gadget_init(ci);
1122         if (ret) {
1123             if (ret == -ENXIO)
1124                 dev_info(dev, "doesn't support gadget\n");
1125             else
1126                 goto deinit_host;
1127         }
1128     }
1129 
1130     if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1131         dev_err(dev, "no supported roles\n");
1132         ret = -ENODEV;
1133         goto deinit_gadget;
1134     }
1135 
1136     if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1137         ret = ci_hdrc_otg_init(ci);
1138         if (ret) {
1139             dev_err(dev, "init otg fails, ret = %d\n", ret);
1140             goto deinit_gadget;
1141         }
1142     }
1143 
1144     if (ci_role_switch.fwnode) {
1145         ci_role_switch.driver_data = ci;
1146         ci->role_switch = usb_role_switch_register(dev,
1147                     &ci_role_switch);
1148         if (IS_ERR(ci->role_switch)) {
1149             ret = PTR_ERR(ci->role_switch);
1150             goto deinit_otg;
1151         }
1152     }
1153 
1154     if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
1155         if (ci->is_otg) {
1156             ci->role = ci_otg_role(ci);
1157             /* Enable ID change irq */
1158             hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
1159         } else {
1160             /*
1161              * If the controller is not OTG capable, but support
1162              * role switch, the defalt role is gadget, and the
1163              * user can switch it through debugfs.
1164              */
1165             ci->role = CI_ROLE_GADGET;
1166         }
1167     } else {
1168         ci->role = ci->roles[CI_ROLE_HOST]
1169             ? CI_ROLE_HOST
1170             : CI_ROLE_GADGET;
1171     }
1172 
1173     if (!ci_otg_is_fsm_mode(ci)) {
1174         /* only update vbus status for peripheral */
1175         if (ci->role == CI_ROLE_GADGET) {
1176             /* Pull down DP for possible charger detection */
1177             hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1178             ci_handle_vbus_change(ci);
1179         }
1180 
1181         ret = ci_role_start(ci, ci->role);
1182         if (ret) {
1183             dev_err(dev, "can't start %s role\n",
1184                         ci_role(ci)->name);
1185             goto stop;
1186         }
1187     }
1188 
1189     ret = devm_request_irq(dev, ci->irq, ci_irq_handler, IRQF_SHARED,
1190             ci->platdata->name, ci);
1191     if (ret)
1192         goto stop;
1193 
1194     ret = ci_extcon_register(ci);
1195     if (ret)
1196         goto stop;
1197 
1198     if (ci->supports_runtime_pm) {
1199         pm_runtime_set_active(&pdev->dev);
1200         pm_runtime_enable(&pdev->dev);
1201         pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1202         pm_runtime_mark_last_busy(ci->dev);
1203         pm_runtime_use_autosuspend(&pdev->dev);
1204     }
1205 
1206     if (ci_otg_is_fsm_mode(ci))
1207         ci_hdrc_otg_fsm_start(ci);
1208 
1209     device_set_wakeup_capable(&pdev->dev, true);
1210     dbg_create_files(ci);
1211 
1212     return 0;
1213 
1214 stop:
1215     if (ci->role_switch)
1216         usb_role_switch_unregister(ci->role_switch);
1217 deinit_otg:
1218     if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1219         ci_hdrc_otg_destroy(ci);
1220 deinit_gadget:
1221     ci_hdrc_gadget_destroy(ci);
1222 deinit_host:
1223     ci_hdrc_host_destroy(ci);
1224 deinit_phy:
1225     ci_usb_phy_exit(ci);
1226 ulpi_exit:
1227     ci_ulpi_exit(ci);
1228 
1229     return ret;
1230 }
1231 
1232 static int ci_hdrc_remove(struct platform_device *pdev)
1233 {
1234     struct ci_hdrc *ci = platform_get_drvdata(pdev);
1235 
1236     if (ci->role_switch)
1237         usb_role_switch_unregister(ci->role_switch);
1238 
1239     if (ci->supports_runtime_pm) {
1240         pm_runtime_get_sync(&pdev->dev);
1241         pm_runtime_disable(&pdev->dev);
1242         pm_runtime_put_noidle(&pdev->dev);
1243     }
1244 
1245     dbg_remove_files(ci);
1246     ci_role_destroy(ci);
1247     ci_hdrc_enter_lpm(ci, true);
1248     ci_usb_phy_exit(ci);
1249     ci_ulpi_exit(ci);
1250 
1251     return 0;
1252 }
1253 
1254 #ifdef CONFIG_PM
1255 /* Prepare wakeup by SRP before suspend */
1256 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1257 {
1258     if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1259                 !hw_read_otgsc(ci, OTGSC_ID)) {
1260         hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1261                                 PORTSC_PP);
1262         hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1263                                 PORTSC_WKCN);
1264     }
1265 }
1266 
1267 /* Handle SRP when wakeup by data pulse */
1268 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1269 {
1270     if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1271         (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1272         if (!hw_read_otgsc(ci, OTGSC_ID)) {
1273             ci->fsm.a_srp_det = 1;
1274             ci->fsm.a_bus_drop = 0;
1275         } else {
1276             ci->fsm.id = 1;
1277         }
1278         ci_otg_queue_work(ci);
1279     }
1280 }
1281 
1282 static void ci_controller_suspend(struct ci_hdrc *ci)
1283 {
1284     disable_irq(ci->irq);
1285     ci_hdrc_enter_lpm(ci, true);
1286     if (ci->platdata->phy_clkgate_delay_us)
1287         usleep_range(ci->platdata->phy_clkgate_delay_us,
1288                  ci->platdata->phy_clkgate_delay_us + 50);
1289     usb_phy_set_suspend(ci->usb_phy, 1);
1290     ci->in_lpm = true;
1291     enable_irq(ci->irq);
1292 }
1293 
1294 /*
1295  * Handle the wakeup interrupt triggered by extcon connector
1296  * We need to call ci_irq again for extcon since the first
1297  * interrupt (wakeup int) only let the controller be out of
1298  * low power mode, but not handle any interrupts.
1299  */
1300 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1301 {
1302     struct ci_hdrc_cable *cable_id, *cable_vbus;
1303     u32 otgsc = hw_read_otgsc(ci, ~0);
1304 
1305     cable_id = &ci->platdata->id_extcon;
1306     cable_vbus = &ci->platdata->vbus_extcon;
1307 
1308     if (!IS_ERR(cable_id->edev) && ci->is_otg &&
1309         (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS))
1310         ci_irq(ci);
1311 
1312     if (!IS_ERR(cable_vbus->edev) && ci->is_otg &&
1313         (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS))
1314         ci_irq(ci);
1315 }
1316 
1317 static int ci_controller_resume(struct device *dev)
1318 {
1319     struct ci_hdrc *ci = dev_get_drvdata(dev);
1320     int ret;
1321 
1322     dev_dbg(dev, "at %s\n", __func__);
1323 
1324     if (!ci->in_lpm) {
1325         WARN_ON(1);
1326         return 0;
1327     }
1328 
1329     ci_hdrc_enter_lpm(ci, false);
1330 
1331     ret = ci_ulpi_resume(ci);
1332     if (ret)
1333         return ret;
1334 
1335     if (ci->usb_phy) {
1336         usb_phy_set_suspend(ci->usb_phy, 0);
1337         usb_phy_set_wakeup(ci->usb_phy, false);
1338         hw_wait_phy_stable();
1339     }
1340 
1341     ci->in_lpm = false;
1342     if (ci->wakeup_int) {
1343         ci->wakeup_int = false;
1344         pm_runtime_mark_last_busy(ci->dev);
1345         pm_runtime_put_autosuspend(ci->dev);
1346         enable_irq(ci->irq);
1347         if (ci_otg_is_fsm_mode(ci))
1348             ci_otg_fsm_wakeup_by_srp(ci);
1349         ci_extcon_wakeup_int(ci);
1350     }
1351 
1352     return 0;
1353 }
1354 
1355 #ifdef CONFIG_PM_SLEEP
1356 static int ci_suspend(struct device *dev)
1357 {
1358     struct ci_hdrc *ci = dev_get_drvdata(dev);
1359 
1360     if (ci->wq)
1361         flush_workqueue(ci->wq);
1362     /*
1363      * Controller needs to be active during suspend, otherwise the core
1364      * may run resume when the parent is at suspend if other driver's
1365      * suspend fails, it occurs before parent's suspend has not started,
1366      * but the core suspend has finished.
1367      */
1368     if (ci->in_lpm)
1369         pm_runtime_resume(dev);
1370 
1371     if (ci->in_lpm) {
1372         WARN_ON(1);
1373         return 0;
1374     }
1375 
1376     if (device_may_wakeup(dev)) {
1377         if (ci_otg_is_fsm_mode(ci))
1378             ci_otg_fsm_suspend_for_srp(ci);
1379 
1380         usb_phy_set_wakeup(ci->usb_phy, true);
1381         enable_irq_wake(ci->irq);
1382     }
1383 
1384     ci_controller_suspend(ci);
1385 
1386     return 0;
1387 }
1388 
1389 static int ci_resume(struct device *dev)
1390 {
1391     struct ci_hdrc *ci = dev_get_drvdata(dev);
1392     int ret;
1393 
1394     if (device_may_wakeup(dev))
1395         disable_irq_wake(ci->irq);
1396 
1397     ret = ci_controller_resume(dev);
1398     if (ret)
1399         return ret;
1400 
1401     if (ci->supports_runtime_pm) {
1402         pm_runtime_disable(dev);
1403         pm_runtime_set_active(dev);
1404         pm_runtime_enable(dev);
1405     }
1406 
1407     return ret;
1408 }
1409 #endif /* CONFIG_PM_SLEEP */
1410 
1411 static int ci_runtime_suspend(struct device *dev)
1412 {
1413     struct ci_hdrc *ci = dev_get_drvdata(dev);
1414 
1415     dev_dbg(dev, "at %s\n", __func__);
1416 
1417     if (ci->in_lpm) {
1418         WARN_ON(1);
1419         return 0;
1420     }
1421 
1422     if (ci_otg_is_fsm_mode(ci))
1423         ci_otg_fsm_suspend_for_srp(ci);
1424 
1425     usb_phy_set_wakeup(ci->usb_phy, true);
1426     ci_controller_suspend(ci);
1427 
1428     return 0;
1429 }
1430 
1431 static int ci_runtime_resume(struct device *dev)
1432 {
1433     return ci_controller_resume(dev);
1434 }
1435 
1436 #endif /* CONFIG_PM */
1437 static const struct dev_pm_ops ci_pm_ops = {
1438     SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1439     SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1440 };
1441 
1442 static struct platform_driver ci_hdrc_driver = {
1443     .probe  = ci_hdrc_probe,
1444     .remove = ci_hdrc_remove,
1445     .driver = {
1446         .name   = "ci_hdrc",
1447         .pm = &ci_pm_ops,
1448         .dev_groups = ci_groups,
1449     },
1450 };
1451 
1452 static int __init ci_hdrc_platform_register(void)
1453 {
1454     ci_hdrc_host_driver_init();
1455     return platform_driver_register(&ci_hdrc_driver);
1456 }
1457 module_init(ci_hdrc_platform_register);
1458 
1459 static void __exit ci_hdrc_platform_unregister(void)
1460 {
1461     platform_driver_unregister(&ci_hdrc_driver);
1462 }
1463 module_exit(ci_hdrc_platform_unregister);
1464 
1465 MODULE_ALIAS("platform:ci_hdrc");
1466 MODULE_LICENSE("GPL v2");
1467 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1468 MODULE_DESCRIPTION("ChipIdea HDRC Driver");
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