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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Cadence USBSS DRD Driver - gadget side.
0004  *
0005  * Copyright (C) 2018-2019 Cadence Design Systems.
0006  * Copyright (C) 2017-2018 NXP
0007  *
0008  * Authors: Pawel Jez <pjez@cadence.com>,
0009  *          Pawel Laszczak <pawell@cadence.com>
0010  *          Peter Chen <peter.chen@nxp.com>
0011  */
0012 
0013 /*
0014  * Work around 1:
0015  * At some situations, the controller may get stale data address in TRB
0016  * at below sequences:
0017  * 1. Controller read TRB includes data address
0018  * 2. Software updates TRBs includes data address and Cycle bit
0019  * 3. Controller read TRB which includes Cycle bit
0020  * 4. DMA run with stale data address
0021  *
0022  * To fix this problem, driver needs to make the first TRB in TD as invalid.
0023  * After preparing all TRBs driver needs to check the position of DMA and
0024  * if the DMA point to the first just added TRB and doorbell is 1,
0025  * then driver must defer making this TRB as valid. This TRB will be make
0026  * as valid during adding next TRB only if DMA is stopped or at TRBERR
0027  * interrupt.
0028  *
0029  * Issue has been fixed in DEV_VER_V3 version of controller.
0030  *
0031  * Work around 2:
0032  * Controller for OUT endpoints has shared on-chip buffers for all incoming
0033  * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
0034  * in correct order. If the first packet in the buffer will not be handled,
0035  * then the following packets directed for other endpoints and  functions
0036  * will be blocked.
0037  * Additionally the packets directed to one endpoint can block entire on-chip
0038  * buffers. In this case transfer to other endpoints also will blocked.
0039  *
0040  * To resolve this issue after raising the descriptor missing interrupt
0041  * driver prepares internal usb_request object and use it to arm DMA transfer.
0042  *
0043  * The problematic situation was observed in case when endpoint has been enabled
0044  * but no usb_request were queued. Driver try detects such endpoints and will
0045  * use this workaround only for these endpoint.
0046  *
0047  * Driver use limited number of buffer. This number can be set by macro
0048  * CDNS3_WA2_NUM_BUFFERS.
0049  *
0050  * Such blocking situation was observed on ACM gadget. For this function
0051  * host send OUT data packet but ACM function is not prepared for this packet.
0052  * It's cause that buffer placed in on chip memory block transfer to other
0053  * endpoints.
0054  *
0055  * Issue has been fixed in DEV_VER_V2 version of controller.
0056  *
0057  */
0058 
0059 #include <linux/dma-mapping.h>
0060 #include <linux/usb/gadget.h>
0061 #include <linux/module.h>
0062 #include <linux/dmapool.h>
0063 #include <linux/iopoll.h>
0064 
0065 #include "core.h"
0066 #include "gadget-export.h"
0067 #include "cdns3-gadget.h"
0068 #include "cdns3-trace.h"
0069 #include "drd.h"
0070 
0071 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
0072                    struct usb_request *request,
0073                    gfp_t gfp_flags);
0074 
0075 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
0076                  struct usb_request *request);
0077 
0078 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
0079                     struct usb_request *request);
0080 
0081 /**
0082  * cdns3_clear_register_bit - clear bit in given register.
0083  * @ptr: address of device controller register to be read and changed
0084  * @mask: bits requested to clar
0085  */
0086 static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
0087 {
0088     mask = readl(ptr) & ~mask;
0089     writel(mask, ptr);
0090 }
0091 
0092 /**
0093  * cdns3_set_register_bit - set bit in given register.
0094  * @ptr: address of device controller register to be read and changed
0095  * @mask: bits requested to set
0096  */
0097 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
0098 {
0099     mask = readl(ptr) | mask;
0100     writel(mask, ptr);
0101 }
0102 
0103 /**
0104  * cdns3_ep_addr_to_index - Macro converts endpoint address to
0105  * index of endpoint object in cdns3_device.eps[] container
0106  * @ep_addr: endpoint address for which endpoint object is required
0107  *
0108  */
0109 u8 cdns3_ep_addr_to_index(u8 ep_addr)
0110 {
0111     return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
0112 }
0113 
0114 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
0115                  struct cdns3_endpoint *priv_ep)
0116 {
0117     int dma_index;
0118 
0119     dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
0120 
0121     return dma_index / TRB_SIZE;
0122 }
0123 
0124 /**
0125  * cdns3_next_request - returns next request from list
0126  * @list: list containing requests
0127  *
0128  * Returns request or NULL if no requests in list
0129  */
0130 struct usb_request *cdns3_next_request(struct list_head *list)
0131 {
0132     return list_first_entry_or_null(list, struct usb_request, list);
0133 }
0134 
0135 /**
0136  * cdns3_next_align_buf - returns next buffer from list
0137  * @list: list containing buffers
0138  *
0139  * Returns buffer or NULL if no buffers in list
0140  */
0141 static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
0142 {
0143     return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
0144 }
0145 
0146 /**
0147  * cdns3_next_priv_request - returns next request from list
0148  * @list: list containing requests
0149  *
0150  * Returns request or NULL if no requests in list
0151  */
0152 static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
0153 {
0154     return list_first_entry_or_null(list, struct cdns3_request, list);
0155 }
0156 
0157 /**
0158  * cdns3_select_ep - selects endpoint
0159  * @priv_dev:  extended gadget object
0160  * @ep: endpoint address
0161  */
0162 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
0163 {
0164     if (priv_dev->selected_ep == ep)
0165         return;
0166 
0167     priv_dev->selected_ep = ep;
0168     writel(ep, &priv_dev->regs->ep_sel);
0169 }
0170 
0171 /**
0172  * cdns3_get_tdl - gets current tdl for selected endpoint.
0173  * @priv_dev:  extended gadget object
0174  *
0175  * Before calling this function the appropriate endpoint must
0176  * be selected by means of cdns3_select_ep function.
0177  */
0178 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
0179 {
0180     if (priv_dev->dev_ver < DEV_VER_V3)
0181         return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
0182     else
0183         return readl(&priv_dev->regs->ep_tdl);
0184 }
0185 
0186 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
0187                  struct cdns3_trb *trb)
0188 {
0189     u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
0190 
0191     return priv_ep->trb_pool_dma + offset;
0192 }
0193 
0194 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
0195 {
0196     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0197 
0198     if (priv_ep->trb_pool) {
0199         dma_pool_free(priv_dev->eps_dma_pool,
0200                   priv_ep->trb_pool, priv_ep->trb_pool_dma);
0201         priv_ep->trb_pool = NULL;
0202     }
0203 }
0204 
0205 /**
0206  * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
0207  * @priv_ep:  endpoint object
0208  *
0209  * Function will return 0 on success or -ENOMEM on allocation error
0210  */
0211 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
0212 {
0213     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0214     int ring_size = TRB_RING_SIZE;
0215     int num_trbs = ring_size / TRB_SIZE;
0216     struct cdns3_trb *link_trb;
0217 
0218     if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
0219         cdns3_free_trb_pool(priv_ep);
0220 
0221     if (!priv_ep->trb_pool) {
0222         priv_ep->trb_pool = dma_pool_alloc(priv_dev->eps_dma_pool,
0223                            GFP_ATOMIC,
0224                            &priv_ep->trb_pool_dma);
0225 
0226         if (!priv_ep->trb_pool)
0227             return -ENOMEM;
0228 
0229         priv_ep->alloc_ring_size = ring_size;
0230     }
0231 
0232     memset(priv_ep->trb_pool, 0, ring_size);
0233 
0234     priv_ep->num_trbs = num_trbs;
0235 
0236     if (!priv_ep->num)
0237         return 0;
0238 
0239     /* Initialize the last TRB as Link TRB */
0240     link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
0241 
0242     if (priv_ep->use_streams) {
0243         /*
0244          * For stream capable endpoints driver use single correct TRB.
0245          * The last trb has zeroed cycle bit
0246          */
0247         link_trb->control = 0;
0248     } else {
0249         link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
0250         link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
0251     }
0252     return 0;
0253 }
0254 
0255 /**
0256  * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
0257  * @priv_ep: endpoint object
0258  *
0259  * Endpoint must be selected before call to this function
0260  */
0261 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
0262 {
0263     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0264     int val;
0265 
0266     trace_cdns3_halt(priv_ep, 1, 1);
0267 
0268     writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
0269            &priv_dev->regs->ep_cmd);
0270 
0271     /* wait for DFLUSH cleared */
0272     readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
0273                   !(val & EP_CMD_DFLUSH), 1, 1000);
0274     priv_ep->flags |= EP_STALLED;
0275     priv_ep->flags &= ~EP_STALL_PENDING;
0276 }
0277 
0278 /**
0279  * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
0280  * @priv_dev: extended gadget object
0281  */
0282 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
0283 {
0284     int i;
0285 
0286     writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
0287 
0288     cdns3_allow_enable_l1(priv_dev, 0);
0289     priv_dev->hw_configured_flag = 0;
0290     priv_dev->onchip_used_size = 0;
0291     priv_dev->out_mem_is_allocated = 0;
0292     priv_dev->wait_for_setup = 0;
0293     priv_dev->using_streams = 0;
0294 
0295     for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
0296         if (priv_dev->eps[i])
0297             priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
0298 }
0299 
0300 /**
0301  * cdns3_ep_inc_trb - increment a trb index.
0302  * @index: Pointer to the TRB index to increment.
0303  * @cs: Cycle state
0304  * @trb_in_seg: number of TRBs in segment
0305  *
0306  * The index should never point to the link TRB. After incrementing,
0307  * if it is point to the link TRB, wrap around to the beginning and revert
0308  * cycle state bit The
0309  * link TRB is always at the last TRB entry.
0310  */
0311 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
0312 {
0313     (*index)++;
0314     if (*index == (trb_in_seg - 1)) {
0315         *index = 0;
0316         *cs ^=  1;
0317     }
0318 }
0319 
0320 /**
0321  * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
0322  * @priv_ep: The endpoint whose enqueue pointer we're incrementing
0323  */
0324 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
0325 {
0326     priv_ep->free_trbs--;
0327     cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
0328 }
0329 
0330 /**
0331  * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
0332  * @priv_ep: The endpoint whose dequeue pointer we're incrementing
0333  */
0334 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
0335 {
0336     priv_ep->free_trbs++;
0337     cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
0338 }
0339 
0340 /**
0341  * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
0342  * @priv_dev: Extended gadget object
0343  * @enable: Enable/disable permit to transition to L1.
0344  *
0345  * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
0346  * then controller answer with ACK handshake.
0347  * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
0348  * then controller answer with NYET handshake.
0349  */
0350 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
0351 {
0352     if (enable)
0353         writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
0354     else
0355         writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
0356 }
0357 
0358 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
0359 {
0360     u32 reg;
0361 
0362     reg = readl(&priv_dev->regs->usb_sts);
0363 
0364     if (DEV_SUPERSPEED(reg))
0365         return USB_SPEED_SUPER;
0366     else if (DEV_HIGHSPEED(reg))
0367         return USB_SPEED_HIGH;
0368     else if (DEV_FULLSPEED(reg))
0369         return USB_SPEED_FULL;
0370     else if (DEV_LOWSPEED(reg))
0371         return USB_SPEED_LOW;
0372     return USB_SPEED_UNKNOWN;
0373 }
0374 
0375 /**
0376  * cdns3_start_all_request - add to ring all request not started
0377  * @priv_dev: Extended gadget object
0378  * @priv_ep: The endpoint for whom request will be started.
0379  *
0380  * Returns return ENOMEM if transfer ring i not enough TRBs to start
0381  *         all requests.
0382  */
0383 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
0384                    struct cdns3_endpoint *priv_ep)
0385 {
0386     struct usb_request *request;
0387     int ret = 0;
0388     u8 pending_empty = list_empty(&priv_ep->pending_req_list);
0389 
0390     /*
0391      * If the last pending transfer is INTERNAL
0392      * OR streams are enabled for this endpoint
0393      * do NOT start new transfer till the last one is pending
0394      */
0395     if (!pending_empty) {
0396         struct cdns3_request *priv_req;
0397 
0398         request = cdns3_next_request(&priv_ep->pending_req_list);
0399         priv_req = to_cdns3_request(request);
0400         if ((priv_req->flags & REQUEST_INTERNAL) ||
0401             (priv_ep->flags & EP_TDLCHK_EN) ||
0402             priv_ep->use_streams) {
0403             dev_dbg(priv_dev->dev, "Blocking external request\n");
0404             return ret;
0405         }
0406     }
0407 
0408     while (!list_empty(&priv_ep->deferred_req_list)) {
0409         request = cdns3_next_request(&priv_ep->deferred_req_list);
0410 
0411         if (!priv_ep->use_streams) {
0412             ret = cdns3_ep_run_transfer(priv_ep, request);
0413         } else {
0414             priv_ep->stream_sg_idx = 0;
0415             ret = cdns3_ep_run_stream_transfer(priv_ep, request);
0416         }
0417         if (ret)
0418             return ret;
0419 
0420         list_move_tail(&request->list, &priv_ep->pending_req_list);
0421         if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
0422             break;
0423     }
0424 
0425     priv_ep->flags &= ~EP_RING_FULL;
0426     return ret;
0427 }
0428 
0429 /*
0430  * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
0431  * driver try to detect whether endpoint need additional internal
0432  * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
0433  * if before first DESCMISS interrupt the DMA will be armed.
0434  */
0435 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
0436     if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
0437         priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
0438         (reg) |= EP_STS_EN_DESCMISEN; \
0439     } } while (0)
0440 
0441 static void __cdns3_descmiss_copy_data(struct usb_request *request,
0442     struct usb_request *descmiss_req)
0443 {
0444     int length = request->actual + descmiss_req->actual;
0445     struct scatterlist *s = request->sg;
0446 
0447     if (!s) {
0448         if (length <= request->length) {
0449             memcpy(&((u8 *)request->buf)[request->actual],
0450                    descmiss_req->buf,
0451                    descmiss_req->actual);
0452             request->actual = length;
0453         } else {
0454             /* It should never occures */
0455             request->status = -ENOMEM;
0456         }
0457     } else {
0458         if (length <= sg_dma_len(s)) {
0459             void *p = phys_to_virt(sg_dma_address(s));
0460 
0461             memcpy(&((u8 *)p)[request->actual],
0462                 descmiss_req->buf,
0463                 descmiss_req->actual);
0464             request->actual = length;
0465         } else {
0466             request->status = -ENOMEM;
0467         }
0468     }
0469 }
0470 
0471 /**
0472  * cdns3_wa2_descmiss_copy_data - copy data from internal requests to
0473  * request queued by class driver.
0474  * @priv_ep: extended endpoint object
0475  * @request: request object
0476  */
0477 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
0478                      struct usb_request *request)
0479 {
0480     struct usb_request *descmiss_req;
0481     struct cdns3_request *descmiss_priv_req;
0482 
0483     while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
0484         int chunk_end;
0485 
0486         descmiss_priv_req =
0487             cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
0488         descmiss_req = &descmiss_priv_req->request;
0489 
0490         /* driver can't touch pending request */
0491         if (descmiss_priv_req->flags & REQUEST_PENDING)
0492             break;
0493 
0494         chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
0495         request->status = descmiss_req->status;
0496         __cdns3_descmiss_copy_data(request, descmiss_req);
0497         list_del_init(&descmiss_priv_req->list);
0498         kfree(descmiss_req->buf);
0499         cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
0500         --priv_ep->wa2_counter;
0501 
0502         if (!chunk_end)
0503             break;
0504     }
0505 }
0506 
0507 static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
0508                              struct cdns3_endpoint *priv_ep,
0509                              struct cdns3_request *priv_req)
0510 {
0511     if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
0512         priv_req->flags & REQUEST_INTERNAL) {
0513         struct usb_request *req;
0514 
0515         req = cdns3_next_request(&priv_ep->deferred_req_list);
0516 
0517         priv_ep->descmis_req = NULL;
0518 
0519         if (!req)
0520             return NULL;
0521 
0522         /* unmap the gadget request before copying data */
0523         usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
0524                         priv_ep->dir);
0525 
0526         cdns3_wa2_descmiss_copy_data(priv_ep, req);
0527         if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
0528             req->length != req->actual) {
0529             /* wait for next part of transfer */
0530             /* re-map the gadget request buffer*/
0531             usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
0532                 usb_endpoint_dir_in(priv_ep->endpoint.desc));
0533             return NULL;
0534         }
0535 
0536         if (req->status == -EINPROGRESS)
0537             req->status = 0;
0538 
0539         list_del_init(&req->list);
0540         cdns3_start_all_request(priv_dev, priv_ep);
0541         return req;
0542     }
0543 
0544     return &priv_req->request;
0545 }
0546 
0547 static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
0548                      struct cdns3_endpoint *priv_ep,
0549                      struct cdns3_request *priv_req)
0550 {
0551     int deferred = 0;
0552 
0553     /*
0554      * If transfer was queued before DESCMISS appear than we
0555      * can disable handling of DESCMISS interrupt. Driver assumes that it
0556      * can disable special treatment for this endpoint.
0557      */
0558     if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
0559         u32 reg;
0560 
0561         cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
0562         priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
0563         reg = readl(&priv_dev->regs->ep_sts_en);
0564         reg &= ~EP_STS_EN_DESCMISEN;
0565         trace_cdns3_wa2(priv_ep, "workaround disabled\n");
0566         writel(reg, &priv_dev->regs->ep_sts_en);
0567     }
0568 
0569     if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
0570         u8 pending_empty = list_empty(&priv_ep->pending_req_list);
0571         u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
0572 
0573         /*
0574          *  DESCMISS transfer has been finished, so data will be
0575          *  directly copied from internal allocated usb_request
0576          *  objects.
0577          */
0578         if (pending_empty && !descmiss_empty &&
0579             !(priv_req->flags & REQUEST_INTERNAL)) {
0580             cdns3_wa2_descmiss_copy_data(priv_ep,
0581                              &priv_req->request);
0582 
0583             trace_cdns3_wa2(priv_ep, "get internal stored data");
0584 
0585             list_add_tail(&priv_req->request.list,
0586                       &priv_ep->pending_req_list);
0587             cdns3_gadget_giveback(priv_ep, priv_req,
0588                           priv_req->request.status);
0589 
0590             /*
0591              * Intentionally driver returns positive value as
0592              * correct value. It informs that transfer has
0593              * been finished.
0594              */
0595             return EINPROGRESS;
0596         }
0597 
0598         /*
0599          * Driver will wait for completion DESCMISS transfer,
0600          * before starts new, not DESCMISS transfer.
0601          */
0602         if (!pending_empty && !descmiss_empty) {
0603             trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
0604             deferred = 1;
0605         }
0606 
0607         if (priv_req->flags & REQUEST_INTERNAL)
0608             list_add_tail(&priv_req->list,
0609                       &priv_ep->wa2_descmiss_req_list);
0610     }
0611 
0612     return deferred;
0613 }
0614 
0615 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
0616 {
0617     struct cdns3_request *priv_req;
0618 
0619     while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
0620         u8 chain;
0621 
0622         priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
0623         chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
0624 
0625         trace_cdns3_wa2(priv_ep, "removes eldest request");
0626 
0627         kfree(priv_req->request.buf);
0628         list_del_init(&priv_req->list);
0629         cdns3_gadget_ep_free_request(&priv_ep->endpoint,
0630                          &priv_req->request);
0631         --priv_ep->wa2_counter;
0632 
0633         if (!chain)
0634             break;
0635     }
0636 }
0637 
0638 /**
0639  * cdns3_wa2_descmissing_packet - handles descriptor missing event.
0640  * @priv_ep: extended gadget object
0641  *
0642  * This function is used only for WA2. For more information see Work around 2
0643  * description.
0644  */
0645 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
0646 {
0647     struct cdns3_request *priv_req;
0648     struct usb_request *request;
0649     u8 pending_empty = list_empty(&priv_ep->pending_req_list);
0650 
0651     /* check for pending transfer */
0652     if (!pending_empty) {
0653         trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
0654         return;
0655     }
0656 
0657     if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
0658         priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
0659         priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
0660     }
0661 
0662     trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
0663 
0664     if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
0665         trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
0666         cdns3_wa2_remove_old_request(priv_ep);
0667     }
0668 
0669     request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
0670                         GFP_ATOMIC);
0671     if (!request)
0672         goto err;
0673 
0674     priv_req = to_cdns3_request(request);
0675     priv_req->flags |= REQUEST_INTERNAL;
0676 
0677     /* if this field is still assigned it indicate that transfer related
0678      * with this request has not been finished yet. Driver in this
0679      * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
0680      * flag to previous one. It will indicate that current request is
0681      * part of the previous one.
0682      */
0683     if (priv_ep->descmis_req)
0684         priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
0685 
0686     priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
0687                     GFP_ATOMIC);
0688     priv_ep->wa2_counter++;
0689 
0690     if (!priv_req->request.buf) {
0691         cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
0692         goto err;
0693     }
0694 
0695     priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
0696     priv_ep->descmis_req = priv_req;
0697 
0698     __cdns3_gadget_ep_queue(&priv_ep->endpoint,
0699                 &priv_ep->descmis_req->request,
0700                 GFP_ATOMIC);
0701 
0702     return;
0703 
0704 err:
0705     dev_err(priv_ep->cdns3_dev->dev,
0706         "Failed: No sufficient memory for DESCMIS\n");
0707 }
0708 
0709 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
0710 {
0711     u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
0712 
0713     if (tdl) {
0714         u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
0715 
0716         writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
0717                &priv_dev->regs->ep_cmd);
0718     }
0719 }
0720 
0721 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
0722 {
0723     u32 ep_sts_reg;
0724 
0725     /* select EP0-out */
0726     cdns3_select_ep(priv_dev, 0);
0727 
0728     ep_sts_reg = readl(&priv_dev->regs->ep_sts);
0729 
0730     if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
0731         u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
0732         struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
0733 
0734         if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
0735             outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
0736             u8 pending_empty = list_empty(&outq_ep->pending_req_list);
0737 
0738             if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
0739                 (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
0740                 !pending_empty) {
0741             } else {
0742                 u32 ep_sts_en_reg;
0743                 u32 ep_cmd_reg;
0744 
0745                 cdns3_select_ep(priv_dev, outq_ep->num |
0746                         outq_ep->dir);
0747                 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
0748                 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
0749 
0750                 outq_ep->flags |= EP_TDLCHK_EN;
0751                 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
0752                                EP_CFG_TDL_CHK);
0753 
0754                 cdns3_wa2_enable_detection(priv_dev, outq_ep,
0755                                ep_sts_en_reg);
0756                 writel(ep_sts_en_reg,
0757                        &priv_dev->regs->ep_sts_en);
0758                 /* reset tdl value to zero */
0759                 cdns3_wa2_reset_tdl(priv_dev);
0760                 /*
0761                  * Memory barrier - Reset tdl before ringing the
0762                  * doorbell.
0763                  */
0764                 wmb();
0765                 if (EP_CMD_DRDY & ep_cmd_reg) {
0766                     trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
0767 
0768                 } else {
0769                     trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
0770                     /*
0771                      * ring doorbell to generate DESCMIS irq
0772                      */
0773                     writel(EP_CMD_DRDY,
0774                            &priv_dev->regs->ep_cmd);
0775                 }
0776             }
0777         }
0778     }
0779 }
0780 
0781 /**
0782  * cdns3_gadget_giveback - call struct usb_request's ->complete callback
0783  * @priv_ep: The endpoint to whom the request belongs to
0784  * @priv_req: The request we're giving back
0785  * @status: completion code for the request
0786  *
0787  * Must be called with controller's lock held and interrupts disabled. This
0788  * function will unmap @req and call its ->complete() callback to notify upper
0789  * layers that it has completed.
0790  */
0791 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
0792                struct cdns3_request *priv_req,
0793                int status)
0794 {
0795     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0796     struct usb_request *request = &priv_req->request;
0797 
0798     list_del_init(&request->list);
0799 
0800     if (request->status == -EINPROGRESS)
0801         request->status = status;
0802 
0803     usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
0804                     priv_ep->dir);
0805 
0806     if ((priv_req->flags & REQUEST_UNALIGNED) &&
0807         priv_ep->dir == USB_DIR_OUT && !request->status) {
0808         /* Make DMA buffer CPU accessible */
0809         dma_sync_single_for_cpu(priv_dev->sysdev,
0810             priv_req->aligned_buf->dma,
0811             priv_req->aligned_buf->size,
0812             priv_req->aligned_buf->dir);
0813         memcpy(request->buf, priv_req->aligned_buf->buf,
0814                request->length);
0815     }
0816 
0817     priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
0818     /* All TRBs have finished, clear the counter */
0819     priv_req->finished_trb = 0;
0820     trace_cdns3_gadget_giveback(priv_req);
0821 
0822     if (priv_dev->dev_ver < DEV_VER_V2) {
0823         request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
0824                             priv_req);
0825         if (!request)
0826             return;
0827     }
0828 
0829     if (request->complete) {
0830         spin_unlock(&priv_dev->lock);
0831         usb_gadget_giveback_request(&priv_ep->endpoint,
0832                         request);
0833         spin_lock(&priv_dev->lock);
0834     }
0835 
0836     if (request->buf == priv_dev->zlp_buf)
0837         cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
0838 }
0839 
0840 static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
0841 {
0842     /* Work around for stale data address in TRB*/
0843     if (priv_ep->wa1_set) {
0844         trace_cdns3_wa1(priv_ep, "restore cycle bit");
0845 
0846         priv_ep->wa1_set = 0;
0847         priv_ep->wa1_trb_index = 0xFFFF;
0848         if (priv_ep->wa1_cycle_bit) {
0849             priv_ep->wa1_trb->control =
0850                 priv_ep->wa1_trb->control | cpu_to_le32(0x1);
0851         } else {
0852             priv_ep->wa1_trb->control =
0853                 priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
0854         }
0855     }
0856 }
0857 
0858 static void cdns3_free_aligned_request_buf(struct work_struct *work)
0859 {
0860     struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
0861                     aligned_buf_wq);
0862     struct cdns3_aligned_buf *buf, *tmp;
0863     unsigned long flags;
0864 
0865     spin_lock_irqsave(&priv_dev->lock, flags);
0866 
0867     list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
0868         if (!buf->in_use) {
0869             list_del(&buf->list);
0870 
0871             /*
0872              * Re-enable interrupts to free DMA capable memory.
0873              * Driver can't free this memory with disabled
0874              * interrupts.
0875              */
0876             spin_unlock_irqrestore(&priv_dev->lock, flags);
0877             dma_free_noncoherent(priv_dev->sysdev, buf->size,
0878                       buf->buf, buf->dma, buf->dir);
0879             kfree(buf);
0880             spin_lock_irqsave(&priv_dev->lock, flags);
0881         }
0882     }
0883 
0884     spin_unlock_irqrestore(&priv_dev->lock, flags);
0885 }
0886 
0887 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
0888 {
0889     struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
0890     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0891     struct cdns3_aligned_buf *buf;
0892 
0893     /* check if buffer is aligned to 8. */
0894     if (!((uintptr_t)priv_req->request.buf & 0x7))
0895         return 0;
0896 
0897     buf = priv_req->aligned_buf;
0898 
0899     if (!buf || priv_req->request.length > buf->size) {
0900         buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
0901         if (!buf)
0902             return -ENOMEM;
0903 
0904         buf->size = priv_req->request.length;
0905         buf->dir = usb_endpoint_dir_in(priv_ep->endpoint.desc) ?
0906             DMA_TO_DEVICE : DMA_FROM_DEVICE;
0907 
0908         buf->buf = dma_alloc_noncoherent(priv_dev->sysdev,
0909                           buf->size,
0910                           &buf->dma,
0911                           buf->dir,
0912                           GFP_ATOMIC);
0913         if (!buf->buf) {
0914             kfree(buf);
0915             return -ENOMEM;
0916         }
0917 
0918         if (priv_req->aligned_buf) {
0919             trace_cdns3_free_aligned_request(priv_req);
0920             priv_req->aligned_buf->in_use = 0;
0921             queue_work(system_freezable_wq,
0922                    &priv_dev->aligned_buf_wq);
0923         }
0924 
0925         buf->in_use = 1;
0926         priv_req->aligned_buf = buf;
0927 
0928         list_add_tail(&buf->list,
0929                   &priv_dev->aligned_buf_list);
0930     }
0931 
0932     if (priv_ep->dir == USB_DIR_IN) {
0933         /* Make DMA buffer CPU accessible */
0934         dma_sync_single_for_cpu(priv_dev->sysdev,
0935             buf->dma, buf->size, buf->dir);
0936         memcpy(buf->buf, priv_req->request.buf,
0937                priv_req->request.length);
0938     }
0939 
0940     /* Transfer DMA buffer ownership back to device */
0941     dma_sync_single_for_device(priv_dev->sysdev,
0942             buf->dma, buf->size, buf->dir);
0943 
0944     priv_req->flags |= REQUEST_UNALIGNED;
0945     trace_cdns3_prepare_aligned_request(priv_req);
0946 
0947     return 0;
0948 }
0949 
0950 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
0951                   struct cdns3_trb *trb)
0952 {
0953     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0954 
0955     if (!priv_ep->wa1_set) {
0956         u32 doorbell;
0957 
0958         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
0959 
0960         if (doorbell) {
0961             priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
0962             priv_ep->wa1_set = 1;
0963             priv_ep->wa1_trb = trb;
0964             priv_ep->wa1_trb_index = priv_ep->enqueue;
0965             trace_cdns3_wa1(priv_ep, "set guard");
0966             return 0;
0967         }
0968     }
0969     return 1;
0970 }
0971 
0972 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
0973                          struct cdns3_endpoint *priv_ep)
0974 {
0975     int dma_index;
0976     u32 doorbell;
0977 
0978     doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
0979     dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
0980 
0981     if (!doorbell || dma_index != priv_ep->wa1_trb_index)
0982         cdns3_wa1_restore_cycle_bit(priv_ep);
0983 }
0984 
0985 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
0986                     struct usb_request *request)
0987 {
0988     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
0989     struct cdns3_request *priv_req;
0990     struct cdns3_trb *trb;
0991     dma_addr_t trb_dma;
0992     int address;
0993     u32 control;
0994     u32 length;
0995     u32 tdl;
0996     unsigned int sg_idx = priv_ep->stream_sg_idx;
0997 
0998     priv_req = to_cdns3_request(request);
0999     address = priv_ep->endpoint.desc->bEndpointAddress;
1000 
1001     priv_ep->flags |= EP_PENDING_REQUEST;
1002 
1003     /* must allocate buffer aligned to 8 */
1004     if (priv_req->flags & REQUEST_UNALIGNED)
1005         trb_dma = priv_req->aligned_buf->dma;
1006     else
1007         trb_dma = request->dma;
1008 
1009     /*  For stream capable endpoints driver use only single TD. */
1010     trb = priv_ep->trb_pool + priv_ep->enqueue;
1011     priv_req->start_trb = priv_ep->enqueue;
1012     priv_req->end_trb = priv_req->start_trb;
1013     priv_req->trb = trb;
1014 
1015     cdns3_select_ep(priv_ep->cdns3_dev, address);
1016 
1017     control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1018           TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1019 
1020     if (!request->num_sgs) {
1021         trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1022         length = request->length;
1023     } else {
1024         trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
1025         length = request->sg[sg_idx].length;
1026     }
1027 
1028     tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1029 
1030     trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
1031 
1032     /*
1033      * For DEV_VER_V2 controller version we have enabled
1034      * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1035      * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1036      */
1037     if (priv_dev->dev_ver >= DEV_VER_V2) {
1038         if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1039             trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
1040     }
1041     priv_req->flags |= REQUEST_PENDING;
1042 
1043     trb->control = cpu_to_le32(control);
1044 
1045     trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1046 
1047     /*
1048      * Memory barrier - Cycle Bit must be set before trb->length  and
1049      * trb->buffer fields.
1050      */
1051     wmb();
1052 
1053     /* always first element */
1054     writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1055            &priv_dev->regs->ep_traddr);
1056 
1057     if (!(priv_ep->flags & EP_STALLED)) {
1058         trace_cdns3_ring(priv_ep);
1059         /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1060         writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1061 
1062         priv_ep->prime_flag = false;
1063 
1064         /*
1065          * Controller version DEV_VER_V2 tdl calculation
1066          * is based on TRB
1067          */
1068 
1069         if (priv_dev->dev_ver < DEV_VER_V2)
1070             writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1071                    &priv_dev->regs->ep_cmd);
1072         else if (priv_dev->dev_ver > DEV_VER_V2)
1073             writel(tdl, &priv_dev->regs->ep_tdl);
1074 
1075         priv_ep->last_stream_id = priv_req->request.stream_id;
1076         writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1077         writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1078                EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1079 
1080         trace_cdns3_doorbell_epx(priv_ep->name,
1081                      readl(&priv_dev->regs->ep_traddr));
1082     }
1083 
1084     /* WORKAROUND for transition to L0 */
1085     __cdns3_gadget_wakeup(priv_dev);
1086 
1087     return 0;
1088 }
1089 
1090 static void cdns3_rearm_drdy_if_needed(struct cdns3_endpoint *priv_ep)
1091 {
1092     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1093 
1094     if (priv_dev->dev_ver < DEV_VER_V3)
1095         return;
1096 
1097     if (readl(&priv_dev->regs->ep_sts) & EP_STS_TRBERR) {
1098         writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts);
1099         writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1100     }
1101 }
1102 
1103 /**
1104  * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1105  * @priv_ep: endpoint object
1106  * @request: request object
1107  *
1108  * Returns zero on success or negative value on failure
1109  */
1110 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1111                  struct usb_request *request)
1112 {
1113     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1114     struct cdns3_request *priv_req;
1115     struct cdns3_trb *trb;
1116     struct cdns3_trb *link_trb = NULL;
1117     dma_addr_t trb_dma;
1118     u32 togle_pcs = 1;
1119     int sg_iter = 0;
1120     int num_trb;
1121     int address;
1122     u32 control;
1123     int pcs;
1124     u16 total_tdl = 0;
1125     struct scatterlist *s = NULL;
1126     bool sg_supported = !!(request->num_mapped_sgs);
1127 
1128     if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1129         num_trb = priv_ep->interval;
1130     else
1131         num_trb = sg_supported ? request->num_mapped_sgs : 1;
1132 
1133     if (num_trb > priv_ep->free_trbs) {
1134         priv_ep->flags |= EP_RING_FULL;
1135         return -ENOBUFS;
1136     }
1137 
1138     priv_req = to_cdns3_request(request);
1139     address = priv_ep->endpoint.desc->bEndpointAddress;
1140 
1141     priv_ep->flags |= EP_PENDING_REQUEST;
1142 
1143     /* must allocate buffer aligned to 8 */
1144     if (priv_req->flags & REQUEST_UNALIGNED)
1145         trb_dma = priv_req->aligned_buf->dma;
1146     else
1147         trb_dma = request->dma;
1148 
1149     trb = priv_ep->trb_pool + priv_ep->enqueue;
1150     priv_req->start_trb = priv_ep->enqueue;
1151     priv_req->trb = trb;
1152 
1153     cdns3_select_ep(priv_ep->cdns3_dev, address);
1154 
1155     /* prepare ring */
1156     if ((priv_ep->enqueue + num_trb)  >= (priv_ep->num_trbs - 1)) {
1157         int doorbell, dma_index;
1158         u32 ch_bit = 0;
1159 
1160         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1161         dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1162 
1163         /* Driver can't update LINK TRB if it is current processed. */
1164         if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1165             priv_ep->flags |= EP_DEFERRED_DRDY;
1166             return -ENOBUFS;
1167         }
1168 
1169         /*updating C bt in  Link TRB before starting DMA*/
1170         link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1171         /*
1172          * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1173          * that DMA stuck at the LINK TRB.
1174          * On the other hand, removing TRB_CHAIN for longer TRs for
1175          * epXout cause that DMA stuck after handling LINK TRB.
1176          * To eliminate this strange behavioral driver set TRB_CHAIN
1177          * bit only for TR size > 2.
1178          */
1179         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1180             TRBS_PER_SEGMENT > 2)
1181             ch_bit = TRB_CHAIN;
1182 
1183         link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1184                     TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
1185     }
1186 
1187     if (priv_dev->dev_ver <= DEV_VER_V2)
1188         togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1189 
1190     if (sg_supported)
1191         s = request->sg;
1192 
1193     /* set incorrect Cycle Bit for first trb*/
1194     control = priv_ep->pcs ? 0 : TRB_CYCLE;
1195     trb->length = 0;
1196     if (priv_dev->dev_ver >= DEV_VER_V2) {
1197         u16 td_size;
1198 
1199         td_size = DIV_ROUND_UP(request->length,
1200                        priv_ep->endpoint.maxpacket);
1201         if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1202             trb->length = cpu_to_le32(TRB_TDL_SS_SIZE(td_size));
1203         else
1204             control |= TRB_TDL_HS_SIZE(td_size);
1205     }
1206 
1207     do {
1208         u32 length;
1209 
1210         /* fill TRB */
1211         control |= TRB_TYPE(TRB_NORMAL);
1212         if (sg_supported) {
1213             trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1214             length = sg_dma_len(s);
1215         } else {
1216             trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1217             length = request->length;
1218         }
1219 
1220         if (priv_ep->flags & EP_TDLCHK_EN)
1221             total_tdl += DIV_ROUND_UP(length,
1222                            priv_ep->endpoint.maxpacket);
1223 
1224         trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
1225                     TRB_LEN(length));
1226         pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1227 
1228         /*
1229          * first trb should be prepared as last to avoid processing
1230          *  transfer to early
1231          */
1232         if (sg_iter != 0)
1233             control |= pcs;
1234 
1235         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
1236             control |= TRB_IOC | TRB_ISP;
1237         } else {
1238             /* for last element in TD or in SG list */
1239             if (sg_iter == (num_trb - 1) && sg_iter != 0)
1240                 control |= pcs | TRB_IOC | TRB_ISP;
1241         }
1242 
1243         if (sg_iter)
1244             trb->control = cpu_to_le32(control);
1245         else
1246             priv_req->trb->control = cpu_to_le32(control);
1247 
1248         if (sg_supported) {
1249             trb->control |= cpu_to_le32(TRB_ISP);
1250             /* Don't set chain bit for last TRB */
1251             if (sg_iter < num_trb - 1)
1252                 trb->control |= cpu_to_le32(TRB_CHAIN);
1253 
1254             s = sg_next(s);
1255         }
1256 
1257         control = 0;
1258         ++sg_iter;
1259         priv_req->end_trb = priv_ep->enqueue;
1260         cdns3_ep_inc_enq(priv_ep);
1261         trb = priv_ep->trb_pool + priv_ep->enqueue;
1262         trb->length = 0;
1263     } while (sg_iter < num_trb);
1264 
1265     trb = priv_req->trb;
1266 
1267     priv_req->flags |= REQUEST_PENDING;
1268     priv_req->num_of_trb = num_trb;
1269 
1270     if (sg_iter == 1)
1271         trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
1272 
1273     if (priv_dev->dev_ver < DEV_VER_V2 &&
1274         (priv_ep->flags & EP_TDLCHK_EN)) {
1275         u16 tdl = total_tdl;
1276         u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1277 
1278         if (tdl > EP_CMD_TDL_MAX) {
1279             tdl = EP_CMD_TDL_MAX;
1280             priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1281         }
1282 
1283         if (old_tdl < tdl) {
1284             tdl -= old_tdl;
1285             writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1286                    &priv_dev->regs->ep_cmd);
1287         }
1288     }
1289 
1290     /*
1291      * Memory barrier - cycle bit must be set before other filds in trb.
1292      */
1293     wmb();
1294 
1295     /* give the TD to the consumer*/
1296     if (togle_pcs)
1297         trb->control = trb->control ^ cpu_to_le32(1);
1298 
1299     if (priv_dev->dev_ver <= DEV_VER_V2)
1300         cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1301 
1302     if (num_trb > 1) {
1303         int i = 0;
1304 
1305         while (i < num_trb) {
1306             trace_cdns3_prepare_trb(priv_ep, trb + i);
1307             if (trb + i == link_trb) {
1308                 trb = priv_ep->trb_pool;
1309                 num_trb = num_trb - i;
1310                 i = 0;
1311             } else {
1312                 i++;
1313             }
1314         }
1315     } else {
1316         trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1317     }
1318 
1319     /*
1320      * Memory barrier - Cycle Bit must be set before trb->length  and
1321      * trb->buffer fields.
1322      */
1323     wmb();
1324 
1325     /*
1326      * For DMULT mode we can set address to transfer ring only once after
1327      * enabling endpoint.
1328      */
1329     if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1330         /*
1331          * Until SW is not ready to handle the OUT transfer the ISO OUT
1332          * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1333          * EP_CFG_ENABLE must be set before updating ep_traddr.
1334          */
1335         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir &&
1336             !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1337             priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1338             cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1339                            EP_CFG_ENABLE);
1340         }
1341 
1342         writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1343                     priv_req->start_trb * TRB_SIZE),
1344                     &priv_dev->regs->ep_traddr);
1345 
1346         priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1347     }
1348 
1349     if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1350         trace_cdns3_ring(priv_ep);
1351         /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1352         writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1353         writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1354         cdns3_rearm_drdy_if_needed(priv_ep);
1355         trace_cdns3_doorbell_epx(priv_ep->name,
1356                      readl(&priv_dev->regs->ep_traddr));
1357     }
1358 
1359     /* WORKAROUND for transition to L0 */
1360     __cdns3_gadget_wakeup(priv_dev);
1361 
1362     return 0;
1363 }
1364 
1365 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1366 {
1367     struct cdns3_endpoint *priv_ep;
1368     struct usb_ep *ep;
1369 
1370     if (priv_dev->hw_configured_flag)
1371         return;
1372 
1373     writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1374 
1375     cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1376                    USB_CONF_U1EN | USB_CONF_U2EN);
1377 
1378     priv_dev->hw_configured_flag = 1;
1379 
1380     list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1381         if (ep->enabled) {
1382             priv_ep = ep_to_cdns3_ep(ep);
1383             cdns3_start_all_request(priv_dev, priv_ep);
1384         }
1385     }
1386 
1387     cdns3_allow_enable_l1(priv_dev, 1);
1388 }
1389 
1390 /**
1391  * cdns3_trb_handled - check whether trb has been handled by DMA
1392  *
1393  * @priv_ep: extended endpoint object.
1394  * @priv_req: request object for checking
1395  *
1396  * Endpoint must be selected before invoking this function.
1397  *
1398  * Returns false if request has not been handled by DMA, else returns true.
1399  *
1400  * SR - start ring
1401  * ER -  end ring
1402  * DQ = priv_ep->dequeue - dequeue position
1403  * EQ = priv_ep->enqueue -  enqueue position
1404  * ST = priv_req->start_trb - index of first TRB in transfer ring
1405  * ET = priv_req->end_trb - index of last TRB in transfer ring
1406  * CI = current_index - index of processed TRB by DMA.
1407  *
1408  * As first step, we check if the TRB between the ST and ET.
1409  * Then, we check if cycle bit for index priv_ep->dequeue
1410  * is correct.
1411  *
1412  * some rules:
1413  * 1. priv_ep->dequeue never equals to current_index.
1414  * 2  priv_ep->enqueue never exceed priv_ep->dequeue
1415  * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1416  *    and priv_ep->free_trbs is zero.
1417  *    This case indicate that TR is full.
1418  *
1419  * At below two cases, the request have been handled.
1420  * Case 1 - priv_ep->dequeue < current_index
1421  *      SR ... EQ ... DQ ... CI ... ER
1422  *      SR ... DQ ... CI ... EQ ... ER
1423  *
1424  * Case 2 - priv_ep->dequeue > current_index
1425  * This situation takes place when CI go through the LINK TRB at the end of
1426  * transfer ring.
1427  *      SR ... CI ... EQ ... DQ ... ER
1428  */
1429 static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
1430                   struct cdns3_request *priv_req)
1431 {
1432     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1433     struct cdns3_trb *trb;
1434     int current_index = 0;
1435     int handled = 0;
1436     int doorbell;
1437 
1438     current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1439     doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1440 
1441     /* current trb doesn't belong to this request */
1442     if (priv_req->start_trb < priv_req->end_trb) {
1443         if (priv_ep->dequeue > priv_req->end_trb)
1444             goto finish;
1445 
1446         if (priv_ep->dequeue < priv_req->start_trb)
1447             goto finish;
1448     }
1449 
1450     if ((priv_req->start_trb > priv_req->end_trb) &&
1451         (priv_ep->dequeue > priv_req->end_trb) &&
1452         (priv_ep->dequeue < priv_req->start_trb))
1453         goto finish;
1454 
1455     if ((priv_req->start_trb == priv_req->end_trb) &&
1456         (priv_ep->dequeue != priv_req->end_trb))
1457         goto finish;
1458 
1459     trb = &priv_ep->trb_pool[priv_ep->dequeue];
1460 
1461     if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
1462         goto finish;
1463 
1464     if (doorbell == 1 && current_index == priv_ep->dequeue)
1465         goto finish;
1466 
1467     /* The corner case for TRBS_PER_SEGMENT equal 2). */
1468     if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1469         handled = 1;
1470         goto finish;
1471     }
1472 
1473     if (priv_ep->enqueue == priv_ep->dequeue &&
1474         priv_ep->free_trbs == 0) {
1475         handled = 1;
1476     } else if (priv_ep->dequeue < current_index) {
1477         if ((current_index == (priv_ep->num_trbs - 1)) &&
1478             !priv_ep->dequeue)
1479             goto finish;
1480 
1481         handled = 1;
1482     } else if (priv_ep->dequeue  > current_index) {
1483             handled = 1;
1484     }
1485 
1486 finish:
1487     trace_cdns3_request_handled(priv_req, current_index, handled);
1488 
1489     return handled;
1490 }
1491 
1492 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1493                      struct cdns3_endpoint *priv_ep)
1494 {
1495     struct cdns3_request *priv_req;
1496     struct usb_request *request;
1497     struct cdns3_trb *trb;
1498     bool request_handled = false;
1499     bool transfer_end = false;
1500 
1501     while (!list_empty(&priv_ep->pending_req_list)) {
1502         request = cdns3_next_request(&priv_ep->pending_req_list);
1503         priv_req = to_cdns3_request(request);
1504 
1505         trb = priv_ep->trb_pool + priv_ep->dequeue;
1506 
1507         /* The TRB was changed as link TRB, and the request was handled at ep_dequeue */
1508         while (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
1509             trace_cdns3_complete_trb(priv_ep, trb);
1510             cdns3_ep_inc_deq(priv_ep);
1511             trb = priv_ep->trb_pool + priv_ep->dequeue;
1512         }
1513 
1514         if (!request->stream_id) {
1515             /* Re-select endpoint. It could be changed by other CPU
1516              * during handling usb_gadget_giveback_request.
1517              */
1518             cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1519 
1520             while (cdns3_trb_handled(priv_ep, priv_req)) {
1521                 priv_req->finished_trb++;
1522                 if (priv_req->finished_trb >= priv_req->num_of_trb)
1523                     request_handled = true;
1524 
1525                 trb = priv_ep->trb_pool + priv_ep->dequeue;
1526                 trace_cdns3_complete_trb(priv_ep, trb);
1527 
1528                 if (!transfer_end)
1529                     request->actual +=
1530                         TRB_LEN(le32_to_cpu(trb->length));
1531 
1532                 if (priv_req->num_of_trb > 1 &&
1533                     le32_to_cpu(trb->control) & TRB_SMM &&
1534                     le32_to_cpu(trb->control) & TRB_CHAIN)
1535                     transfer_end = true;
1536 
1537                 cdns3_ep_inc_deq(priv_ep);
1538             }
1539 
1540             if (request_handled) {
1541                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1542                 request_handled = false;
1543                 transfer_end = false;
1544             } else {
1545                 goto prepare_next_td;
1546             }
1547 
1548             if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1549                 TRBS_PER_SEGMENT == 2)
1550                 break;
1551         } else {
1552             /* Re-select endpoint. It could be changed by other CPU
1553              * during handling usb_gadget_giveback_request.
1554              */
1555             cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1556 
1557             trb = priv_ep->trb_pool;
1558             trace_cdns3_complete_trb(priv_ep, trb);
1559 
1560             if (trb != priv_req->trb)
1561                 dev_warn(priv_dev->dev,
1562                      "request_trb=0x%p, queue_trb=0x%p\n",
1563                      priv_req->trb, trb);
1564 
1565             request->actual += TRB_LEN(le32_to_cpu(trb->length));
1566 
1567             if (!request->num_sgs ||
1568                 (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1569                 priv_ep->stream_sg_idx = 0;
1570                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1571             } else {
1572                 priv_ep->stream_sg_idx++;
1573                 cdns3_ep_run_stream_transfer(priv_ep, request);
1574             }
1575             break;
1576         }
1577     }
1578     priv_ep->flags &= ~EP_PENDING_REQUEST;
1579 
1580 prepare_next_td:
1581     if (!(priv_ep->flags & EP_STALLED) &&
1582         !(priv_ep->flags & EP_STALL_PENDING))
1583         cdns3_start_all_request(priv_dev, priv_ep);
1584 }
1585 
1586 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1587 {
1588     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1589 
1590     cdns3_wa1_restore_cycle_bit(priv_ep);
1591 
1592     if (rearm) {
1593         trace_cdns3_ring(priv_ep);
1594 
1595         /* Cycle Bit must be updated before arming DMA. */
1596         wmb();
1597         writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1598 
1599         __cdns3_gadget_wakeup(priv_dev);
1600 
1601         trace_cdns3_doorbell_epx(priv_ep->name,
1602                      readl(&priv_dev->regs->ep_traddr));
1603     }
1604 }
1605 
1606 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1607 {
1608     u16 tdl = priv_ep->pending_tdl;
1609     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1610 
1611     if (tdl > EP_CMD_TDL_MAX) {
1612         tdl = EP_CMD_TDL_MAX;
1613         priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1614     } else {
1615         priv_ep->pending_tdl = 0;
1616     }
1617 
1618     writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1619 }
1620 
1621 /**
1622  * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1623  * @priv_ep: endpoint object
1624  *
1625  * Returns 0
1626  */
1627 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1628 {
1629     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1630     u32 ep_sts_reg;
1631     struct usb_request *deferred_request;
1632     struct usb_request *pending_request;
1633     u32 tdl = 0;
1634 
1635     cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1636 
1637     trace_cdns3_epx_irq(priv_dev, priv_ep);
1638 
1639     ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1640     writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1641 
1642     if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1643         bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1644 
1645         tdl = cdns3_get_tdl(priv_dev);
1646 
1647         /*
1648          * Continue the previous transfer:
1649          * There is some racing between ERDY and PRIME. The device send
1650          * ERDY and almost in the same time Host send PRIME. It cause
1651          * that host ignore the ERDY packet and driver has to send it
1652          * again.
1653          */
1654         if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
1655             EP_STS_HOSTPP(ep_sts_reg))) {
1656             writel(EP_CMD_ERDY |
1657                    EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1658                    &priv_dev->regs->ep_cmd);
1659             ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1660         } else {
1661             priv_ep->prime_flag = true;
1662 
1663             pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1664             deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1665 
1666             if (deferred_request && !pending_request) {
1667                 cdns3_start_all_request(priv_dev, priv_ep);
1668             }
1669         }
1670     }
1671 
1672     if (ep_sts_reg & EP_STS_TRBERR) {
1673         if (priv_ep->flags & EP_STALL_PENDING &&
1674             !(ep_sts_reg & EP_STS_DESCMIS &&
1675             priv_dev->dev_ver < DEV_VER_V2)) {
1676             cdns3_ep_stall_flush(priv_ep);
1677         }
1678 
1679         /*
1680          * For isochronous transfer driver completes request on
1681          * IOC or on TRBERR. IOC appears only when device receive
1682          * OUT data packet. If host disable stream or lost some packet
1683          * then the only way to finish all queued transfer is to do it
1684          * on TRBERR event.
1685          */
1686         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1687             !priv_ep->wa1_set) {
1688             if (!priv_ep->dir) {
1689                 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1690 
1691                 ep_cfg &= ~EP_CFG_ENABLE;
1692                 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1693                 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1694                 priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
1695             }
1696             cdns3_transfer_completed(priv_dev, priv_ep);
1697         } else if (!(priv_ep->flags & EP_STALLED) &&
1698               !(priv_ep->flags & EP_STALL_PENDING)) {
1699             if (priv_ep->flags & EP_DEFERRED_DRDY) {
1700                 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1701                 cdns3_start_all_request(priv_dev, priv_ep);
1702             } else {
1703                 cdns3_rearm_transfer(priv_ep,
1704                              priv_ep->wa1_set);
1705             }
1706         }
1707     }
1708 
1709     if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1710         (ep_sts_reg & EP_STS_IOT)) {
1711         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1712             if (ep_sts_reg & EP_STS_ISP)
1713                 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1714             else
1715                 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1716         }
1717 
1718         if (!priv_ep->use_streams) {
1719             if ((ep_sts_reg & EP_STS_IOC) ||
1720                 (ep_sts_reg & EP_STS_ISP)) {
1721                 cdns3_transfer_completed(priv_dev, priv_ep);
1722             } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1723                    priv_ep->pending_tdl) {
1724                 /* handle IOT with pending tdl */
1725                 cdns3_reprogram_tdl(priv_ep);
1726             }
1727         } else if (priv_ep->dir == USB_DIR_OUT) {
1728             priv_ep->ep_sts_pending |= ep_sts_reg;
1729         } else if (ep_sts_reg & EP_STS_IOT) {
1730             cdns3_transfer_completed(priv_dev, priv_ep);
1731         }
1732     }
1733 
1734     /*
1735      * MD_EXIT interrupt sets when stream capable endpoint exits
1736      * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1737      */
1738     if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1739         (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1740         priv_ep->ep_sts_pending = 0;
1741         cdns3_transfer_completed(priv_dev, priv_ep);
1742     }
1743 
1744     /*
1745      * WA2: this condition should only be meet when
1746      * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1747      * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1748      * In other cases this interrupt will be disabled.
1749      */
1750     if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1751         !(priv_ep->flags & EP_STALLED))
1752         cdns3_wa2_descmissing_packet(priv_ep);
1753 
1754     return 0;
1755 }
1756 
1757 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1758 {
1759     if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect)
1760         priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1761 }
1762 
1763 /**
1764  * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1765  * @priv_dev: extended gadget object
1766  * @usb_ists: bitmap representation of device's reported interrupts
1767  * (usb_ists register value)
1768  */
1769 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1770                           u32 usb_ists)
1771 __must_hold(&priv_dev->lock)
1772 {
1773     int speed = 0;
1774 
1775     trace_cdns3_usb_irq(priv_dev, usb_ists);
1776     if (usb_ists & USB_ISTS_L1ENTI) {
1777         /*
1778          * WORKAROUND: CDNS3 controller has issue with hardware resuming
1779          * from L1. To fix it, if any DMA transfer is pending driver
1780          * must starts driving resume signal immediately.
1781          */
1782         if (readl(&priv_dev->regs->drbl))
1783             __cdns3_gadget_wakeup(priv_dev);
1784     }
1785 
1786     /* Connection detected */
1787     if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1788         speed = cdns3_get_speed(priv_dev);
1789         priv_dev->gadget.speed = speed;
1790         usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1791         cdns3_ep0_config(priv_dev);
1792     }
1793 
1794     /* Disconnection detected */
1795     if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1796         spin_unlock(&priv_dev->lock);
1797         cdns3_disconnect_gadget(priv_dev);
1798         spin_lock(&priv_dev->lock);
1799         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1800         usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1801         cdns3_hw_reset_eps_config(priv_dev);
1802     }
1803 
1804     if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1805         if (priv_dev->gadget_driver &&
1806             priv_dev->gadget_driver->suspend) {
1807             spin_unlock(&priv_dev->lock);
1808             priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1809             spin_lock(&priv_dev->lock);
1810         }
1811     }
1812 
1813     if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1814         if (priv_dev->gadget_driver &&
1815             priv_dev->gadget_driver->resume) {
1816             spin_unlock(&priv_dev->lock);
1817             priv_dev->gadget_driver->resume(&priv_dev->gadget);
1818             spin_lock(&priv_dev->lock);
1819         }
1820     }
1821 
1822     /* reset*/
1823     if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1824         if (priv_dev->gadget_driver) {
1825             spin_unlock(&priv_dev->lock);
1826             usb_gadget_udc_reset(&priv_dev->gadget,
1827                          priv_dev->gadget_driver);
1828             spin_lock(&priv_dev->lock);
1829 
1830             /*read again to check the actual speed*/
1831             speed = cdns3_get_speed(priv_dev);
1832             priv_dev->gadget.speed = speed;
1833             cdns3_hw_reset_eps_config(priv_dev);
1834             cdns3_ep0_config(priv_dev);
1835         }
1836     }
1837 }
1838 
1839 /**
1840  * cdns3_device_irq_handler - interrupt handler for device part of controller
1841  *
1842  * @irq: irq number for cdns3 core device
1843  * @data: structure of cdns3
1844  *
1845  * Returns IRQ_HANDLED or IRQ_NONE
1846  */
1847 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1848 {
1849     struct cdns3_device *priv_dev = data;
1850     struct cdns *cdns = dev_get_drvdata(priv_dev->dev);
1851     irqreturn_t ret = IRQ_NONE;
1852     u32 reg;
1853 
1854     if (cdns->in_lpm)
1855         return ret;
1856 
1857     /* check USB device interrupt */
1858     reg = readl(&priv_dev->regs->usb_ists);
1859     if (reg) {
1860         /* After masking interrupts the new interrupts won't be
1861          * reported in usb_ists/ep_ists. In order to not lose some
1862          * of them driver disables only detected interrupts.
1863          * They will be enabled ASAP after clearing source of
1864          * interrupt. This an unusual behavior only applies to
1865          * usb_ists register.
1866          */
1867         reg = ~reg & readl(&priv_dev->regs->usb_ien);
1868         /* mask deferred interrupt. */
1869         writel(reg, &priv_dev->regs->usb_ien);
1870         ret = IRQ_WAKE_THREAD;
1871     }
1872 
1873     /* check endpoint interrupt */
1874     reg = readl(&priv_dev->regs->ep_ists);
1875     if (reg) {
1876         writel(0, &priv_dev->regs->ep_ien);
1877         ret = IRQ_WAKE_THREAD;
1878     }
1879 
1880     return ret;
1881 }
1882 
1883 /**
1884  * cdns3_device_thread_irq_handler - interrupt handler for device part
1885  * of controller
1886  *
1887  * @irq: irq number for cdns3 core device
1888  * @data: structure of cdns3
1889  *
1890  * Returns IRQ_HANDLED or IRQ_NONE
1891  */
1892 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1893 {
1894     struct cdns3_device *priv_dev = data;
1895     irqreturn_t ret = IRQ_NONE;
1896     unsigned long flags;
1897     unsigned int bit;
1898     unsigned long reg;
1899 
1900     spin_lock_irqsave(&priv_dev->lock, flags);
1901 
1902     reg = readl(&priv_dev->regs->usb_ists);
1903     if (reg) {
1904         writel(reg, &priv_dev->regs->usb_ists);
1905         writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1906         cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1907         ret = IRQ_HANDLED;
1908     }
1909 
1910     reg = readl(&priv_dev->regs->ep_ists);
1911 
1912     /* handle default endpoint OUT */
1913     if (reg & EP_ISTS_EP_OUT0) {
1914         cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1915         ret = IRQ_HANDLED;
1916     }
1917 
1918     /* handle default endpoint IN */
1919     if (reg & EP_ISTS_EP_IN0) {
1920         cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1921         ret = IRQ_HANDLED;
1922     }
1923 
1924     /* check if interrupt from non default endpoint, if no exit */
1925     reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1926     if (!reg)
1927         goto irqend;
1928 
1929     for_each_set_bit(bit, &reg,
1930              sizeof(u32) * BITS_PER_BYTE) {
1931         cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1932         ret = IRQ_HANDLED;
1933     }
1934 
1935     if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
1936         cdns3_wa2_check_outq_status(priv_dev);
1937 
1938 irqend:
1939     writel(~0, &priv_dev->regs->ep_ien);
1940     spin_unlock_irqrestore(&priv_dev->lock, flags);
1941 
1942     return ret;
1943 }
1944 
1945 /**
1946  * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1947  *
1948  * The real reservation will occur during write to EP_CFG register,
1949  * this function is used to check if the 'size' reservation is allowed.
1950  *
1951  * @priv_dev: extended gadget object
1952  * @size: the size (KB) for EP would like to allocate
1953  * @is_in: endpoint direction
1954  *
1955  * Return 0 if the required size can met or negative value on failure
1956  */
1957 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1958                       int size, int is_in)
1959 {
1960     int remained;
1961 
1962     /* 2KB are reserved for EP0*/
1963     remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1964 
1965     if (is_in) {
1966         if (remained < size)
1967             return -EPERM;
1968 
1969         priv_dev->onchip_used_size += size;
1970     } else {
1971         int required;
1972 
1973         /**
1974          *  ALL OUT EPs are shared the same chunk onchip memory, so
1975          * driver checks if it already has assigned enough buffers
1976          */
1977         if (priv_dev->out_mem_is_allocated >= size)
1978             return 0;
1979 
1980         required = size - priv_dev->out_mem_is_allocated;
1981 
1982         if (required > remained)
1983             return -EPERM;
1984 
1985         priv_dev->out_mem_is_allocated += required;
1986         priv_dev->onchip_used_size += required;
1987     }
1988 
1989     return 0;
1990 }
1991 
1992 static void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1993                   struct cdns3_endpoint *priv_ep)
1994 {
1995     struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1996 
1997     /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1998     if (priv_dev->dev_ver <= DEV_VER_V2)
1999         writel(USB_CONF_DMULT, &regs->usb_conf);
2000 
2001     if (priv_dev->dev_ver == DEV_VER_V2)
2002         writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
2003 
2004     if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
2005         u32 mask;
2006 
2007         if (priv_ep->dir)
2008             mask = BIT(priv_ep->num + 16);
2009         else
2010             mask = BIT(priv_ep->num);
2011 
2012         if (priv_ep->type != USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
2013             cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2014             cdns3_set_register_bit(&regs->tdl_beh, mask);
2015             cdns3_set_register_bit(&regs->tdl_beh2, mask);
2016             cdns3_set_register_bit(&regs->dma_adv_td, mask);
2017         }
2018 
2019         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2020             cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2021 
2022         cdns3_set_register_bit(&regs->dtrans, mask);
2023     }
2024 }
2025 
2026 /**
2027  * cdns3_ep_config - Configure hardware endpoint
2028  * @priv_ep: extended endpoint object
2029  * @enable: set EP_CFG_ENABLE bit in ep_cfg register.
2030  */
2031 int cdns3_ep_config(struct cdns3_endpoint *priv_ep, bool enable)
2032 {
2033     bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
2034     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2035     u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
2036     u32 max_packet_size = 0;
2037     u8 maxburst = 0;
2038     u32 ep_cfg = 0;
2039     u8 buffering;
2040     u8 mult = 0;
2041     int ret;
2042 
2043     buffering = priv_dev->ep_buf_size - 1;
2044 
2045     cdns3_configure_dmult(priv_dev, priv_ep);
2046 
2047     switch (priv_ep->type) {
2048     case USB_ENDPOINT_XFER_INT:
2049         ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
2050 
2051         if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2052             ep_cfg |= EP_CFG_TDL_CHK;
2053         break;
2054     case USB_ENDPOINT_XFER_BULK:
2055         ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
2056 
2057         if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2058             ep_cfg |= EP_CFG_TDL_CHK;
2059         break;
2060     default:
2061         ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
2062         mult = priv_dev->ep_iso_burst - 1;
2063         buffering = mult + 1;
2064     }
2065 
2066     switch (priv_dev->gadget.speed) {
2067     case USB_SPEED_FULL:
2068         max_packet_size = is_iso_ep ? 1023 : 64;
2069         break;
2070     case USB_SPEED_HIGH:
2071         max_packet_size = is_iso_ep ? 1024 : 512;
2072         break;
2073     case USB_SPEED_SUPER:
2074         /* It's limitation that driver assumes in driver. */
2075         mult = 0;
2076         max_packet_size = 1024;
2077         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2078             maxburst = priv_dev->ep_iso_burst - 1;
2079             buffering = (mult + 1) *
2080                     (maxburst + 1);
2081 
2082             if (priv_ep->interval > 1)
2083                 buffering++;
2084         } else {
2085             maxburst = priv_dev->ep_buf_size - 1;
2086         }
2087         break;
2088     default:
2089         /* all other speed are not supported */
2090         return -EINVAL;
2091     }
2092 
2093     if (max_packet_size == 1024)
2094         priv_ep->trb_burst_size = 128;
2095     else if (max_packet_size >= 512)
2096         priv_ep->trb_burst_size = 64;
2097     else
2098         priv_ep->trb_burst_size = 16;
2099 
2100     mult = min_t(u8, mult, EP_CFG_MULT_MAX);
2101     buffering = min_t(u8, buffering, EP_CFG_BUFFERING_MAX);
2102     maxburst = min_t(u8, maxburst, EP_CFG_MAXBURST_MAX);
2103 
2104     /* onchip buffer is only allocated before configuration */
2105     if (!priv_dev->hw_configured_flag) {
2106         ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2107                              !!priv_ep->dir);
2108         if (ret) {
2109             dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2110             return ret;
2111         }
2112     }
2113 
2114     if (enable)
2115         ep_cfg |= EP_CFG_ENABLE;
2116 
2117     if (priv_ep->use_streams && priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2118         if (priv_dev->dev_ver >= DEV_VER_V3) {
2119             u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
2120 
2121             /*
2122              * Stream capable endpoints are handled by using ep_tdl
2123              * register. Other endpoints use TDL from TRB feature.
2124              */
2125             cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb,
2126                          mask);
2127         }
2128 
2129         /*  Enable Stream Bit TDL chk and SID chk */
2130         ep_cfg |=  EP_CFG_STREAM_EN | EP_CFG_TDL_CHK | EP_CFG_SID_CHK;
2131     }
2132 
2133     ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2134           EP_CFG_MULT(mult) |
2135           EP_CFG_BUFFERING(buffering) |
2136           EP_CFG_MAXBURST(maxburst);
2137 
2138     cdns3_select_ep(priv_dev, bEndpointAddress);
2139     writel(ep_cfg, &priv_dev->regs->ep_cfg);
2140     priv_ep->flags |= EP_CONFIGURED;
2141 
2142     dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2143         priv_ep->name, ep_cfg);
2144 
2145     return 0;
2146 }
2147 
2148 /* Find correct direction for HW endpoint according to description */
2149 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2150                    struct cdns3_endpoint *priv_ep)
2151 {
2152     return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2153            (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2154 }
2155 
2156 static struct
2157 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2158                     struct usb_endpoint_descriptor *desc)
2159 {
2160     struct usb_ep *ep;
2161     struct cdns3_endpoint *priv_ep;
2162 
2163     list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2164         unsigned long num;
2165         int ret;
2166         /* ep name pattern likes epXin or epXout */
2167         char c[2] = {ep->name[2], '\0'};
2168 
2169         ret = kstrtoul(c, 10, &num);
2170         if (ret)
2171             return ERR_PTR(ret);
2172 
2173         priv_ep = ep_to_cdns3_ep(ep);
2174         if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2175             if (!(priv_ep->flags & EP_CLAIMED)) {
2176                 priv_ep->num  = num;
2177                 return priv_ep;
2178             }
2179         }
2180     }
2181 
2182     return ERR_PTR(-ENOENT);
2183 }
2184 
2185 /*
2186  *  Cadence IP has one limitation that all endpoints must be configured
2187  * (Type & MaxPacketSize) before setting configuration through hardware
2188  * register, it means we can't change endpoints configuration after
2189  * set_configuration.
2190  *
2191  * This function set EP_CLAIMED flag which is added when the gadget driver
2192  * uses usb_ep_autoconfig to configure specific endpoint;
2193  * When the udc driver receives set_configurion request,
2194  * it goes through all claimed endpoints, and configure all endpoints
2195  * accordingly.
2196  *
2197  * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2198  * ep_cfg register which can be changed after set_configuration, and do
2199  * some software operation accordingly.
2200  */
2201 static struct
2202 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2203                   struct usb_endpoint_descriptor *desc,
2204                   struct usb_ss_ep_comp_descriptor *comp_desc)
2205 {
2206     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2207     struct cdns3_endpoint *priv_ep;
2208     unsigned long flags;
2209 
2210     priv_ep = cdns3_find_available_ep(priv_dev, desc);
2211     if (IS_ERR(priv_ep)) {
2212         dev_err(priv_dev->dev, "no available ep\n");
2213         return NULL;
2214     }
2215 
2216     dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2217 
2218     spin_lock_irqsave(&priv_dev->lock, flags);
2219     priv_ep->endpoint.desc = desc;
2220     priv_ep->dir  = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2221     priv_ep->type = usb_endpoint_type(desc);
2222     priv_ep->flags |= EP_CLAIMED;
2223     priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2224 
2225     spin_unlock_irqrestore(&priv_dev->lock, flags);
2226     return &priv_ep->endpoint;
2227 }
2228 
2229 /**
2230  * cdns3_gadget_ep_alloc_request - Allocates request
2231  * @ep: endpoint object associated with request
2232  * @gfp_flags: gfp flags
2233  *
2234  * Returns allocated request address, NULL on allocation error
2235  */
2236 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2237                           gfp_t gfp_flags)
2238 {
2239     struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2240     struct cdns3_request *priv_req;
2241 
2242     priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2243     if (!priv_req)
2244         return NULL;
2245 
2246     priv_req->priv_ep = priv_ep;
2247 
2248     trace_cdns3_alloc_request(priv_req);
2249     return &priv_req->request;
2250 }
2251 
2252 /**
2253  * cdns3_gadget_ep_free_request - Free memory occupied by request
2254  * @ep: endpoint object associated with request
2255  * @request: request to free memory
2256  */
2257 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2258                   struct usb_request *request)
2259 {
2260     struct cdns3_request *priv_req = to_cdns3_request(request);
2261 
2262     if (priv_req->aligned_buf)
2263         priv_req->aligned_buf->in_use = 0;
2264 
2265     trace_cdns3_free_request(priv_req);
2266     kfree(priv_req);
2267 }
2268 
2269 /**
2270  * cdns3_gadget_ep_enable - Enable endpoint
2271  * @ep: endpoint object
2272  * @desc: endpoint descriptor
2273  *
2274  * Returns 0 on success, error code elsewhere
2275  */
2276 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2277                   const struct usb_endpoint_descriptor *desc)
2278 {
2279     struct cdns3_endpoint *priv_ep;
2280     struct cdns3_device *priv_dev;
2281     const struct usb_ss_ep_comp_descriptor *comp_desc;
2282     u32 reg = EP_STS_EN_TRBERREN;
2283     u32 bEndpointAddress;
2284     unsigned long flags;
2285     int enable = 1;
2286     int ret = 0;
2287     int val;
2288 
2289     if (!ep) {
2290         pr_debug("usbss: ep not configured?\n");
2291         return -EINVAL;
2292     }
2293 
2294     priv_ep = ep_to_cdns3_ep(ep);
2295     priv_dev = priv_ep->cdns3_dev;
2296     comp_desc = priv_ep->endpoint.comp_desc;
2297 
2298     if (!desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2299         dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2300         return -EINVAL;
2301     }
2302 
2303     if (!desc->wMaxPacketSize) {
2304         dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2305         return -EINVAL;
2306     }
2307 
2308     if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2309               "%s is already enabled\n", priv_ep->name))
2310         return 0;
2311 
2312     spin_lock_irqsave(&priv_dev->lock, flags);
2313 
2314     priv_ep->endpoint.desc = desc;
2315     priv_ep->type = usb_endpoint_type(desc);
2316     priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2317 
2318     if (priv_ep->interval > ISO_MAX_INTERVAL &&
2319         priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2320         dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2321             ISO_MAX_INTERVAL);
2322 
2323         ret =  -EINVAL;
2324         goto exit;
2325     }
2326 
2327     bEndpointAddress = priv_ep->num | priv_ep->dir;
2328     cdns3_select_ep(priv_dev, bEndpointAddress);
2329 
2330     /*
2331      * For some versions of controller at some point during ISO OUT traffic
2332      * DMA reads Transfer Ring for the EP which has never got doorbell.
2333      * This issue was detected only on simulation, but to avoid this issue
2334      * driver add protection against it. To fix it driver enable ISO OUT
2335      * endpoint before setting DRBL. This special treatment of ISO OUT
2336      * endpoints are recommended by controller specification.
2337      */
2338     if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir)
2339         enable = 0;
2340 
2341     if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2342         /*
2343          * Enable stream support (SS mode) related interrupts
2344          * in EP_STS_EN Register
2345          */
2346         if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2347             reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2348                 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2349                 EP_STS_EN_STREAMREN;
2350             priv_ep->use_streams = true;
2351             ret = cdns3_ep_config(priv_ep, enable);
2352             priv_dev->using_streams |= true;
2353         }
2354     } else {
2355         ret = cdns3_ep_config(priv_ep, enable);
2356     }
2357 
2358     if (ret)
2359         goto exit;
2360 
2361     ret = cdns3_allocate_trb_pool(priv_ep);
2362     if (ret)
2363         goto exit;
2364 
2365     bEndpointAddress = priv_ep->num | priv_ep->dir;
2366     cdns3_select_ep(priv_dev, bEndpointAddress);
2367 
2368     trace_cdns3_gadget_ep_enable(priv_ep);
2369 
2370     writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2371 
2372     ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2373                     !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2374                     1, 1000);
2375 
2376     if (unlikely(ret)) {
2377         cdns3_free_trb_pool(priv_ep);
2378         ret =  -EINVAL;
2379         goto exit;
2380     }
2381 
2382     /* enable interrupt for selected endpoint */
2383     cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2384                    BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2385 
2386     if (priv_dev->dev_ver < DEV_VER_V2)
2387         cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2388 
2389     writel(reg, &priv_dev->regs->ep_sts_en);
2390 
2391     ep->desc = desc;
2392     priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2393                 EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2394     priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2395     priv_ep->wa1_set = 0;
2396     priv_ep->enqueue = 0;
2397     priv_ep->dequeue = 0;
2398     reg = readl(&priv_dev->regs->ep_sts);
2399     priv_ep->pcs = !!EP_STS_CCS(reg);
2400     priv_ep->ccs = !!EP_STS_CCS(reg);
2401     /* one TRB is reserved for link TRB used in DMULT mode*/
2402     priv_ep->free_trbs = priv_ep->num_trbs - 1;
2403 exit:
2404     spin_unlock_irqrestore(&priv_dev->lock, flags);
2405 
2406     return ret;
2407 }
2408 
2409 /**
2410  * cdns3_gadget_ep_disable - Disable endpoint
2411  * @ep: endpoint object
2412  *
2413  * Returns 0 on success, error code elsewhere
2414  */
2415 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2416 {
2417     struct cdns3_endpoint *priv_ep;
2418     struct cdns3_request *priv_req;
2419     struct cdns3_device *priv_dev;
2420     struct usb_request *request;
2421     unsigned long flags;
2422     int ret = 0;
2423     u32 ep_cfg;
2424     int val;
2425 
2426     if (!ep) {
2427         pr_err("usbss: invalid parameters\n");
2428         return -EINVAL;
2429     }
2430 
2431     priv_ep = ep_to_cdns3_ep(ep);
2432     priv_dev = priv_ep->cdns3_dev;
2433 
2434     if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2435               "%s is already disabled\n", priv_ep->name))
2436         return 0;
2437 
2438     spin_lock_irqsave(&priv_dev->lock, flags);
2439 
2440     trace_cdns3_gadget_ep_disable(priv_ep);
2441 
2442     cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2443 
2444     ep_cfg = readl(&priv_dev->regs->ep_cfg);
2445     ep_cfg &= ~EP_CFG_ENABLE;
2446     writel(ep_cfg, &priv_dev->regs->ep_cfg);
2447 
2448     /**
2449      * Driver needs some time before resetting endpoint.
2450      * It need waits for clearing DBUSY bit or for timeout expired.
2451      * 10us is enough time for controller to stop transfer.
2452      */
2453     readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2454                   !(val & EP_STS_DBUSY), 1, 10);
2455     writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2456 
2457     readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2458                   !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2459                   1, 1000);
2460     if (unlikely(ret))
2461         dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2462             priv_ep->name);
2463 
2464     while (!list_empty(&priv_ep->pending_req_list)) {
2465         request = cdns3_next_request(&priv_ep->pending_req_list);
2466 
2467         cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2468                       -ESHUTDOWN);
2469     }
2470 
2471     while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2472         priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2473 
2474         kfree(priv_req->request.buf);
2475         cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2476                          &priv_req->request);
2477         list_del_init(&priv_req->list);
2478         --priv_ep->wa2_counter;
2479     }
2480 
2481     while (!list_empty(&priv_ep->deferred_req_list)) {
2482         request = cdns3_next_request(&priv_ep->deferred_req_list);
2483 
2484         cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2485                       -ESHUTDOWN);
2486     }
2487 
2488     priv_ep->descmis_req = NULL;
2489 
2490     ep->desc = NULL;
2491     priv_ep->flags &= ~EP_ENABLED;
2492     priv_ep->use_streams = false;
2493 
2494     spin_unlock_irqrestore(&priv_dev->lock, flags);
2495 
2496     return ret;
2497 }
2498 
2499 /**
2500  * __cdns3_gadget_ep_queue - Transfer data on endpoint
2501  * @ep: endpoint object
2502  * @request: request object
2503  * @gfp_flags: gfp flags
2504  *
2505  * Returns 0 on success, error code elsewhere
2506  */
2507 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2508                    struct usb_request *request,
2509                    gfp_t gfp_flags)
2510 {
2511     struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2512     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2513     struct cdns3_request *priv_req;
2514     int ret = 0;
2515 
2516     request->actual = 0;
2517     request->status = -EINPROGRESS;
2518     priv_req = to_cdns3_request(request);
2519     trace_cdns3_ep_queue(priv_req);
2520 
2521     if (priv_dev->dev_ver < DEV_VER_V2) {
2522         ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2523                         priv_req);
2524 
2525         if (ret == EINPROGRESS)
2526             return 0;
2527     }
2528 
2529     ret = cdns3_prepare_aligned_request_buf(priv_req);
2530     if (ret < 0)
2531         return ret;
2532 
2533     ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2534                         usb_endpoint_dir_in(ep->desc));
2535     if (ret)
2536         return ret;
2537 
2538     list_add_tail(&request->list, &priv_ep->deferred_req_list);
2539 
2540     /*
2541      * For stream capable endpoint if prime irq flag is set then only start
2542      * request.
2543      * If hardware endpoint configuration has not been set yet then
2544      * just queue request in deferred list. Transfer will be started in
2545      * cdns3_set_hw_configuration.
2546      */
2547     if (!request->stream_id) {
2548         if (priv_dev->hw_configured_flag &&
2549             !(priv_ep->flags & EP_STALLED) &&
2550             !(priv_ep->flags & EP_STALL_PENDING))
2551             cdns3_start_all_request(priv_dev, priv_ep);
2552     } else {
2553         if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2554             cdns3_start_all_request(priv_dev, priv_ep);
2555     }
2556 
2557     return 0;
2558 }
2559 
2560 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2561                  gfp_t gfp_flags)
2562 {
2563     struct usb_request *zlp_request;
2564     struct cdns3_endpoint *priv_ep;
2565     struct cdns3_device *priv_dev;
2566     unsigned long flags;
2567     int ret;
2568 
2569     if (!request || !ep)
2570         return -EINVAL;
2571 
2572     priv_ep = ep_to_cdns3_ep(ep);
2573     priv_dev = priv_ep->cdns3_dev;
2574 
2575     spin_lock_irqsave(&priv_dev->lock, flags);
2576 
2577     ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2578 
2579     if (ret == 0 && request->zero && request->length &&
2580         (request->length % ep->maxpacket == 0)) {
2581         struct cdns3_request *priv_req;
2582 
2583         zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2584         zlp_request->buf = priv_dev->zlp_buf;
2585         zlp_request->length = 0;
2586 
2587         priv_req = to_cdns3_request(zlp_request);
2588         priv_req->flags |= REQUEST_ZLP;
2589 
2590         dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2591             priv_ep->name);
2592         ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2593     }
2594 
2595     spin_unlock_irqrestore(&priv_dev->lock, flags);
2596     return ret;
2597 }
2598 
2599 /**
2600  * cdns3_gadget_ep_dequeue - Remove request from transfer queue
2601  * @ep: endpoint object associated with request
2602  * @request: request object
2603  *
2604  * Returns 0 on success, error code elsewhere
2605  */
2606 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2607                 struct usb_request *request)
2608 {
2609     struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2610     struct cdns3_device *priv_dev;
2611     struct usb_request *req, *req_temp;
2612     struct cdns3_request *priv_req;
2613     struct cdns3_trb *link_trb;
2614     u8 req_on_hw_ring = 0;
2615     unsigned long flags;
2616     int ret = 0;
2617 
2618     if (!ep || !request || !ep->desc)
2619         return -EINVAL;
2620 
2621     priv_dev = priv_ep->cdns3_dev;
2622 
2623     spin_lock_irqsave(&priv_dev->lock, flags);
2624 
2625     priv_req = to_cdns3_request(request);
2626 
2627     trace_cdns3_ep_dequeue(priv_req);
2628 
2629     cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2630 
2631     list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2632                  list) {
2633         if (request == req) {
2634             req_on_hw_ring = 1;
2635             goto found;
2636         }
2637     }
2638 
2639     list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2640                  list) {
2641         if (request == req)
2642             goto found;
2643     }
2644 
2645     goto not_found;
2646 
2647 found:
2648     link_trb = priv_req->trb;
2649 
2650     /* Update ring only if removed request is on pending_req_list list */
2651     if (req_on_hw_ring && link_trb) {
2652         link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2653             ((priv_req->end_trb + 1) * TRB_SIZE)));
2654         link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2655                     TRB_TYPE(TRB_LINK) | TRB_CHAIN);
2656 
2657         if (priv_ep->wa1_trb == priv_req->trb)
2658             cdns3_wa1_restore_cycle_bit(priv_ep);
2659     }
2660 
2661     cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2662 
2663 not_found:
2664     spin_unlock_irqrestore(&priv_dev->lock, flags);
2665     return ret;
2666 }
2667 
2668 /**
2669  * __cdns3_gadget_ep_set_halt - Sets stall on selected endpoint
2670  * Should be called after acquiring spin_lock and selecting ep
2671  * @priv_ep: endpoint object to set stall on.
2672  */
2673 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2674 {
2675     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2676 
2677     trace_cdns3_halt(priv_ep, 1, 0);
2678 
2679     if (!(priv_ep->flags & EP_STALLED)) {
2680         u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2681 
2682         if (!(ep_sts_reg & EP_STS_DBUSY))
2683             cdns3_ep_stall_flush(priv_ep);
2684         else
2685             priv_ep->flags |= EP_STALL_PENDING;
2686     }
2687 }
2688 
2689 /**
2690  * __cdns3_gadget_ep_clear_halt - Clears stall on selected endpoint
2691  * Should be called after acquiring spin_lock and selecting ep
2692  * @priv_ep: endpoint object to clear stall on
2693  */
2694 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2695 {
2696     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2697     struct usb_request *request;
2698     struct cdns3_request *priv_req;
2699     struct cdns3_trb *trb = NULL;
2700     struct cdns3_trb trb_tmp;
2701     int ret;
2702     int val;
2703 
2704     trace_cdns3_halt(priv_ep, 0, 0);
2705 
2706     request = cdns3_next_request(&priv_ep->pending_req_list);
2707     if (request) {
2708         priv_req = to_cdns3_request(request);
2709         trb = priv_req->trb;
2710         if (trb) {
2711             trb_tmp = *trb;
2712             trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2713         }
2714     }
2715 
2716     writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2717 
2718     /* wait for EPRST cleared */
2719     ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2720                     !(val & EP_CMD_EPRST), 1, 100);
2721     if (ret)
2722         return -EINVAL;
2723 
2724     priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2725 
2726     if (request) {
2727         if (trb)
2728             *trb = trb_tmp;
2729 
2730         cdns3_rearm_transfer(priv_ep, 1);
2731     }
2732 
2733     cdns3_start_all_request(priv_dev, priv_ep);
2734     return ret;
2735 }
2736 
2737 /**
2738  * cdns3_gadget_ep_set_halt - Sets/clears stall on selected endpoint
2739  * @ep: endpoint object to set/clear stall on
2740  * @value: 1 for set stall, 0 for clear stall
2741  *
2742  * Returns 0 on success, error code elsewhere
2743  */
2744 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2745 {
2746     struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2747     struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2748     unsigned long flags;
2749     int ret = 0;
2750 
2751     if (!(priv_ep->flags & EP_ENABLED))
2752         return -EPERM;
2753 
2754     spin_lock_irqsave(&priv_dev->lock, flags);
2755 
2756     cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2757 
2758     if (!value) {
2759         priv_ep->flags &= ~EP_WEDGE;
2760         ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2761     } else {
2762         __cdns3_gadget_ep_set_halt(priv_ep);
2763     }
2764 
2765     spin_unlock_irqrestore(&priv_dev->lock, flags);
2766 
2767     return ret;
2768 }
2769 
2770 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2771 
2772 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2773     .enable = cdns3_gadget_ep_enable,
2774     .disable = cdns3_gadget_ep_disable,
2775     .alloc_request = cdns3_gadget_ep_alloc_request,
2776     .free_request = cdns3_gadget_ep_free_request,
2777     .queue = cdns3_gadget_ep_queue,
2778     .dequeue = cdns3_gadget_ep_dequeue,
2779     .set_halt = cdns3_gadget_ep_set_halt,
2780     .set_wedge = cdns3_gadget_ep_set_wedge,
2781 };
2782 
2783 /**
2784  * cdns3_gadget_get_frame - Returns number of actual ITP frame
2785  * @gadget: gadget object
2786  *
2787  * Returns number of actual ITP frame
2788  */
2789 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2790 {
2791     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2792 
2793     return readl(&priv_dev->regs->usb_itpn);
2794 }
2795 
2796 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2797 {
2798     enum usb_device_speed speed;
2799 
2800     speed = cdns3_get_speed(priv_dev);
2801 
2802     if (speed >= USB_SPEED_SUPER)
2803         return 0;
2804 
2805     /* Start driving resume signaling to indicate remote wakeup. */
2806     writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2807 
2808     return 0;
2809 }
2810 
2811 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2812 {
2813     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2814     unsigned long flags;
2815     int ret = 0;
2816 
2817     spin_lock_irqsave(&priv_dev->lock, flags);
2818     ret = __cdns3_gadget_wakeup(priv_dev);
2819     spin_unlock_irqrestore(&priv_dev->lock, flags);
2820     return ret;
2821 }
2822 
2823 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2824                     int is_selfpowered)
2825 {
2826     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2827     unsigned long flags;
2828 
2829     spin_lock_irqsave(&priv_dev->lock, flags);
2830     priv_dev->is_selfpowered = !!is_selfpowered;
2831     spin_unlock_irqrestore(&priv_dev->lock, flags);
2832     return 0;
2833 }
2834 
2835 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2836 {
2837     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2838 
2839     if (is_on) {
2840         writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2841     } else {
2842         writel(~0, &priv_dev->regs->ep_ists);
2843         writel(~0, &priv_dev->regs->usb_ists);
2844         writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2845     }
2846 
2847     return 0;
2848 }
2849 
2850 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2851 {
2852     struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2853     u32 reg;
2854 
2855     cdns3_ep0_config(priv_dev);
2856 
2857     /* enable interrupts for endpoint 0 (in and out) */
2858     writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
2859 
2860     /*
2861      * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2862      * revision of controller.
2863      */
2864     if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2865         reg = readl(&regs->dbg_link1);
2866 
2867         reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2868         reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2869                DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2870         writel(reg, &regs->dbg_link1);
2871     }
2872 
2873     /*
2874      * By default some platforms has set protected access to memory.
2875      * This cause problem with cache, so driver restore non-secure
2876      * access to memory.
2877      */
2878     reg = readl(&regs->dma_axi_ctrl);
2879     reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2880            DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2881     writel(reg, &regs->dma_axi_ctrl);
2882 
2883     /* enable generic interrupt*/
2884     writel(USB_IEN_INIT, &regs->usb_ien);
2885     writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2886     /*  keep Fast Access bit */
2887     writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
2888 
2889     cdns3_configure_dmult(priv_dev, NULL);
2890 }
2891 
2892 /**
2893  * cdns3_gadget_udc_start - Gadget start
2894  * @gadget: gadget object
2895  * @driver: driver which operates on this gadget
2896  *
2897  * Returns 0 on success, error code elsewhere
2898  */
2899 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2900                   struct usb_gadget_driver *driver)
2901 {
2902     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2903     unsigned long flags;
2904     enum usb_device_speed max_speed = driver->max_speed;
2905 
2906     spin_lock_irqsave(&priv_dev->lock, flags);
2907     priv_dev->gadget_driver = driver;
2908 
2909     /* limit speed if necessary */
2910     max_speed = min(driver->max_speed, gadget->max_speed);
2911 
2912     switch (max_speed) {
2913     case USB_SPEED_FULL:
2914         writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2915         writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2916         break;
2917     case USB_SPEED_HIGH:
2918         writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2919         break;
2920     case USB_SPEED_SUPER:
2921         break;
2922     default:
2923         dev_err(priv_dev->dev,
2924             "invalid maximum_speed parameter %d\n",
2925             max_speed);
2926         fallthrough;
2927     case USB_SPEED_UNKNOWN:
2928         /* default to superspeed */
2929         max_speed = USB_SPEED_SUPER;
2930         break;
2931     }
2932 
2933     cdns3_gadget_config(priv_dev);
2934     spin_unlock_irqrestore(&priv_dev->lock, flags);
2935     return 0;
2936 }
2937 
2938 /**
2939  * cdns3_gadget_udc_stop - Stops gadget
2940  * @gadget: gadget object
2941  *
2942  * Returns 0
2943  */
2944 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2945 {
2946     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2947     struct cdns3_endpoint *priv_ep;
2948     u32 bEndpointAddress;
2949     struct usb_ep *ep;
2950     int val;
2951 
2952     priv_dev->gadget_driver = NULL;
2953 
2954     priv_dev->onchip_used_size = 0;
2955     priv_dev->out_mem_is_allocated = 0;
2956     priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2957 
2958     list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2959         priv_ep = ep_to_cdns3_ep(ep);
2960         bEndpointAddress = priv_ep->num | priv_ep->dir;
2961         cdns3_select_ep(priv_dev, bEndpointAddress);
2962         writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2963         readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2964                       !(val & EP_CMD_EPRST), 1, 100);
2965 
2966         priv_ep->flags &= ~EP_CLAIMED;
2967     }
2968 
2969     /* disable interrupt for device */
2970     writel(0, &priv_dev->regs->usb_ien);
2971     writel(0, &priv_dev->regs->usb_pwr);
2972     writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2973 
2974     return 0;
2975 }
2976 
2977 /**
2978  * cdns3_gadget_check_config - ensure cdns3 can support the USB configuration
2979  * @gadget: pointer to the USB gadget
2980  *
2981  * Used to record the maximum number of endpoints being used in a USB composite
2982  * device. (across all configurations)  This is to be used in the calculation
2983  * of the TXFIFO sizes when resizing internal memory for individual endpoints.
2984  * It will help ensured that the resizing logic reserves enough space for at
2985  * least one max packet.
2986  */
2987 static int cdns3_gadget_check_config(struct usb_gadget *gadget)
2988 {
2989     struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2990     struct usb_ep *ep;
2991     int n_in = 0;
2992     int total;
2993 
2994     list_for_each_entry(ep, &gadget->ep_list, ep_list) {
2995         if (ep->claimed && (ep->address & USB_DIR_IN))
2996             n_in++;
2997     }
2998 
2999     /* 2KB are reserved for EP0, 1KB for out*/
3000     total = 2 + n_in + 1;
3001 
3002     if (total > priv_dev->onchip_buffers)
3003         return -ENOMEM;
3004 
3005     priv_dev->ep_buf_size = priv_dev->ep_iso_burst =
3006             (priv_dev->onchip_buffers - 2) / (n_in + 1);
3007 
3008     return 0;
3009 }
3010 
3011 static const struct usb_gadget_ops cdns3_gadget_ops = {
3012     .get_frame = cdns3_gadget_get_frame,
3013     .wakeup = cdns3_gadget_wakeup,
3014     .set_selfpowered = cdns3_gadget_set_selfpowered,
3015     .pullup = cdns3_gadget_pullup,
3016     .udc_start = cdns3_gadget_udc_start,
3017     .udc_stop = cdns3_gadget_udc_stop,
3018     .match_ep = cdns3_gadget_match_ep,
3019     .check_config = cdns3_gadget_check_config,
3020 };
3021 
3022 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
3023 {
3024     int i;
3025 
3026     /* ep0 OUT point to ep0 IN. */
3027     priv_dev->eps[16] = NULL;
3028 
3029     for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
3030         if (priv_dev->eps[i]) {
3031             cdns3_free_trb_pool(priv_dev->eps[i]);
3032             devm_kfree(priv_dev->dev, priv_dev->eps[i]);
3033         }
3034 }
3035 
3036 /**
3037  * cdns3_init_eps - Initializes software endpoints of gadget
3038  * @priv_dev: extended gadget object
3039  *
3040  * Returns 0 on success, error code elsewhere
3041  */
3042 static int cdns3_init_eps(struct cdns3_device *priv_dev)
3043 {
3044     u32 ep_enabled_reg, iso_ep_reg;
3045     struct cdns3_endpoint *priv_ep;
3046     int ep_dir, ep_number;
3047     u32 ep_mask;
3048     int ret = 0;
3049     int i;
3050 
3051     /* Read it from USB_CAP3 to USB_CAP5 */
3052     ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
3053     iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
3054 
3055     dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
3056 
3057     for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
3058         ep_dir = i >> 4;    /* i div 16 */
3059         ep_number = i & 0xF;    /* i % 16 */
3060         ep_mask = BIT(i);
3061 
3062         if (!(ep_enabled_reg & ep_mask))
3063             continue;
3064 
3065         if (ep_dir && !ep_number) {
3066             priv_dev->eps[i] = priv_dev->eps[0];
3067             continue;
3068         }
3069 
3070         priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
3071                        GFP_KERNEL);
3072         if (!priv_ep)
3073             goto err;
3074 
3075         /* set parent of endpoint object */
3076         priv_ep->cdns3_dev = priv_dev;
3077         priv_dev->eps[i] = priv_ep;
3078         priv_ep->num = ep_number;
3079         priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
3080 
3081         if (!ep_number) {
3082             ret = cdns3_init_ep0(priv_dev, priv_ep);
3083             if (ret) {
3084                 dev_err(priv_dev->dev, "Failed to init ep0\n");
3085                 goto err;
3086             }
3087         } else {
3088             snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
3089                  ep_number, !!ep_dir ? "in" : "out");
3090             priv_ep->endpoint.name = priv_ep->name;
3091 
3092             usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
3093                            CDNS3_EP_MAX_PACKET_LIMIT);
3094             priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
3095             priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
3096             if (ep_dir)
3097                 priv_ep->endpoint.caps.dir_in = 1;
3098             else
3099                 priv_ep->endpoint.caps.dir_out = 1;
3100 
3101             if (iso_ep_reg & ep_mask)
3102                 priv_ep->endpoint.caps.type_iso = 1;
3103 
3104             priv_ep->endpoint.caps.type_bulk = 1;
3105             priv_ep->endpoint.caps.type_int = 1;
3106 
3107             list_add_tail(&priv_ep->endpoint.ep_list,
3108                       &priv_dev->gadget.ep_list);
3109         }
3110 
3111         priv_ep->flags = 0;
3112 
3113         dev_dbg(priv_dev->dev, "Initialized  %s support: %s %s\n",
3114              priv_ep->name,
3115              priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
3116              priv_ep->endpoint.caps.type_iso ? "ISO" : "");
3117 
3118         INIT_LIST_HEAD(&priv_ep->pending_req_list);
3119         INIT_LIST_HEAD(&priv_ep->deferred_req_list);
3120         INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
3121     }
3122 
3123     return 0;
3124 err:
3125     cdns3_free_all_eps(priv_dev);
3126     return -ENOMEM;
3127 }
3128 
3129 static void cdns3_gadget_release(struct device *dev)
3130 {
3131     struct cdns3_device *priv_dev = container_of(dev,
3132             struct cdns3_device, gadget.dev);
3133 
3134     kfree(priv_dev);
3135 }
3136 
3137 static void cdns3_gadget_exit(struct cdns *cdns)
3138 {
3139     struct cdns3_device *priv_dev;
3140 
3141     priv_dev = cdns->gadget_dev;
3142 
3143 
3144     pm_runtime_mark_last_busy(cdns->dev);
3145     pm_runtime_put_autosuspend(cdns->dev);
3146 
3147     usb_del_gadget(&priv_dev->gadget);
3148     devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
3149 
3150     cdns3_free_all_eps(priv_dev);
3151 
3152     while (!list_empty(&priv_dev->aligned_buf_list)) {
3153         struct cdns3_aligned_buf *buf;
3154 
3155         buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3156         dma_free_noncoherent(priv_dev->sysdev, buf->size,
3157                   buf->buf,
3158                   buf->dma,
3159                   buf->dir);
3160 
3161         list_del(&buf->list);
3162         kfree(buf);
3163     }
3164 
3165     dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3166               priv_dev->setup_dma);
3167     dma_pool_destroy(priv_dev->eps_dma_pool);
3168 
3169     kfree(priv_dev->zlp_buf);
3170     usb_put_gadget(&priv_dev->gadget);
3171     cdns->gadget_dev = NULL;
3172     cdns_drd_gadget_off(cdns);
3173 }
3174 
3175 static int cdns3_gadget_start(struct cdns *cdns)
3176 {
3177     struct cdns3_device *priv_dev;
3178     u32 max_speed;
3179     int ret;
3180 
3181     priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3182     if (!priv_dev)
3183         return -ENOMEM;
3184 
3185     usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3186             cdns3_gadget_release);
3187     cdns->gadget_dev = priv_dev;
3188     priv_dev->sysdev = cdns->dev;
3189     priv_dev->dev = cdns->dev;
3190     priv_dev->regs = cdns->dev_regs;
3191 
3192     device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3193                  &priv_dev->onchip_buffers);
3194 
3195     if (priv_dev->onchip_buffers <=  0) {
3196         u32 reg = readl(&priv_dev->regs->usb_cap2);
3197 
3198         priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3199     }
3200 
3201     if (!priv_dev->onchip_buffers)
3202         priv_dev->onchip_buffers = 256;
3203 
3204     max_speed = usb_get_maximum_speed(cdns->dev);
3205 
3206     /* Check the maximum_speed parameter */
3207     switch (max_speed) {
3208     case USB_SPEED_FULL:
3209     case USB_SPEED_HIGH:
3210     case USB_SPEED_SUPER:
3211         break;
3212     default:
3213         dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3214             max_speed);
3215         fallthrough;
3216     case USB_SPEED_UNKNOWN:
3217         /* default to superspeed */
3218         max_speed = USB_SPEED_SUPER;
3219         break;
3220     }
3221 
3222     /* fill gadget fields */
3223     priv_dev->gadget.max_speed = max_speed;
3224     priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3225     priv_dev->gadget.ops = &cdns3_gadget_ops;
3226     priv_dev->gadget.name = "usb-ss-gadget";
3227     priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3228     priv_dev->gadget.irq = cdns->dev_irq;
3229 
3230     spin_lock_init(&priv_dev->lock);
3231     INIT_WORK(&priv_dev->pending_status_wq,
3232           cdns3_pending_setup_status_handler);
3233 
3234     INIT_WORK(&priv_dev->aligned_buf_wq,
3235           cdns3_free_aligned_request_buf);
3236 
3237     /* initialize endpoint container */
3238     INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3239     INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3240     priv_dev->eps_dma_pool = dma_pool_create("cdns3_eps_dma_pool",
3241                          priv_dev->sysdev,
3242                          TRB_RING_SIZE, 8, 0);
3243     if (!priv_dev->eps_dma_pool) {
3244         dev_err(priv_dev->dev, "Failed to create TRB dma pool\n");
3245         ret = -ENOMEM;
3246         goto err1;
3247     }
3248 
3249     ret = cdns3_init_eps(priv_dev);
3250     if (ret) {
3251         dev_err(priv_dev->dev, "Failed to create endpoints\n");
3252         goto err1;
3253     }
3254 
3255     /* allocate memory for setup packet buffer */
3256     priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3257                          &priv_dev->setup_dma, GFP_DMA);
3258     if (!priv_dev->setup_buf) {
3259         ret = -ENOMEM;
3260         goto err2;
3261     }
3262 
3263     priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3264 
3265     dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3266         readl(&priv_dev->regs->usb_cap6));
3267     dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3268         readl(&priv_dev->regs->usb_cap1));
3269     dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3270         readl(&priv_dev->regs->usb_cap2));
3271 
3272     priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3273     if (priv_dev->dev_ver >= DEV_VER_V2)
3274         priv_dev->gadget.sg_supported = 1;
3275 
3276     priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3277     if (!priv_dev->zlp_buf) {
3278         ret = -ENOMEM;
3279         goto err3;
3280     }
3281 
3282     /* add USB gadget device */
3283     ret = usb_add_gadget(&priv_dev->gadget);
3284     if (ret < 0) {
3285         dev_err(priv_dev->dev, "Failed to add gadget\n");
3286         goto err4;
3287     }
3288 
3289     return 0;
3290 err4:
3291     kfree(priv_dev->zlp_buf);
3292 err3:
3293     dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3294               priv_dev->setup_dma);
3295 err2:
3296     cdns3_free_all_eps(priv_dev);
3297 err1:
3298     dma_pool_destroy(priv_dev->eps_dma_pool);
3299 
3300     usb_put_gadget(&priv_dev->gadget);
3301     cdns->gadget_dev = NULL;
3302     return ret;
3303 }
3304 
3305 static int __cdns3_gadget_init(struct cdns *cdns)
3306 {
3307     int ret = 0;
3308 
3309     /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3310     ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3311     if (ret) {
3312         dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3313         return ret;
3314     }
3315 
3316     cdns_drd_gadget_on(cdns);
3317     pm_runtime_get_sync(cdns->dev);
3318 
3319     ret = cdns3_gadget_start(cdns);
3320     if (ret) {
3321         pm_runtime_put_sync(cdns->dev);
3322         return ret;
3323     }
3324 
3325     /*
3326      * Because interrupt line can be shared with other components in
3327      * driver it can't use IRQF_ONESHOT flag here.
3328      */
3329     ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3330                     cdns3_device_irq_handler,
3331                     cdns3_device_thread_irq_handler,
3332                     IRQF_SHARED, dev_name(cdns->dev),
3333                     cdns->gadget_dev);
3334 
3335     if (ret)
3336         goto err0;
3337 
3338     return 0;
3339 err0:
3340     cdns3_gadget_exit(cdns);
3341     return ret;
3342 }
3343 
3344 static int cdns3_gadget_suspend(struct cdns *cdns, bool do_wakeup)
3345 __must_hold(&cdns->lock)
3346 {
3347     struct cdns3_device *priv_dev = cdns->gadget_dev;
3348 
3349     spin_unlock(&cdns->lock);
3350     cdns3_disconnect_gadget(priv_dev);
3351     spin_lock(&cdns->lock);
3352 
3353     priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3354     usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3355     cdns3_hw_reset_eps_config(priv_dev);
3356 
3357     /* disable interrupt for device */
3358     writel(0, &priv_dev->regs->usb_ien);
3359 
3360     return 0;
3361 }
3362 
3363 static int cdns3_gadget_resume(struct cdns *cdns, bool hibernated)
3364 {
3365     struct cdns3_device *priv_dev = cdns->gadget_dev;
3366 
3367     if (!priv_dev->gadget_driver)
3368         return 0;
3369 
3370     cdns3_gadget_config(priv_dev);
3371     if (hibernated)
3372         writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
3373 
3374     return 0;
3375 }
3376 
3377 /**
3378  * cdns3_gadget_init - initialize device structure
3379  *
3380  * @cdns: cdns instance
3381  *
3382  * This function initializes the gadget.
3383  */
3384 int cdns3_gadget_init(struct cdns *cdns)
3385 {
3386     struct cdns_role_driver *rdrv;
3387 
3388     rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3389     if (!rdrv)
3390         return -ENOMEM;
3391 
3392     rdrv->start = __cdns3_gadget_init;
3393     rdrv->stop  = cdns3_gadget_exit;
3394     rdrv->suspend   = cdns3_gadget_suspend;
3395     rdrv->resume    = cdns3_gadget_resume;
3396     rdrv->state = CDNS_ROLE_STATE_INACTIVE;
3397     rdrv->name  = "gadget";
3398     cdns->roles[USB_ROLE_DEVICE] = rdrv;
3399 
3400     return 0;
3401 }