usb/c67x00/c67x00.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * c67x00.h: Cypress C67X00 USB register and field definitions
0004  *
0005  * Copyright (C) 2006-2008 Barco N.V.
0006  *    Derived from the Cypress cy7c67200/300 ezusb linux driver and
0007  *    based on multiple host controller drivers inside the linux kernel.
0008  */
0009
0010 #ifndef _USB_C67X00_H
0011 #define _USB_C67X00_H
0012
0013 #include <linux/spinlock.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/completion.h>
0016 #include <linux/mutex.h>
0017
0018 /* ---------------------------------------------------------------------
0019  * Cypress C67x00 register definitions
0020  */
0021
0022 /* Hardware Revision Register */
0023 #define HW_REV_REG      0xC004
0024
0025 /* General USB registers */
0026 /* ===================== */
0027
0028 /* USB Control Register */
0029 #define USB_CTL_REG(x)      ((x) ? 0xC0AA : 0xC08A)
0030
0031 #define LOW_SPEED_PORT(x)   ((x) ? 0x0800 : 0x0400)
0032 #define HOST_MODE       0x0200
0033 #define PORT_RES_EN(x)      ((x) ? 0x0100 : 0x0080)
0034 #define SOF_EOP_EN(x)       ((x) ? 0x0002 : 0x0001)
0035
0036 /* USB status register - Notice it has different content in hcd/udc mode */
0037 #define USB_STAT_REG(x)     ((x) ? 0xC0B0 : 0xC090)
0038
0039 #define EP0_IRQ_FLG     0x0001
0040 #define EP1_IRQ_FLG     0x0002
0041 #define EP2_IRQ_FLG     0x0004
0042 #define EP3_IRQ_FLG     0x0008
0043 #define EP4_IRQ_FLG     0x0010
0044 #define EP5_IRQ_FLG     0x0020
0045 #define EP6_IRQ_FLG     0x0040
0046 #define EP7_IRQ_FLG     0x0080
0047 #define RESET_IRQ_FLG       0x0100
0048 #define SOF_EOP_IRQ_FLG     0x0200
0049 #define ID_IRQ_FLG      0x4000
0050 #define VBUS_IRQ_FLG        0x8000
0051
0052 /* USB Host only registers */
0053 /* ======================= */
0054
0055 /* Host n Control Register */
0056 #define HOST_CTL_REG(x)     ((x) ? 0xC0A0 : 0xC080)
0057
0058 #define PREAMBLE_EN     0x0080  /* Preamble enable */
0059 #define SEQ_SEL         0x0040  /* Data Toggle Sequence Bit Select */
0060 #define ISO_EN          0x0010  /* Isochronous enable  */
0061 #define ARM_EN          0x0001  /* Arm operation */
0062
0063 /* Host n Interrupt Enable Register */
0064 #define HOST_IRQ_EN_REG(x)  ((x) ? 0xC0AC : 0xC08C)
0065
0066 #define SOF_EOP_IRQ_EN      0x0200  /* SOF/EOP Interrupt Enable  */
0067 #define SOF_EOP_TMOUT_IRQ_EN    0x0800  /* SOF/EOP Timeout Interrupt Enable  */
0068 #define ID_IRQ_EN       0x4000  /* ID interrupt enable */
0069 #define VBUS_IRQ_EN     0x8000  /* VBUS interrupt enable */
0070 #define DONE_IRQ_EN     0x0001  /* Done Interrupt Enable  */
0071
0072 /* USB status register */
0073 #define HOST_STAT_MASK      0x02FD
0074 #define PORT_CONNECT_CHANGE(x)  ((x) ? 0x0020 : 0x0010)
0075 #define PORT_SE0_STATUS(x)  ((x) ? 0x0008 : 0x0004)
0076
0077 /* Host Frame Register */
0078 #define HOST_FRAME_REG(x)   ((x) ? 0xC0B6 : 0xC096)
0079
0080 #define HOST_FRAME_MASK     0x07FF
0081
0082 /* USB Peripheral only registers */
0083 /* ============================= */
0084
0085 /* Device n Port Sel reg */
0086 #define DEVICE_N_PORT_SEL(x)    ((x) ? 0xC0A4 : 0xC084)
0087
0088 /* Device n Interrupt Enable Register */
0089 #define DEVICE_N_IRQ_EN_REG(x)  ((x) ? 0xC0AC : 0xC08C)
0090
0091 #define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep)    ((dev)          \
0092                          ? (0x0280 + (ep << 4)) \
0093                          : (0x0200 + (ep << 4)))
0094 #define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep)   ((dev)          \
0095                          ? (0x0286 + (ep << 4)) \
0096                          : (0x0206 + (ep << 4)))
0097
0098 #define DEVICE_N_ADDRESS(dev)   ((dev) ? (0xC0AE) : (0xC08E))
0099
0100 /* HPI registers */
0101 /* ============= */
0102
0103 /* HPI Status register */
0104 #define SOFEOP_FLG(x)       (1 << ((x) ? 12 : 10))
0105 #define SIEMSG_FLG(x)       (1 << (4 + (x)))
0106 #define RESET_FLG(x)        ((x) ? 0x0200 : 0x0002)
0107 #define DONE_FLG(x)     (1 << (2 + (x)))
0108 #define RESUME_FLG(x)       (1 << (6 + (x)))
0109 #define MBX_OUT_FLG     0x0001  /* Message out available */
0110 #define MBX_IN_FLG      0x0100
0111 #define ID_FLG          0x4000
0112 #define VBUS_FLG        0x8000
0113
0114 /* Interrupt routing register */
0115 #define HPI_IRQ_ROUTING_REG 0x0142
0116
0117 #define HPI_SWAP_ENABLE(x)  ((x) ? 0x0100 : 0x0001)
0118 #define RESET_TO_HPI_ENABLE(x)  ((x) ? 0x0200 : 0x0002)
0119 #define DONE_TO_HPI_ENABLE(x)   ((x) ? 0x0008 : 0x0004)
0120 #define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040)
0121 #define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800)
0122 #define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400)
0123 #define ID_TO_HPI_ENABLE    0x4000
0124 #define VBUS_TO_HPI_ENABLE  0x8000
0125
0126 /* SIE msg registers */
0127 #define SIEMSG_REG(x)       ((x) ? 0x0148 : 0x0144)
0128
0129 #define HUSB_TDListDone     0x1000
0130
0131 #define SUSB_EP0_MSG        0x0001
0132 #define SUSB_EP1_MSG        0x0002
0133 #define SUSB_EP2_MSG        0x0004
0134 #define SUSB_EP3_MSG        0x0008
0135 #define SUSB_EP4_MSG        0x0010
0136 #define SUSB_EP5_MSG        0x0020
0137 #define SUSB_EP6_MSG        0x0040
0138 #define SUSB_EP7_MSG        0x0080
0139 #define SUSB_RST_MSG        0x0100
0140 #define SUSB_SOF_MSG        0x0200
0141 #define SUSB_CFG_MSG        0x0400
0142 #define SUSB_SUS_MSG        0x0800
0143 #define SUSB_ID_MSG         0x4000
0144 #define SUSB_VBUS_MSG       0x8000
0145
0146 /* BIOS interrupt routines */
0147
0148 #define SUSBx_RECEIVE_INT(x)    ((x) ? 97 : 81)
0149 #define SUSBx_SEND_INT(x)   ((x) ? 96 : 80)
0150
0151 #define SUSBx_DEV_DESC_VEC(x)   ((x) ? 0x00D4 : 0x00B4)
0152 #define SUSBx_CONF_DESC_VEC(x)  ((x) ? 0x00D6 : 0x00B6)
0153 #define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8)
0154
0155 #define CY_HCD_BUF_ADDR     0x500   /* Base address for host */
0156 #define SIE_TD_SIZE     0x200   /* size of the td list */
0157 #define SIE_TD_BUF_SIZE     0x400   /* size of the data buffer */
0158
0159 #define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0)
0160 #define SIE_BUF_OFFSET(host)    (SIE_TD_OFFSET(host) + SIE_TD_SIZE)
0161
0162 /* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */
0163 #define CY_UDC_REQ_HEADER_BASE  0x1100
0164 /* 8- byte request headers for IN/OUT transfers */
0165 #define CY_UDC_REQ_HEADER_SIZE  8
0166
0167 #define CY_UDC_REQ_HEADER_ADDR(ep_num)  (CY_UDC_REQ_HEADER_BASE + \
0168                      ((ep_num) * CY_UDC_REQ_HEADER_SIZE))
0169 #define CY_UDC_DESC_BASE_ADDRESS    (CY_UDC_REQ_HEADER_ADDR(8))
0170
0171 #define CY_UDC_BIOS_REPLACE_BASE    0x1800
0172 #define CY_UDC_REQ_BUFFER_BASE      0x2000
0173 #define CY_UDC_REQ_BUFFER_SIZE      0x0400
0174 #define CY_UDC_REQ_BUFFER_ADDR(ep_num)  (CY_UDC_REQ_BUFFER_BASE + \
0175                      ((ep_num) * CY_UDC_REQ_BUFFER_SIZE))
0176
0177 /* ---------------------------------------------------------------------
0178  * Driver data structures
0179  */
0180
0181 struct c67x00_device;
0182
0183 /**
0184  * struct c67x00_sie - Common data associated with a SIE
0185  * @lock: lock to protect this struct and the associated chip registers
0186  * @private_data: subdriver dependent data
0187  * @irq: subdriver dependent irq handler, set NULL when not used
0188  * @dev: link to common driver structure
0189  * @sie_num: SIE number on chip, starting from 0
0190  * @mode: SIE mode (host/peripheral/otg/not used)
0191  */
0192 struct c67x00_sie {
0193     /* Entries to be used by the subdrivers */
0194     spinlock_t lock;    /* protect this structure */
0195     void *private_data;
0196     void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg);
0197
0198     /* Read only: */
0199     struct c67x00_device *dev;
0200     int sie_num;
0201     int mode;
0202 };
0203
0204 #define sie_dev(s)  (&(s)->dev->pdev->dev)
0205
0206 /**
0207  * struct c67x00_lcp
0208  */
0209 struct c67x00_lcp {
0210     /* Internal use only */
0211     struct mutex mutex;
0212     struct completion msg_received;
0213     u16 last_msg;
0214 };
0215
0216 /*
0217  * struct c67x00_hpi
0218  */
0219 struct c67x00_hpi {
0220     void __iomem *base;
0221     int regstep;
0222     spinlock_t lock;
0223     struct c67x00_lcp lcp;
0224 };
0225
0226 #define C67X00_SIES 2
0227 #define C67X00_PORTS    2
0228
0229 /**
0230  * struct c67x00_device - Common data associated with a c67x00 instance
0231  * @hpi: hpi addresses
0232  * @sie: array of sie's on this chip
0233  * @pdev: platform device of instance
0234  * @pdata: configuration provided by the platform
0235  */
0236 struct c67x00_device {
0237     struct c67x00_hpi hpi;
0238     struct c67x00_sie sie[C67X00_SIES];
0239     struct platform_device *pdev;
0240     struct c67x00_platform_data *pdata;
0241 };
0242
0243 /* ---------------------------------------------------------------------
0244  * Low level interface functions
0245  */
0246
0247 /* Host Port Interface (HPI) functions */
0248 u16 c67x00_ll_hpi_status(struct c67x00_device *dev);
0249 void c67x00_ll_hpi_reg_init(struct c67x00_device *dev);
0250 void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie);
0251 void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie);
0252
0253 /* General functions */
0254 u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num);
0255 u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie);
0256 void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits);
0257 u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie);
0258 void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr,
0259                   void *data, int len);
0260 void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr,
0261                  void *data, int len);
0262
0263 /* Host specific functions */
0264 void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value);
0265 void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port);
0266 void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr);
0267 u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie);
0268 u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie);
0269 void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie);
0270 void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port);
0271
0272 /* Called by c67x00_irq to handle lcp interrupts */
0273 void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status);
0274
0275 /* Setup and teardown */
0276 void c67x00_ll_init(struct c67x00_device *dev);
0277 void c67x00_ll_release(struct c67x00_device *dev);
0278 int c67x00_ll_reset(struct c67x00_device *dev);
0279
0280 #endif              /* _USB_C67X00_H */