drivers/uio/uio_dmem_genirq.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * drivers/uio/uio_dmem_genirq.c
0004  *
0005  * Userspace I/O platform driver with generic IRQ handling code.
0006  *
0007  * Copyright (C) 2012 Damian Hobson-Garcia
0008  *
0009  * Based on uio_pdrv_genirq.c by Magnus Damm
0010  */
0011
0012 #include <linux/platform_device.h>
0013 #include <linux/uio_driver.h>
0014 #include <linux/spinlock.h>
0015 #include <linux/bitops.h>
0016 #include <linux/module.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/platform_data/uio_dmem_genirq.h>
0019 #include <linux/stringify.h>
0020 #include <linux/pm_runtime.h>
0021 #include <linux/dma-mapping.h>
0022 #include <linux/slab.h>
0023 #include <linux/irq.h>
0024
0025 #include <linux/of.h>
0026 #include <linux/of_platform.h>
0027 #include <linux/of_address.h>
0028
0029 #define DRIVER_NAME "uio_dmem_genirq"
0030 #define DMEM_MAP_ERROR (~0)
0031
0032 struct uio_dmem_genirq_platdata {
0033     struct uio_info *uioinfo;
0034     spinlock_t lock;
0035     unsigned long flags;
0036     struct platform_device *pdev;
0037     unsigned int dmem_region_start;
0038     unsigned int num_dmem_regions;
0039     void *dmem_region_vaddr[MAX_UIO_MAPS];
0040     struct mutex alloc_lock;
0041     unsigned int refcnt;
0042 };
0043
0044 static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode)
0045 {
0046     struct uio_dmem_genirq_platdata *priv = info->priv;
0047     struct uio_mem *uiomem;
0048     int dmem_region = priv->dmem_region_start;
0049
0050     uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
0051
0052     mutex_lock(&priv->alloc_lock);
0053     while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
0054         void *addr;
0055         if (!uiomem->size)
0056             break;
0057
0058         addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size,
0059                 (dma_addr_t *)&uiomem->addr, GFP_KERNEL);
0060         if (!addr) {
0061             uiomem->addr = DMEM_MAP_ERROR;
0062         }
0063         priv->dmem_region_vaddr[dmem_region++] = addr;
0064         ++uiomem;
0065     }
0066     priv->refcnt++;
0067
0068     mutex_unlock(&priv->alloc_lock);
0069     /* Wait until the Runtime PM code has woken up the device */
0070     pm_runtime_get_sync(&priv->pdev->dev);
0071     return 0;
0072 }
0073
0074 static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode)
0075 {
0076     struct uio_dmem_genirq_platdata *priv = info->priv;
0077     struct uio_mem *uiomem;
0078     int dmem_region = priv->dmem_region_start;
0079
0080     /* Tell the Runtime PM code that the device has become idle */
0081     pm_runtime_put_sync(&priv->pdev->dev);
0082
0083     uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
0084
0085     mutex_lock(&priv->alloc_lock);
0086
0087     priv->refcnt--;
0088     while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
0089         if (!uiomem->size)
0090             break;
0091         if (priv->dmem_region_vaddr[dmem_region]) {
0092             dma_free_coherent(&priv->pdev->dev, uiomem->size,
0093                     priv->dmem_region_vaddr[dmem_region],
0094                     uiomem->addr);
0095         }
0096         uiomem->addr = DMEM_MAP_ERROR;
0097         ++dmem_region;
0098         ++uiomem;
0099     }
0100
0101     mutex_unlock(&priv->alloc_lock);
0102     return 0;
0103 }
0104
0105 static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info)
0106 {
0107     struct uio_dmem_genirq_platdata *priv = dev_info->priv;
0108
0109     /* Just disable the interrupt in the interrupt controller, and
0110      * remember the state so we can allow user space to enable it later.
0111      */
0112
0113     if (!test_and_set_bit(0, &priv->flags))
0114         disable_irq_nosync(irq);
0115
0116     return IRQ_HANDLED;
0117 }
0118
0119 static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
0120 {
0121     struct uio_dmem_genirq_platdata *priv = dev_info->priv;
0122     unsigned long flags;
0123
0124     /* Allow user space to enable and disable the interrupt
0125      * in the interrupt controller, but keep track of the
0126      * state to prevent per-irq depth damage.
0127      *
0128      * Serialize this operation to support multiple tasks.
0129      */
0130
0131     spin_lock_irqsave(&priv->lock, flags);
0132     if (irq_on) {
0133         if (test_and_clear_bit(0, &priv->flags))
0134             enable_irq(dev_info->irq);
0135         spin_unlock_irqrestore(&priv->lock, flags);
0136     } else {
0137         if (!test_and_set_bit(0, &priv->flags)) {
0138             spin_unlock_irqrestore(&priv->lock, flags);
0139             disable_irq(dev_info->irq);
0140         }
0141     }
0142
0143     return 0;
0144 }
0145
0146 static void uio_dmem_genirq_pm_disable(void *data)
0147 {
0148     struct device *dev = data;
0149
0150     pm_runtime_disable(dev);
0151 }
0152
0153 static int uio_dmem_genirq_probe(struct platform_device *pdev)
0154 {
0155     struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev);
0156     struct uio_info *uioinfo = &pdata->uioinfo;
0157     struct uio_dmem_genirq_platdata *priv;
0158     struct uio_mem *uiomem;
0159     int ret = -EINVAL;
0160     int i;
0161
0162     if (pdev->dev.of_node) {
0163         /* alloc uioinfo for one device */
0164         uioinfo = devm_kzalloc(&pdev->dev, sizeof(*uioinfo), GFP_KERNEL);
0165         if (!uioinfo) {
0166             dev_err(&pdev->dev, "unable to kmalloc\n");
0167             return -ENOMEM;
0168         }
0169         uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn",
0170                            pdev->dev.of_node);
0171         uioinfo->version = "devicetree";
0172     }
0173
0174     if (!uioinfo || !uioinfo->name || !uioinfo->version) {
0175         dev_err(&pdev->dev, "missing platform_data\n");
0176         return -EINVAL;
0177     }
0178
0179     if (uioinfo->handler || uioinfo->irqcontrol ||
0180         uioinfo->irq_flags & IRQF_SHARED) {
0181         dev_err(&pdev->dev, "interrupt configuration error\n");
0182         return -EINVAL;
0183     }
0184
0185     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
0186     if (!priv) {
0187         dev_err(&pdev->dev, "unable to kmalloc\n");
0188         return -ENOMEM;
0189     }
0190
0191     ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
0192     if (ret) {
0193         dev_err(&pdev->dev, "DMA enable failed\n");
0194         return ret;
0195     }
0196
0197     priv->uioinfo = uioinfo;
0198     spin_lock_init(&priv->lock);
0199     priv->flags = 0; /* interrupt is enabled to begin with */
0200     priv->pdev = pdev;
0201     mutex_init(&priv->alloc_lock);
0202
0203     if (!uioinfo->irq) {
0204         /* Multiple IRQs are not supported */
0205         ret = platform_get_irq(pdev, 0);
0206         if (ret == -ENXIO && pdev->dev.of_node)
0207             ret = UIO_IRQ_NONE;
0208         else if (ret < 0)
0209             return ret;
0210         uioinfo->irq = ret;
0211     }
0212
0213     if (uioinfo->irq) {
0214         struct irq_data *irq_data = irq_get_irq_data(uioinfo->irq);
0215
0216         /*
0217          * If a level interrupt, dont do lazy disable. Otherwise the
0218          * irq will fire again since clearing of the actual cause, on
0219          * device level, is done in userspace
0220          * irqd_is_level_type() isn't used since isn't valid until
0221          * irq is configured.
0222          */
0223         if (irq_data &&
0224             irqd_get_trigger_type(irq_data) & IRQ_TYPE_LEVEL_MASK) {
0225             dev_dbg(&pdev->dev, "disable lazy unmask\n");
0226             irq_set_status_flags(uioinfo->irq, IRQ_DISABLE_UNLAZY);
0227         }
0228     }
0229
0230     uiomem = &uioinfo->mem[0];
0231
0232     for (i = 0; i < pdev->num_resources; ++i) {
0233         struct resource *r = &pdev->resource[i];
0234
0235         if (r->flags != IORESOURCE_MEM)
0236             continue;
0237
0238         if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
0239             dev_warn(&pdev->dev, "device has more than "
0240                     __stringify(MAX_UIO_MAPS)
0241                     " I/O memory resources.\n");
0242             break;
0243         }
0244
0245         uiomem->memtype = UIO_MEM_PHYS;
0246         uiomem->addr = r->start;
0247         uiomem->size = resource_size(r);
0248         ++uiomem;
0249     }
0250
0251     priv->dmem_region_start = uiomem - &uioinfo->mem[0];
0252     priv->num_dmem_regions = pdata->num_dynamic_regions;
0253
0254     for (i = 0; i < pdata->num_dynamic_regions; ++i) {
0255         if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
0256             dev_warn(&pdev->dev, "device has more than "
0257                     __stringify(MAX_UIO_MAPS)
0258                     " dynamic and fixed memory regions.\n");
0259             break;
0260         }
0261         uiomem->memtype = UIO_MEM_PHYS;
0262         uiomem->addr = DMEM_MAP_ERROR;
0263         uiomem->size = pdata->dynamic_region_sizes[i];
0264         ++uiomem;
0265     }
0266
0267     while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
0268         uiomem->size = 0;
0269         ++uiomem;
0270     }
0271
0272     /* This driver requires no hardware specific kernel code to handle
0273      * interrupts. Instead, the interrupt handler simply disables the
0274      * interrupt in the interrupt controller. User space is responsible
0275      * for performing hardware specific acknowledge and re-enabling of
0276      * the interrupt in the interrupt controller.
0277      *
0278      * Interrupt sharing is not supported.
0279      */
0280
0281     uioinfo->handler = uio_dmem_genirq_handler;
0282     uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol;
0283     uioinfo->open = uio_dmem_genirq_open;
0284     uioinfo->release = uio_dmem_genirq_release;
0285     uioinfo->priv = priv;
0286
0287     /* Enable Runtime PM for this device:
0288      * The device starts in suspended state to allow the hardware to be
0289      * turned off by default. The Runtime PM bus code should power on the
0290      * hardware and enable clocks at open().
0291      */
0292     pm_runtime_enable(&pdev->dev);
0293
0294     ret = devm_add_action_or_reset(&pdev->dev, uio_dmem_genirq_pm_disable, &pdev->dev);
0295     if (ret)
0296         return ret;
0297
0298     return devm_uio_register_device(&pdev->dev, priv->uioinfo);
0299 }
0300
0301 static int uio_dmem_genirq_runtime_nop(struct device *dev)
0302 {
0303     /* Runtime PM callback shared between ->runtime_suspend()
0304      * and ->runtime_resume(). Simply returns success.
0305      *
0306      * In this driver pm_runtime_get_sync() and pm_runtime_put_sync()
0307      * are used at open() and release() time. This allows the
0308      * Runtime PM code to turn off power to the device while the
0309      * device is unused, ie before open() and after release().
0310      *
0311      * This Runtime PM callback does not need to save or restore
0312      * any registers since user space is responsbile for hardware
0313      * register reinitialization after open().
0314      */
0315     return 0;
0316 }
0317
0318 static const struct dev_pm_ops uio_dmem_genirq_dev_pm_ops = {
0319     .runtime_suspend = uio_dmem_genirq_runtime_nop,
0320     .runtime_resume = uio_dmem_genirq_runtime_nop,
0321 };
0322
0323 #ifdef CONFIG_OF
0324 static const struct of_device_id uio_of_genirq_match[] = {
0325     { /* empty for now */ },
0326 };
0327 MODULE_DEVICE_TABLE(of, uio_of_genirq_match);
0328 #endif
0329
0330 static struct platform_driver uio_dmem_genirq = {
0331     .probe = uio_dmem_genirq_probe,
0332     .driver = {
0333         .name = DRIVER_NAME,
0334         .pm = &uio_dmem_genirq_dev_pm_ops,
0335         .of_match_table = of_match_ptr(uio_of_genirq_match),
0336     },
0337 };
0338
0339 module_platform_driver(uio_dmem_genirq);
0340
0341 MODULE_AUTHOR("Damian Hobson-Garcia");
0342 MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory.");
0343 MODULE_LICENSE("GPL v2");
0344 MODULE_ALIAS("platform:" DRIVER_NAME);