ufs/host/ufshci-dwc.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * UFS Host driver for Synopsys Designware Core
0004  *
0005  * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
0006  *
0007  * Authors: Joao Pinto <jpinto@synopsys.com>
0008  */
0009
0010 #ifndef _UFSHCI_DWC_H
0011 #define _UFSHCI_DWC_H
0012
0013 /* DWC HC UFSHCI specific Registers */
0014 enum dwc_specific_registers {
0015     DWC_UFS_REG_HCLKDIV = 0xFC,
0016 };
0017
0018 /* Clock Divider Values: Hex equivalent of frequency in MHz */
0019 enum clk_div_values {
0020     DWC_UFS_REG_HCLKDIV_DIV_62_5    = 0x3e,
0021     DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d,
0022     DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8,
0023 };
0024
0025 /* Selector Index */
0026 enum selector_index {
0027     SELIND_LN0_TX       = 0x00,
0028     SELIND_LN1_TX       = 0x01,
0029     SELIND_LN0_RX       = 0x04,
0030     SELIND_LN1_RX       = 0x05,
0031 };
0032
0033 #endif /* End of Header */