Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
0004  *
0005  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
0006  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
0007  *
0008  * This is mainly a variation of 8250.c, credits go to authors mentioned
0009  * therein.  In fact this driver should be merged into the generic 8250.c
0010  * infrastructure perhaps using a 8250_sparc.c module.
0011  *
0012  * Fixed to use tty_get_baud_rate().
0013  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
0014  *
0015  * Converted to new 2.5.x UART layer.
0016  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
0017  */
0018 
0019 #include <linux/module.h>
0020 #include <linux/kernel.h>
0021 #include <linux/spinlock.h>
0022 #include <linux/errno.h>
0023 #include <linux/tty.h>
0024 #include <linux/tty_flip.h>
0025 #include <linux/major.h>
0026 #include <linux/string.h>
0027 #include <linux/ptrace.h>
0028 #include <linux/ioport.h>
0029 #include <linux/circ_buf.h>
0030 #include <linux/serial.h>
0031 #include <linux/sysrq.h>
0032 #include <linux/console.h>
0033 #include <linux/slab.h>
0034 #ifdef CONFIG_SERIO
0035 #include <linux/serio.h>
0036 #endif
0037 #include <linux/serial_reg.h>
0038 #include <linux/init.h>
0039 #include <linux/delay.h>
0040 #include <linux/of_device.h>
0041 
0042 #include <linux/io.h>
0043 #include <asm/irq.h>
0044 #include <asm/prom.h>
0045 #include <asm/setup.h>
0046 
0047 #include <linux/serial_core.h>
0048 #include <linux/sunserialcore.h>
0049 
0050 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
0051  * in a UART clock of 1.8462 MHz.
0052  */
0053 #define SU_BASE_BAUD    (1846200 / 16)
0054 
0055 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
0056 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
0057 
0058 struct serial_uart_config {
0059     char    *name;
0060     int dfl_xmit_fifo_size;
0061     int flags;
0062 };
0063 
0064 /*
0065  * Here we define the default xmit fifo size used for each type of UART.
0066  */
0067 static const struct serial_uart_config uart_config[] = {
0068     { "unknown",    1,  0 },
0069     { "8250",   1,  0 },
0070     { "16450",  1,  0 },
0071     { "16550",  1,  0 },
0072     { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
0073     { "Cirrus", 1,  0 },
0074     { "ST16650",    1,  UART_CLEAR_FIFO | UART_STARTECH },
0075     { "ST16650V2",  32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
0076     { "TI16750",    64, UART_CLEAR_FIFO | UART_USE_FIFO },
0077     { "Startech",   1,  0 },
0078     { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
0079     { "ST16654",    64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
0080     { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
0081     { "RSA",    2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
0082 };
0083 
0084 struct uart_sunsu_port {
0085     struct uart_port    port;
0086     unsigned char       acr;
0087     unsigned char       ier;
0088     unsigned short      rev;
0089     unsigned char       lcr;
0090     unsigned int        lsr_break_flag;
0091     unsigned int        cflag;
0092 
0093     /* Probing information.  */
0094     enum su_type        su_type;
0095     unsigned int        type_probed;    /* XXX Stupid */
0096     unsigned long       reg_size;
0097 
0098 #ifdef CONFIG_SERIO
0099     struct serio        serio;
0100     int         serio_open;
0101 #endif
0102 };
0103 
0104 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
0105 {
0106     offset <<= up->port.regshift;
0107 
0108     switch (up->port.iotype) {
0109     case UPIO_HUB6:
0110         outb(up->port.hub6 - 1 + offset, up->port.iobase);
0111         return inb(up->port.iobase + 1);
0112 
0113     case UPIO_MEM:
0114         return readb(up->port.membase + offset);
0115 
0116     default:
0117         return inb(up->port.iobase + offset);
0118     }
0119 }
0120 
0121 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
0122 {
0123 #ifndef CONFIG_SPARC64
0124     /*
0125      * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
0126      * connected with a gate then go to SlavIO. When IRQ4 goes tristated
0127      * gate outputs a logical one. Since we use level triggered interrupts
0128      * we have lockup and watchdog reset. We cannot mask IRQ because
0129      * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
0130      * This problem is similar to what Alpha people suffer, see
0131      * 8250_alpha.c.
0132      */
0133     if (offset == UART_MCR)
0134         value |= UART_MCR_OUT2;
0135 #endif
0136     offset <<= up->port.regshift;
0137 
0138     switch (up->port.iotype) {
0139     case UPIO_HUB6:
0140         outb(up->port.hub6 - 1 + offset, up->port.iobase);
0141         outb(value, up->port.iobase + 1);
0142         break;
0143 
0144     case UPIO_MEM:
0145         writeb(value, up->port.membase + offset);
0146         break;
0147 
0148     default:
0149         outb(value, up->port.iobase + offset);
0150     }
0151 }
0152 
0153 /*
0154  * We used to support using pause I/O for certain machines.  We
0155  * haven't supported this for a while, but just in case it's badly
0156  * needed for certain old 386 machines, I've left these #define's
0157  * in....
0158  */
0159 #define serial_inp(up, offset)      serial_in(up, offset)
0160 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
0161 
0162 
0163 /*
0164  * For the 16C950
0165  */
0166 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
0167 {
0168     serial_out(up, UART_SCR, offset);
0169     serial_out(up, UART_ICR, value);
0170 }
0171 
0172 #if 0 /* Unused currently */
0173 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
0174 {
0175     unsigned int value;
0176 
0177     serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
0178     serial_out(up, UART_SCR, offset);
0179     value = serial_in(up, UART_ICR);
0180     serial_icr_write(up, UART_ACR, up->acr);
0181 
0182     return value;
0183 }
0184 #endif
0185 
0186 #ifdef CONFIG_SERIAL_8250_RSA
0187 /*
0188  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
0189  * We set the port uart clock rate if we succeed.
0190  */
0191 static int __enable_rsa(struct uart_sunsu_port *up)
0192 {
0193     unsigned char mode;
0194     int result;
0195 
0196     mode = serial_inp(up, UART_RSA_MSR);
0197     result = mode & UART_RSA_MSR_FIFO;
0198 
0199     if (!result) {
0200         serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
0201         mode = serial_inp(up, UART_RSA_MSR);
0202         result = mode & UART_RSA_MSR_FIFO;
0203     }
0204 
0205     if (result)
0206         up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
0207 
0208     return result;
0209 }
0210 
0211 static void enable_rsa(struct uart_sunsu_port *up)
0212 {
0213     if (up->port.type == PORT_RSA) {
0214         if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
0215             spin_lock_irq(&up->port.lock);
0216             __enable_rsa(up);
0217             spin_unlock_irq(&up->port.lock);
0218         }
0219         if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
0220             serial_outp(up, UART_RSA_FRR, 0);
0221     }
0222 }
0223 
0224 /*
0225  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
0226  * It is unknown why interrupts were disabled in here.  However,
0227  * the caller is expected to preserve this behaviour by grabbing
0228  * the spinlock before calling this function.
0229  */
0230 static void disable_rsa(struct uart_sunsu_port *up)
0231 {
0232     unsigned char mode;
0233     int result;
0234 
0235     if (up->port.type == PORT_RSA &&
0236         up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
0237         spin_lock_irq(&up->port.lock);
0238 
0239         mode = serial_inp(up, UART_RSA_MSR);
0240         result = !(mode & UART_RSA_MSR_FIFO);
0241 
0242         if (!result) {
0243             serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
0244             mode = serial_inp(up, UART_RSA_MSR);
0245             result = !(mode & UART_RSA_MSR_FIFO);
0246         }
0247 
0248         if (result)
0249             up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
0250         spin_unlock_irq(&up->port.lock);
0251     }
0252 }
0253 #endif /* CONFIG_SERIAL_8250_RSA */
0254 
0255 static inline void __stop_tx(struct uart_sunsu_port *p)
0256 {
0257     if (p->ier & UART_IER_THRI) {
0258         p->ier &= ~UART_IER_THRI;
0259         serial_out(p, UART_IER, p->ier);
0260     }
0261 }
0262 
0263 static void sunsu_stop_tx(struct uart_port *port)
0264 {
0265     struct uart_sunsu_port *up =
0266         container_of(port, struct uart_sunsu_port, port);
0267 
0268     __stop_tx(up);
0269 
0270     /*
0271      * We really want to stop the transmitter from sending.
0272      */
0273     if (up->port.type == PORT_16C950) {
0274         up->acr |= UART_ACR_TXDIS;
0275         serial_icr_write(up, UART_ACR, up->acr);
0276     }
0277 }
0278 
0279 static void sunsu_start_tx(struct uart_port *port)
0280 {
0281     struct uart_sunsu_port *up =
0282         container_of(port, struct uart_sunsu_port, port);
0283 
0284     if (!(up->ier & UART_IER_THRI)) {
0285         up->ier |= UART_IER_THRI;
0286         serial_out(up, UART_IER, up->ier);
0287     }
0288 
0289     /*
0290      * Re-enable the transmitter if we disabled it.
0291      */
0292     if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
0293         up->acr &= ~UART_ACR_TXDIS;
0294         serial_icr_write(up, UART_ACR, up->acr);
0295     }
0296 }
0297 
0298 static void sunsu_stop_rx(struct uart_port *port)
0299 {
0300     struct uart_sunsu_port *up =
0301         container_of(port, struct uart_sunsu_port, port);
0302 
0303     up->ier &= ~UART_IER_RLSI;
0304     up->port.read_status_mask &= ~UART_LSR_DR;
0305     serial_out(up, UART_IER, up->ier);
0306 }
0307 
0308 static void sunsu_enable_ms(struct uart_port *port)
0309 {
0310     struct uart_sunsu_port *up =
0311         container_of(port, struct uart_sunsu_port, port);
0312     unsigned long flags;
0313 
0314     spin_lock_irqsave(&up->port.lock, flags);
0315     up->ier |= UART_IER_MSI;
0316     serial_out(up, UART_IER, up->ier);
0317     spin_unlock_irqrestore(&up->port.lock, flags);
0318 }
0319 
0320 static void
0321 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
0322 {
0323     struct tty_port *port = &up->port.state->port;
0324     unsigned char ch, flag;
0325     int max_count = 256;
0326     int saw_console_brk = 0;
0327 
0328     do {
0329         ch = serial_inp(up, UART_RX);
0330         flag = TTY_NORMAL;
0331         up->port.icount.rx++;
0332 
0333         if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
0334                        UART_LSR_FE | UART_LSR_OE))) {
0335             /*
0336              * For statistics only
0337              */
0338             if (*status & UART_LSR_BI) {
0339                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
0340                 up->port.icount.brk++;
0341                 if (up->port.cons != NULL &&
0342                     up->port.line == up->port.cons->index)
0343                     saw_console_brk = 1;
0344                 /*
0345                  * We do the SysRQ and SAK checking
0346                  * here because otherwise the break
0347                  * may get masked by ignore_status_mask
0348                  * or read_status_mask.
0349                  */
0350                 if (uart_handle_break(&up->port))
0351                     goto ignore_char;
0352             } else if (*status & UART_LSR_PE)
0353                 up->port.icount.parity++;
0354             else if (*status & UART_LSR_FE)
0355                 up->port.icount.frame++;
0356             if (*status & UART_LSR_OE)
0357                 up->port.icount.overrun++;
0358 
0359             /*
0360              * Mask off conditions which should be ingored.
0361              */
0362             *status &= up->port.read_status_mask;
0363 
0364             if (up->port.cons != NULL &&
0365                 up->port.line == up->port.cons->index) {
0366                 /* Recover the break flag from console xmit */
0367                 *status |= up->lsr_break_flag;
0368                 up->lsr_break_flag = 0;
0369             }
0370 
0371             if (*status & UART_LSR_BI) {
0372                 flag = TTY_BREAK;
0373             } else if (*status & UART_LSR_PE)
0374                 flag = TTY_PARITY;
0375             else if (*status & UART_LSR_FE)
0376                 flag = TTY_FRAME;
0377         }
0378         if (uart_handle_sysrq_char(&up->port, ch))
0379             goto ignore_char;
0380         if ((*status & up->port.ignore_status_mask) == 0)
0381             tty_insert_flip_char(port, ch, flag);
0382         if (*status & UART_LSR_OE)
0383             /*
0384              * Overrun is special, since it's reported
0385              * immediately, and doesn't affect the current
0386              * character.
0387              */
0388              tty_insert_flip_char(port, 0, TTY_OVERRUN);
0389     ignore_char:
0390         *status = serial_inp(up, UART_LSR);
0391     } while ((*status & UART_LSR_DR) && (max_count-- > 0));
0392 
0393     if (saw_console_brk)
0394         sun_do_break();
0395 }
0396 
0397 static void transmit_chars(struct uart_sunsu_port *up)
0398 {
0399     struct circ_buf *xmit = &up->port.state->xmit;
0400     int count;
0401 
0402     if (up->port.x_char) {
0403         serial_outp(up, UART_TX, up->port.x_char);
0404         up->port.icount.tx++;
0405         up->port.x_char = 0;
0406         return;
0407     }
0408     if (uart_tx_stopped(&up->port)) {
0409         sunsu_stop_tx(&up->port);
0410         return;
0411     }
0412     if (uart_circ_empty(xmit)) {
0413         __stop_tx(up);
0414         return;
0415     }
0416 
0417     count = up->port.fifosize;
0418     do {
0419         serial_out(up, UART_TX, xmit->buf[xmit->tail]);
0420         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0421         up->port.icount.tx++;
0422         if (uart_circ_empty(xmit))
0423             break;
0424     } while (--count > 0);
0425 
0426     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0427         uart_write_wakeup(&up->port);
0428 
0429     if (uart_circ_empty(xmit))
0430         __stop_tx(up);
0431 }
0432 
0433 static void check_modem_status(struct uart_sunsu_port *up)
0434 {
0435     int status;
0436 
0437     status = serial_in(up, UART_MSR);
0438 
0439     if ((status & UART_MSR_ANY_DELTA) == 0)
0440         return;
0441 
0442     if (status & UART_MSR_TERI)
0443         up->port.icount.rng++;
0444     if (status & UART_MSR_DDSR)
0445         up->port.icount.dsr++;
0446     if (status & UART_MSR_DDCD)
0447         uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
0448     if (status & UART_MSR_DCTS)
0449         uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
0450 
0451     wake_up_interruptible(&up->port.state->port.delta_msr_wait);
0452 }
0453 
0454 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
0455 {
0456     struct uart_sunsu_port *up = dev_id;
0457     unsigned long flags;
0458     unsigned char status;
0459 
0460     spin_lock_irqsave(&up->port.lock, flags);
0461 
0462     do {
0463         status = serial_inp(up, UART_LSR);
0464         if (status & UART_LSR_DR)
0465             receive_chars(up, &status);
0466         check_modem_status(up);
0467         if (status & UART_LSR_THRE)
0468             transmit_chars(up);
0469 
0470         tty_flip_buffer_push(&up->port.state->port);
0471 
0472     } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
0473 
0474     spin_unlock_irqrestore(&up->port.lock, flags);
0475 
0476     return IRQ_HANDLED;
0477 }
0478 
0479 /* Separate interrupt handling path for keyboard/mouse ports.  */
0480 
0481 static void
0482 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
0483            unsigned int iflag, unsigned int quot);
0484 
0485 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
0486 {
0487     unsigned int cur_cflag = up->cflag;
0488     int quot, new_baud;
0489 
0490     up->cflag &= ~CBAUD;
0491     up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
0492 
0493     quot = up->port.uartclk / (16 * new_baud);
0494 
0495     sunsu_change_speed(&up->port, up->cflag, 0, quot);
0496 }
0497 
0498 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
0499 {
0500     do {
0501         unsigned char ch = serial_inp(up, UART_RX);
0502 
0503         /* Stop-A is handled by drivers/char/keyboard.c now. */
0504         if (up->su_type == SU_PORT_KBD) {
0505 #ifdef CONFIG_SERIO
0506             serio_interrupt(&up->serio, ch, 0);
0507 #endif
0508         } else if (up->su_type == SU_PORT_MS) {
0509             int ret = suncore_mouse_baud_detection(ch, is_break);
0510 
0511             switch (ret) {
0512             case 2:
0513                 sunsu_change_mouse_baud(up);
0514                 fallthrough;
0515             case 1:
0516                 break;
0517 
0518             case 0:
0519 #ifdef CONFIG_SERIO
0520                 serio_interrupt(&up->serio, ch, 0);
0521 #endif
0522                 break;
0523             }
0524         }
0525     } while (serial_in(up, UART_LSR) & UART_LSR_DR);
0526 }
0527 
0528 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
0529 {
0530     struct uart_sunsu_port *up = dev_id;
0531 
0532     if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
0533         unsigned char status = serial_inp(up, UART_LSR);
0534 
0535         if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
0536             receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
0537     }
0538 
0539     return IRQ_HANDLED;
0540 }
0541 
0542 static unsigned int sunsu_tx_empty(struct uart_port *port)
0543 {
0544     struct uart_sunsu_port *up =
0545         container_of(port, struct uart_sunsu_port, port);
0546     unsigned long flags;
0547     unsigned int ret;
0548 
0549     spin_lock_irqsave(&up->port.lock, flags);
0550     ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
0551     spin_unlock_irqrestore(&up->port.lock, flags);
0552 
0553     return ret;
0554 }
0555 
0556 static unsigned int sunsu_get_mctrl(struct uart_port *port)
0557 {
0558     struct uart_sunsu_port *up =
0559         container_of(port, struct uart_sunsu_port, port);
0560     unsigned char status;
0561     unsigned int ret;
0562 
0563     status = serial_in(up, UART_MSR);
0564 
0565     ret = 0;
0566     if (status & UART_MSR_DCD)
0567         ret |= TIOCM_CAR;
0568     if (status & UART_MSR_RI)
0569         ret |= TIOCM_RNG;
0570     if (status & UART_MSR_DSR)
0571         ret |= TIOCM_DSR;
0572     if (status & UART_MSR_CTS)
0573         ret |= TIOCM_CTS;
0574     return ret;
0575 }
0576 
0577 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
0578 {
0579     struct uart_sunsu_port *up =
0580         container_of(port, struct uart_sunsu_port, port);
0581     unsigned char mcr = 0;
0582 
0583     if (mctrl & TIOCM_RTS)
0584         mcr |= UART_MCR_RTS;
0585     if (mctrl & TIOCM_DTR)
0586         mcr |= UART_MCR_DTR;
0587     if (mctrl & TIOCM_OUT1)
0588         mcr |= UART_MCR_OUT1;
0589     if (mctrl & TIOCM_OUT2)
0590         mcr |= UART_MCR_OUT2;
0591     if (mctrl & TIOCM_LOOP)
0592         mcr |= UART_MCR_LOOP;
0593 
0594     serial_out(up, UART_MCR, mcr);
0595 }
0596 
0597 static void sunsu_break_ctl(struct uart_port *port, int break_state)
0598 {
0599     struct uart_sunsu_port *up =
0600         container_of(port, struct uart_sunsu_port, port);
0601     unsigned long flags;
0602 
0603     spin_lock_irqsave(&up->port.lock, flags);
0604     if (break_state == -1)
0605         up->lcr |= UART_LCR_SBC;
0606     else
0607         up->lcr &= ~UART_LCR_SBC;
0608     serial_out(up, UART_LCR, up->lcr);
0609     spin_unlock_irqrestore(&up->port.lock, flags);
0610 }
0611 
0612 static int sunsu_startup(struct uart_port *port)
0613 {
0614     struct uart_sunsu_port *up =
0615         container_of(port, struct uart_sunsu_port, port);
0616     unsigned long flags;
0617     int retval;
0618 
0619     if (up->port.type == PORT_16C950) {
0620         /* Wake up and initialize UART */
0621         up->acr = 0;
0622         serial_outp(up, UART_LCR, 0xBF);
0623         serial_outp(up, UART_EFR, UART_EFR_ECB);
0624         serial_outp(up, UART_IER, 0);
0625         serial_outp(up, UART_LCR, 0);
0626         serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
0627         serial_outp(up, UART_LCR, 0xBF);
0628         serial_outp(up, UART_EFR, UART_EFR_ECB);
0629         serial_outp(up, UART_LCR, 0);
0630     }
0631 
0632 #ifdef CONFIG_SERIAL_8250_RSA
0633     /*
0634      * If this is an RSA port, see if we can kick it up to the
0635      * higher speed clock.
0636      */
0637     enable_rsa(up);
0638 #endif
0639 
0640     /*
0641      * Clear the FIFO buffers and disable them.
0642      * (they will be reenabled in set_termios())
0643      */
0644     if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
0645         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
0646         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
0647                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
0648         serial_outp(up, UART_FCR, 0);
0649     }
0650 
0651     /*
0652      * Clear the interrupt registers.
0653      */
0654     (void) serial_inp(up, UART_LSR);
0655     (void) serial_inp(up, UART_RX);
0656     (void) serial_inp(up, UART_IIR);
0657     (void) serial_inp(up, UART_MSR);
0658 
0659     /*
0660      * At this point, there's no way the LSR could still be 0xff;
0661      * if it is, then bail out, because there's likely no UART
0662      * here.
0663      */
0664     if (!(up->port.flags & UPF_BUGGY_UART) &&
0665         (serial_inp(up, UART_LSR) == 0xff)) {
0666         printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
0667         return -ENODEV;
0668     }
0669 
0670     if (up->su_type != SU_PORT_PORT) {
0671         retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
0672                      IRQF_SHARED, su_typev[up->su_type], up);
0673     } else {
0674         retval = request_irq(up->port.irq, sunsu_serial_interrupt,
0675                      IRQF_SHARED, su_typev[up->su_type], up);
0676     }
0677     if (retval) {
0678         printk("su: Cannot register IRQ %d\n", up->port.irq);
0679         return retval;
0680     }
0681 
0682     /*
0683      * Now, initialize the UART
0684      */
0685     serial_outp(up, UART_LCR, UART_LCR_WLEN8);
0686 
0687     spin_lock_irqsave(&up->port.lock, flags);
0688 
0689     up->port.mctrl |= TIOCM_OUT2;
0690 
0691     sunsu_set_mctrl(&up->port, up->port.mctrl);
0692     spin_unlock_irqrestore(&up->port.lock, flags);
0693 
0694     /*
0695      * Finally, enable interrupts.  Note: Modem status interrupts
0696      * are set via set_termios(), which will be occurring imminently
0697      * anyway, so we don't enable them here.
0698      */
0699     up->ier = UART_IER_RLSI | UART_IER_RDI;
0700     serial_outp(up, UART_IER, up->ier);
0701 
0702     if (up->port.flags & UPF_FOURPORT) {
0703         unsigned int icp;
0704         /*
0705          * Enable interrupts on the AST Fourport board
0706          */
0707         icp = (up->port.iobase & 0xfe0) | 0x01f;
0708         outb_p(0x80, icp);
0709         (void) inb_p(icp);
0710     }
0711 
0712     /*
0713      * And clear the interrupt registers again for luck.
0714      */
0715     (void) serial_inp(up, UART_LSR);
0716     (void) serial_inp(up, UART_RX);
0717     (void) serial_inp(up, UART_IIR);
0718     (void) serial_inp(up, UART_MSR);
0719 
0720     return 0;
0721 }
0722 
0723 static void sunsu_shutdown(struct uart_port *port)
0724 {
0725     struct uart_sunsu_port *up =
0726         container_of(port, struct uart_sunsu_port, port);
0727     unsigned long flags;
0728 
0729     /*
0730      * Disable interrupts from this port
0731      */
0732     up->ier = 0;
0733     serial_outp(up, UART_IER, 0);
0734 
0735     spin_lock_irqsave(&up->port.lock, flags);
0736     if (up->port.flags & UPF_FOURPORT) {
0737         /* reset interrupts on the AST Fourport board */
0738         inb((up->port.iobase & 0xfe0) | 0x1f);
0739         up->port.mctrl |= TIOCM_OUT1;
0740     } else
0741         up->port.mctrl &= ~TIOCM_OUT2;
0742 
0743     sunsu_set_mctrl(&up->port, up->port.mctrl);
0744     spin_unlock_irqrestore(&up->port.lock, flags);
0745 
0746     /*
0747      * Disable break condition and FIFOs
0748      */
0749     serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
0750     serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
0751                   UART_FCR_CLEAR_RCVR |
0752                   UART_FCR_CLEAR_XMIT);
0753     serial_outp(up, UART_FCR, 0);
0754 
0755 #ifdef CONFIG_SERIAL_8250_RSA
0756     /*
0757      * Reset the RSA board back to 115kbps compat mode.
0758      */
0759     disable_rsa(up);
0760 #endif
0761 
0762     /*
0763      * Read data port to reset things.
0764      */
0765     (void) serial_in(up, UART_RX);
0766 
0767     free_irq(up->port.irq, up);
0768 }
0769 
0770 static void
0771 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
0772            unsigned int iflag, unsigned int quot)
0773 {
0774     struct uart_sunsu_port *up =
0775         container_of(port, struct uart_sunsu_port, port);
0776     unsigned char cval, fcr = 0;
0777     unsigned long flags;
0778 
0779     switch (cflag & CSIZE) {
0780     case CS5:
0781         cval = 0x00;
0782         break;
0783     case CS6:
0784         cval = 0x01;
0785         break;
0786     case CS7:
0787         cval = 0x02;
0788         break;
0789     default:
0790     case CS8:
0791         cval = 0x03;
0792         break;
0793     }
0794 
0795     if (cflag & CSTOPB)
0796         cval |= 0x04;
0797     if (cflag & PARENB)
0798         cval |= UART_LCR_PARITY;
0799     if (!(cflag & PARODD))
0800         cval |= UART_LCR_EPAR;
0801     if (cflag & CMSPAR)
0802         cval |= UART_LCR_SPAR;
0803 
0804     /*
0805      * Work around a bug in the Oxford Semiconductor 952 rev B
0806      * chip which causes it to seriously miscalculate baud rates
0807      * when DLL is 0.
0808      */
0809     if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
0810         up->rev == 0x5201)
0811         quot ++;
0812 
0813     if (uart_config[up->port.type].flags & UART_USE_FIFO) {
0814         if ((up->port.uartclk / quot) < (2400 * 16))
0815             fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
0816 #ifdef CONFIG_SERIAL_8250_RSA
0817         else if (up->port.type == PORT_RSA)
0818             fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
0819 #endif
0820         else
0821             fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
0822     }
0823     if (up->port.type == PORT_16750)
0824         fcr |= UART_FCR7_64BYTE;
0825 
0826     /*
0827      * Ok, we're now changing the port state.  Do it with
0828      * interrupts disabled.
0829      */
0830     spin_lock_irqsave(&up->port.lock, flags);
0831 
0832     /*
0833      * Update the per-port timeout.
0834      */
0835     uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
0836 
0837     up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
0838     if (iflag & INPCK)
0839         up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
0840     if (iflag & (IGNBRK | BRKINT | PARMRK))
0841         up->port.read_status_mask |= UART_LSR_BI;
0842 
0843     /*
0844      * Characteres to ignore
0845      */
0846     up->port.ignore_status_mask = 0;
0847     if (iflag & IGNPAR)
0848         up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
0849     if (iflag & IGNBRK) {
0850         up->port.ignore_status_mask |= UART_LSR_BI;
0851         /*
0852          * If we're ignoring parity and break indicators,
0853          * ignore overruns too (for real raw support).
0854          */
0855         if (iflag & IGNPAR)
0856             up->port.ignore_status_mask |= UART_LSR_OE;
0857     }
0858 
0859     /*
0860      * ignore all characters if CREAD is not set
0861      */
0862     if ((cflag & CREAD) == 0)
0863         up->port.ignore_status_mask |= UART_LSR_DR;
0864 
0865     /*
0866      * CTS flow control flag and modem status interrupts
0867      */
0868     up->ier &= ~UART_IER_MSI;
0869     if (UART_ENABLE_MS(&up->port, cflag))
0870         up->ier |= UART_IER_MSI;
0871 
0872     serial_out(up, UART_IER, up->ier);
0873 
0874     if (uart_config[up->port.type].flags & UART_STARTECH) {
0875         serial_outp(up, UART_LCR, 0xBF);
0876         serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
0877     }
0878     serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
0879     serial_outp(up, UART_DLL, quot & 0xff);     /* LS of divisor */
0880     serial_outp(up, UART_DLM, quot >> 8);       /* MS of divisor */
0881     if (up->port.type == PORT_16750)
0882         serial_outp(up, UART_FCR, fcr);     /* set fcr */
0883     serial_outp(up, UART_LCR, cval);        /* reset DLAB */
0884     up->lcr = cval;                 /* Save LCR */
0885     if (up->port.type != PORT_16750) {
0886         if (fcr & UART_FCR_ENABLE_FIFO) {
0887             /* emulated UARTs (Lucent Venus 167x) need two steps */
0888             serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
0889         }
0890         serial_outp(up, UART_FCR, fcr);     /* set fcr */
0891     }
0892 
0893     up->cflag = cflag;
0894 
0895     spin_unlock_irqrestore(&up->port.lock, flags);
0896 }
0897 
0898 static void
0899 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
0900           struct ktermios *old)
0901 {
0902     unsigned int baud, quot;
0903 
0904     /*
0905      * Ask the core to calculate the divisor for us.
0906      */
0907     baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
0908     quot = uart_get_divisor(port, baud);
0909 
0910     sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
0911 }
0912 
0913 static void sunsu_release_port(struct uart_port *port)
0914 {
0915 }
0916 
0917 static int sunsu_request_port(struct uart_port *port)
0918 {
0919     return 0;
0920 }
0921 
0922 static void sunsu_config_port(struct uart_port *port, int flags)
0923 {
0924     struct uart_sunsu_port *up =
0925         container_of(port, struct uart_sunsu_port, port);
0926 
0927     if (flags & UART_CONFIG_TYPE) {
0928         /*
0929          * We are supposed to call autoconfig here, but this requires
0930          * splitting all the OBP probing crap from the UART probing.
0931          * We'll do it when we kill sunsu.c altogether.
0932          */
0933         port->type = up->type_probed;   /* XXX */
0934     }
0935 }
0936 
0937 static int
0938 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
0939 {
0940     return -EINVAL;
0941 }
0942 
0943 static const char *
0944 sunsu_type(struct uart_port *port)
0945 {
0946     int type = port->type;
0947 
0948     if (type >= ARRAY_SIZE(uart_config))
0949         type = 0;
0950     return uart_config[type].name;
0951 }
0952 
0953 static const struct uart_ops sunsu_pops = {
0954     .tx_empty   = sunsu_tx_empty,
0955     .set_mctrl  = sunsu_set_mctrl,
0956     .get_mctrl  = sunsu_get_mctrl,
0957     .stop_tx    = sunsu_stop_tx,
0958     .start_tx   = sunsu_start_tx,
0959     .stop_rx    = sunsu_stop_rx,
0960     .enable_ms  = sunsu_enable_ms,
0961     .break_ctl  = sunsu_break_ctl,
0962     .startup    = sunsu_startup,
0963     .shutdown   = sunsu_shutdown,
0964     .set_termios    = sunsu_set_termios,
0965     .type       = sunsu_type,
0966     .release_port   = sunsu_release_port,
0967     .request_port   = sunsu_request_port,
0968     .config_port    = sunsu_config_port,
0969     .verify_port    = sunsu_verify_port,
0970 };
0971 
0972 #define UART_NR 4
0973 
0974 static struct uart_sunsu_port sunsu_ports[UART_NR];
0975 static int nr_inst; /* Number of already registered ports */
0976 
0977 #ifdef CONFIG_SERIO
0978 
0979 static DEFINE_SPINLOCK(sunsu_serio_lock);
0980 
0981 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
0982 {
0983     struct uart_sunsu_port *up = serio->port_data;
0984     unsigned long flags;
0985     int lsr;
0986 
0987     spin_lock_irqsave(&sunsu_serio_lock, flags);
0988 
0989     do {
0990         lsr = serial_in(up, UART_LSR);
0991     } while (!(lsr & UART_LSR_THRE));
0992 
0993     /* Send the character out. */
0994     serial_out(up, UART_TX, ch);
0995 
0996     spin_unlock_irqrestore(&sunsu_serio_lock, flags);
0997 
0998     return 0;
0999 }
1000 
1001 static int sunsu_serio_open(struct serio *serio)
1002 {
1003     struct uart_sunsu_port *up = serio->port_data;
1004     unsigned long flags;
1005     int ret;
1006 
1007     spin_lock_irqsave(&sunsu_serio_lock, flags);
1008     if (!up->serio_open) {
1009         up->serio_open = 1;
1010         ret = 0;
1011     } else
1012         ret = -EBUSY;
1013     spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1014 
1015     return ret;
1016 }
1017 
1018 static void sunsu_serio_close(struct serio *serio)
1019 {
1020     struct uart_sunsu_port *up = serio->port_data;
1021     unsigned long flags;
1022 
1023     spin_lock_irqsave(&sunsu_serio_lock, flags);
1024     up->serio_open = 0;
1025     spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1026 }
1027 
1028 #endif /* CONFIG_SERIO */
1029 
1030 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1031 {
1032     unsigned char status1, status2, scratch, scratch2, scratch3;
1033     unsigned char save_lcr, save_mcr;
1034     unsigned long flags;
1035 
1036     if (up->su_type == SU_PORT_NONE)
1037         return;
1038 
1039     up->type_probed = PORT_UNKNOWN;
1040     up->port.iotype = UPIO_MEM;
1041 
1042     spin_lock_irqsave(&up->port.lock, flags);
1043 
1044     if (!(up->port.flags & UPF_BUGGY_UART)) {
1045         /*
1046          * Do a simple existence test first; if we fail this, there's
1047          * no point trying anything else.
1048          *
1049          * 0x80 is used as a nonsense port to prevent against false
1050          * positives due to ISA bus float.  The assumption is that
1051          * 0x80 is a non-existent port; which should be safe since
1052          * include/asm/io.h also makes this assumption.
1053          */
1054         scratch = serial_inp(up, UART_IER);
1055         serial_outp(up, UART_IER, 0);
1056 #ifdef __i386__
1057         outb(0xff, 0x080);
1058 #endif
1059         scratch2 = serial_inp(up, UART_IER);
1060         serial_outp(up, UART_IER, 0x0f);
1061 #ifdef __i386__
1062         outb(0, 0x080);
1063 #endif
1064         scratch3 = serial_inp(up, UART_IER);
1065         serial_outp(up, UART_IER, scratch);
1066         if (scratch2 != 0 || scratch3 != 0x0F)
1067             goto out;   /* We failed; there's nothing here */
1068     }
1069 
1070     save_mcr = serial_in(up, UART_MCR);
1071     save_lcr = serial_in(up, UART_LCR);
1072 
1073     /* 
1074      * Check to see if a UART is really there.  Certain broken
1075      * internal modems based on the Rockwell chipset fail this
1076      * test, because they apparently don't implement the loopback
1077      * test mode.  So this test is skipped on the COM 1 through
1078      * COM 4 ports.  This *should* be safe, since no board
1079      * manufacturer would be stupid enough to design a board
1080      * that conflicts with COM 1-4 --- we hope!
1081      */
1082     if (!(up->port.flags & UPF_SKIP_TEST)) {
1083         serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1084         status1 = serial_inp(up, UART_MSR) & 0xF0;
1085         serial_outp(up, UART_MCR, save_mcr);
1086         if (status1 != 0x90)
1087             goto out;   /* We failed loopback test */
1088     }
1089     serial_outp(up, UART_LCR, 0xBF);    /* set up for StarTech test */
1090     serial_outp(up, UART_EFR, 0);       /* EFR is the same as FCR */
1091     serial_outp(up, UART_LCR, 0);
1092     serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1093     scratch = serial_in(up, UART_IIR) >> 6;
1094     switch (scratch) {
1095         case 0:
1096             up->port.type = PORT_16450;
1097             break;
1098         case 1:
1099             up->port.type = PORT_UNKNOWN;
1100             break;
1101         case 2:
1102             up->port.type = PORT_16550;
1103             break;
1104         case 3:
1105             up->port.type = PORT_16550A;
1106             break;
1107     }
1108     if (up->port.type == PORT_16550A) {
1109         /* Check for Startech UART's */
1110         serial_outp(up, UART_LCR, UART_LCR_DLAB);
1111         if (serial_in(up, UART_EFR) == 0) {
1112             up->port.type = PORT_16650;
1113         } else {
1114             serial_outp(up, UART_LCR, 0xBF);
1115             if (serial_in(up, UART_EFR) == 0)
1116                 up->port.type = PORT_16650V2;
1117         }
1118     }
1119     if (up->port.type == PORT_16550A) {
1120         /* Check for TI 16750 */
1121         serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1122         serial_outp(up, UART_FCR,
1123                 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1124         scratch = serial_in(up, UART_IIR) >> 5;
1125         if (scratch == 7) {
1126             /*
1127              * If this is a 16750, and not a cheap UART
1128              * clone, then it should only go into 64 byte
1129              * mode if the UART_FCR7_64BYTE bit was set
1130              * while UART_LCR_DLAB was latched.
1131              */
1132             serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1133             serial_outp(up, UART_LCR, 0);
1134             serial_outp(up, UART_FCR,
1135                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1136             scratch = serial_in(up, UART_IIR) >> 5;
1137             if (scratch == 6)
1138                 up->port.type = PORT_16750;
1139         }
1140         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1141     }
1142     serial_outp(up, UART_LCR, save_lcr);
1143     if (up->port.type == PORT_16450) {
1144         scratch = serial_in(up, UART_SCR);
1145         serial_outp(up, UART_SCR, 0xa5);
1146         status1 = serial_in(up, UART_SCR);
1147         serial_outp(up, UART_SCR, 0x5a);
1148         status2 = serial_in(up, UART_SCR);
1149         serial_outp(up, UART_SCR, scratch);
1150 
1151         if ((status1 != 0xa5) || (status2 != 0x5a))
1152             up->port.type = PORT_8250;
1153     }
1154 
1155     up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1156 
1157     if (up->port.type == PORT_UNKNOWN)
1158         goto out;
1159     up->type_probed = up->port.type;    /* XXX */
1160 
1161     /*
1162      * Reset the UART.
1163      */
1164 #ifdef CONFIG_SERIAL_8250_RSA
1165     if (up->port.type == PORT_RSA)
1166         serial_outp(up, UART_RSA_FRR, 0);
1167 #endif
1168     serial_outp(up, UART_MCR, save_mcr);
1169     serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1170                      UART_FCR_CLEAR_RCVR |
1171                      UART_FCR_CLEAR_XMIT));
1172     serial_outp(up, UART_FCR, 0);
1173     (void)serial_in(up, UART_RX);
1174     serial_outp(up, UART_IER, 0);
1175 
1176 out:
1177     spin_unlock_irqrestore(&up->port.lock, flags);
1178 }
1179 
1180 static struct uart_driver sunsu_reg = {
1181     .owner          = THIS_MODULE,
1182     .driver_name        = "sunsu",
1183     .dev_name       = "ttyS",
1184     .major          = TTY_MAJOR,
1185 };
1186 
1187 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1188 {
1189     int quot, baud;
1190 #ifdef CONFIG_SERIO
1191     struct serio *serio;
1192 #endif
1193 
1194     if (up->su_type == SU_PORT_KBD) {
1195         up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1196         baud = 1200;
1197     } else {
1198         up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1199         baud = 4800;
1200     }
1201     quot = up->port.uartclk / (16 * baud);
1202 
1203     sunsu_autoconfig(up);
1204     if (up->port.type == PORT_UNKNOWN)
1205         return -ENODEV;
1206 
1207     printk("%pOF: %s port at %llx, irq %u\n",
1208            up->port.dev->of_node,
1209            (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1210            (unsigned long long) up->port.mapbase,
1211            up->port.irq);
1212 
1213 #ifdef CONFIG_SERIO
1214     serio = &up->serio;
1215     serio->port_data = up;
1216 
1217     serio->id.type = SERIO_RS232;
1218     if (up->su_type == SU_PORT_KBD) {
1219         serio->id.proto = SERIO_SUNKBD;
1220         strlcpy(serio->name, "sukbd", sizeof(serio->name));
1221     } else {
1222         serio->id.proto = SERIO_SUN;
1223         serio->id.extra = 1;
1224         strlcpy(serio->name, "sums", sizeof(serio->name));
1225     }
1226     strlcpy(serio->phys,
1227         (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1228         sizeof(serio->phys));
1229 
1230     serio->write = sunsu_serio_write;
1231     serio->open = sunsu_serio_open;
1232     serio->close = sunsu_serio_close;
1233     serio->dev.parent = up->port.dev;
1234 
1235     serio_register_port(serio);
1236 #endif
1237 
1238     sunsu_change_speed(&up->port, up->cflag, 0, quot);
1239 
1240     sunsu_startup(&up->port);
1241     return 0;
1242 }
1243 
1244 /*
1245  * ------------------------------------------------------------
1246  * Serial console driver
1247  * ------------------------------------------------------------
1248  */
1249 
1250 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1251 
1252 /*
1253  *  Wait for transmitter & holding register to empty
1254  */
1255 static void wait_for_xmitr(struct uart_sunsu_port *up)
1256 {
1257     unsigned int status, tmout = 10000;
1258 
1259     /* Wait up to 10ms for the character(s) to be sent. */
1260     do {
1261         status = serial_in(up, UART_LSR);
1262 
1263         if (status & UART_LSR_BI)
1264             up->lsr_break_flag = UART_LSR_BI;
1265 
1266         if (--tmout == 0)
1267             break;
1268         udelay(1);
1269     } while (!uart_lsr_tx_empty(status));
1270 
1271     /* Wait up to 1s for flow control if necessary */
1272     if (up->port.flags & UPF_CONS_FLOW) {
1273         tmout = 1000000;
1274         while (--tmout &&
1275                ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1276             udelay(1);
1277     }
1278 }
1279 
1280 static void sunsu_console_putchar(struct uart_port *port, unsigned char ch)
1281 {
1282     struct uart_sunsu_port *up =
1283         container_of(port, struct uart_sunsu_port, port);
1284 
1285     wait_for_xmitr(up);
1286     serial_out(up, UART_TX, ch);
1287 }
1288 
1289 /*
1290  *  Print a string to the serial port trying not to disturb
1291  *  any possible real use of the port...
1292  */
1293 static void sunsu_console_write(struct console *co, const char *s,
1294                 unsigned int count)
1295 {
1296     struct uart_sunsu_port *up = &sunsu_ports[co->index];
1297     unsigned long flags;
1298     unsigned int ier;
1299     int locked = 1;
1300 
1301     if (up->port.sysrq || oops_in_progress)
1302         locked = spin_trylock_irqsave(&up->port.lock, flags);
1303     else
1304         spin_lock_irqsave(&up->port.lock, flags);
1305 
1306     /*
1307      *  First save the UER then disable the interrupts
1308      */
1309     ier = serial_in(up, UART_IER);
1310     serial_out(up, UART_IER, 0);
1311 
1312     uart_console_write(&up->port, s, count, sunsu_console_putchar);
1313 
1314     /*
1315      *  Finally, wait for transmitter to become empty
1316      *  and restore the IER
1317      */
1318     wait_for_xmitr(up);
1319     serial_out(up, UART_IER, ier);
1320 
1321     if (locked)
1322         spin_unlock_irqrestore(&up->port.lock, flags);
1323 }
1324 
1325 /*
1326  *  Setup initial baud/bits/parity. We do two things here:
1327  *  - construct a cflag setting for the first su_open()
1328  *  - initialize the serial port
1329  *  Return non-zero if we didn't find a serial port.
1330  */
1331 static int __init sunsu_console_setup(struct console *co, char *options)
1332 {
1333     static struct ktermios dummy;
1334     struct ktermios termios;
1335     struct uart_port *port;
1336 
1337     printk("Console: ttyS%d (SU)\n",
1338            (sunsu_reg.minor - 64) + co->index);
1339 
1340     if (co->index > nr_inst)
1341         return -ENODEV;
1342     port = &sunsu_ports[co->index].port;
1343 
1344     /*
1345      * Temporary fix.
1346      */
1347     spin_lock_init(&port->lock);
1348 
1349     /* Get firmware console settings.  */
1350     sunserial_console_termios(co, port->dev->of_node);
1351 
1352     memset(&termios, 0, sizeof(struct ktermios));
1353     termios.c_cflag = co->cflag;
1354     port->mctrl |= TIOCM_DTR;
1355     port->ops->set_termios(port, &termios, &dummy);
1356 
1357     return 0;
1358 }
1359 
1360 static struct console sunsu_console = {
1361     .name   =   "ttyS",
1362     .write  =   sunsu_console_write,
1363     .device =   uart_console_device,
1364     .setup  =   sunsu_console_setup,
1365     .flags  =   CON_PRINTBUFFER,
1366     .index  =   -1,
1367     .data   =   &sunsu_reg,
1368 };
1369 
1370 /*
1371  *  Register console.
1372  */
1373 
1374 static inline struct console *SUNSU_CONSOLE(void)
1375 {
1376     return &sunsu_console;
1377 }
1378 #else
1379 #define SUNSU_CONSOLE()         (NULL)
1380 #define sunsu_serial_console_init() do { } while (0)
1381 #endif
1382 
1383 static enum su_type su_get_type(struct device_node *dp)
1384 {
1385     struct device_node *ap = of_find_node_by_path("/aliases");
1386     enum su_type rc = SU_PORT_PORT;
1387 
1388     if (ap) {
1389         const char *keyb = of_get_property(ap, "keyboard", NULL);
1390         const char *ms = of_get_property(ap, "mouse", NULL);
1391         struct device_node *match;
1392 
1393         if (keyb) {
1394             match = of_find_node_by_path(keyb);
1395 
1396             /*
1397              * The pointer is used as an identifier not
1398              * as a pointer, we can drop the refcount on
1399              * the of__node immediately after getting it.
1400              */
1401             of_node_put(match);
1402 
1403             if (dp == match) {
1404                 rc = SU_PORT_KBD;
1405                 goto out;
1406             }
1407         }
1408         if (ms) {
1409             match = of_find_node_by_path(ms);
1410 
1411             of_node_put(match);
1412 
1413             if (dp == match) {
1414                 rc = SU_PORT_MS;
1415                 goto out;
1416             }
1417         }
1418     }
1419 
1420 out:
1421     of_node_put(ap);
1422     return rc;
1423 }
1424 
1425 static int su_probe(struct platform_device *op)
1426 {
1427     struct device_node *dp = op->dev.of_node;
1428     struct uart_sunsu_port *up;
1429     struct resource *rp;
1430     enum su_type type;
1431     bool ignore_line;
1432     int err;
1433 
1434     type = su_get_type(dp);
1435     if (type == SU_PORT_PORT) {
1436         if (nr_inst >= UART_NR)
1437             return -EINVAL;
1438         up = &sunsu_ports[nr_inst];
1439     } else {
1440         up = kzalloc(sizeof(*up), GFP_KERNEL);
1441         if (!up)
1442             return -ENOMEM;
1443     }
1444 
1445     up->port.line = nr_inst;
1446 
1447     spin_lock_init(&up->port.lock);
1448 
1449     up->su_type = type;
1450 
1451     rp = &op->resource[0];
1452     up->port.mapbase = rp->start;
1453     up->reg_size = resource_size(rp);
1454     up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1455     if (!up->port.membase) {
1456         if (type != SU_PORT_PORT)
1457             kfree(up);
1458         return -ENOMEM;
1459     }
1460 
1461     up->port.irq = op->archdata.irqs[0];
1462 
1463     up->port.dev = &op->dev;
1464 
1465     up->port.type = PORT_UNKNOWN;
1466     up->port.uartclk = (SU_BASE_BAUD * 16);
1467     up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
1468 
1469     err = 0;
1470     if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1471         err = sunsu_kbd_ms_init(up);
1472         if (err) {
1473             of_iounmap(&op->resource[0],
1474                    up->port.membase, up->reg_size);
1475             kfree(up);
1476             return err;
1477         }
1478         platform_set_drvdata(op, up);
1479 
1480         nr_inst++;
1481 
1482         return 0;
1483     }
1484 
1485     up->port.flags |= UPF_BOOT_AUTOCONF;
1486 
1487     sunsu_autoconfig(up);
1488 
1489     err = -ENODEV;
1490     if (up->port.type == PORT_UNKNOWN)
1491         goto out_unmap;
1492 
1493     up->port.ops = &sunsu_pops;
1494 
1495     ignore_line = false;
1496     if (of_node_name_eq(dp, "rsc-console") ||
1497         of_node_name_eq(dp, "lom-console"))
1498         ignore_line = true;
1499 
1500     sunserial_console_match(SUNSU_CONSOLE(), dp,
1501                 &sunsu_reg, up->port.line,
1502                 ignore_line);
1503     err = uart_add_one_port(&sunsu_reg, &up->port);
1504     if (err)
1505         goto out_unmap;
1506 
1507     platform_set_drvdata(op, up);
1508 
1509     nr_inst++;
1510 
1511     return 0;
1512 
1513 out_unmap:
1514     of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1515     kfree(up);
1516     return err;
1517 }
1518 
1519 static int su_remove(struct platform_device *op)
1520 {
1521     struct uart_sunsu_port *up = platform_get_drvdata(op);
1522     bool kbdms = false;
1523 
1524     if (up->su_type == SU_PORT_MS ||
1525         up->su_type == SU_PORT_KBD)
1526         kbdms = true;
1527 
1528     if (kbdms) {
1529 #ifdef CONFIG_SERIO
1530         serio_unregister_port(&up->serio);
1531 #endif
1532     } else if (up->port.type != PORT_UNKNOWN)
1533         uart_remove_one_port(&sunsu_reg, &up->port);
1534 
1535     if (up->port.membase)
1536         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1537 
1538     if (kbdms)
1539         kfree(up);
1540 
1541     return 0;
1542 }
1543 
1544 static const struct of_device_id su_match[] = {
1545     {
1546         .name = "su",
1547     },
1548     {
1549         .name = "su_pnp",
1550     },
1551     {
1552         .name = "serial",
1553         .compatible = "su",
1554     },
1555     {
1556         .type = "serial",
1557         .compatible = "su",
1558     },
1559     {},
1560 };
1561 MODULE_DEVICE_TABLE(of, su_match);
1562 
1563 static struct platform_driver su_driver = {
1564     .driver = {
1565         .name = "su",
1566         .of_match_table = su_match,
1567     },
1568     .probe      = su_probe,
1569     .remove     = su_remove,
1570 };
1571 
1572 static int __init sunsu_init(void)
1573 {
1574     struct device_node *dp;
1575     int err;
1576     int num_uart = 0;
1577 
1578     for_each_node_by_name(dp, "su") {
1579         if (su_get_type(dp) == SU_PORT_PORT)
1580             num_uart++;
1581     }
1582     for_each_node_by_name(dp, "su_pnp") {
1583         if (su_get_type(dp) == SU_PORT_PORT)
1584             num_uart++;
1585     }
1586     for_each_node_by_name(dp, "serial") {
1587         if (of_device_is_compatible(dp, "su")) {
1588             if (su_get_type(dp) == SU_PORT_PORT)
1589                 num_uart++;
1590         }
1591     }
1592     for_each_node_by_type(dp, "serial") {
1593         if (of_device_is_compatible(dp, "su")) {
1594             if (su_get_type(dp) == SU_PORT_PORT)
1595                 num_uart++;
1596         }
1597     }
1598 
1599     if (num_uart) {
1600         err = sunserial_register_minors(&sunsu_reg, num_uart);
1601         if (err)
1602             return err;
1603     }
1604 
1605     err = platform_driver_register(&su_driver);
1606     if (err && num_uart)
1607         sunserial_unregister_minors(&sunsu_reg, num_uart);
1608 
1609     return err;
1610 }
1611 
1612 static void __exit sunsu_exit(void)
1613 {
1614     platform_driver_unregister(&su_driver);
1615     if (sunsu_reg.nr)
1616         sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1617 }
1618 
1619 module_init(sunsu_init);
1620 module_exit(sunsu_exit);
1621 
1622 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1623 MODULE_DESCRIPTION("Sun SU serial port driver");
1624 MODULE_VERSION("2.0");
1625 MODULE_LICENSE("GPL");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!