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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
0004  */
0005 
0006 #include <linux/clk.h>
0007 #include <linux/console.h>
0008 #include <linux/delay.h>
0009 #include <linux/dmaengine.h>
0010 #include <linux/dma-mapping.h>
0011 #include <linux/dma/sprd-dma.h>
0012 #include <linux/io.h>
0013 #include <linux/ioport.h>
0014 #include <linux/kernel.h>
0015 #include <linux/module.h>
0016 #include <linux/of.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/serial_core.h>
0019 #include <linux/serial.h>
0020 #include <linux/slab.h>
0021 #include <linux/tty.h>
0022 #include <linux/tty_flip.h>
0023 
0024 /* device name */
0025 #define UART_NR_MAX     8
0026 #define SPRD_TTY_NAME       "ttyS"
0027 #define SPRD_FIFO_SIZE      128
0028 #define SPRD_DEF_RATE       26000000
0029 #define SPRD_BAUD_IO_LIMIT  3000000
0030 #define SPRD_TIMEOUT        256000
0031 
0032 /* the offset of serial registers and BITs for them */
0033 /* data registers */
0034 #define SPRD_TXD        0x0000
0035 #define SPRD_RXD        0x0004
0036 
0037 /* line status register and its BITs  */
0038 #define SPRD_LSR        0x0008
0039 #define SPRD_LSR_OE     BIT(4)
0040 #define SPRD_LSR_FE     BIT(3)
0041 #define SPRD_LSR_PE     BIT(2)
0042 #define SPRD_LSR_BI     BIT(7)
0043 #define SPRD_LSR_TX_OVER    BIT(15)
0044 
0045 /* data number in TX and RX fifo */
0046 #define SPRD_STS1       0x000C
0047 #define SPRD_RX_FIFO_CNT_MASK   GENMASK(7, 0)
0048 #define SPRD_TX_FIFO_CNT_MASK   GENMASK(15, 8)
0049 
0050 /* interrupt enable register and its BITs */
0051 #define SPRD_IEN        0x0010
0052 #define SPRD_IEN_RX_FULL    BIT(0)
0053 #define SPRD_IEN_TX_EMPTY   BIT(1)
0054 #define SPRD_IEN_BREAK_DETECT   BIT(7)
0055 #define SPRD_IEN_TIMEOUT    BIT(13)
0056 
0057 /* interrupt clear register */
0058 #define SPRD_ICLR       0x0014
0059 #define SPRD_ICLR_TIMEOUT   BIT(13)
0060 
0061 /* line control register */
0062 #define SPRD_LCR        0x0018
0063 #define SPRD_LCR_STOP_1BIT  0x10
0064 #define SPRD_LCR_STOP_2BIT  0x30
0065 #define SPRD_LCR_DATA_LEN   (BIT(2) | BIT(3))
0066 #define SPRD_LCR_DATA_LEN5  0x0
0067 #define SPRD_LCR_DATA_LEN6  0x4
0068 #define SPRD_LCR_DATA_LEN7  0x8
0069 #define SPRD_LCR_DATA_LEN8  0xc
0070 #define SPRD_LCR_PARITY     (BIT(0) | BIT(1))
0071 #define SPRD_LCR_PARITY_EN  0x2
0072 #define SPRD_LCR_EVEN_PAR   0x0
0073 #define SPRD_LCR_ODD_PAR    0x1
0074 
0075 /* control register 1 */
0076 #define SPRD_CTL1       0x001C
0077 #define SPRD_DMA_EN     BIT(15)
0078 #define SPRD_LOOPBACK_EN    BIT(14)
0079 #define RX_HW_FLOW_CTL_THLD BIT(6)
0080 #define RX_HW_FLOW_CTL_EN   BIT(7)
0081 #define TX_HW_FLOW_CTL_EN   BIT(8)
0082 #define RX_TOUT_THLD_DEF    0x3E00
0083 #define RX_HFC_THLD_DEF     0x40
0084 
0085 /* fifo threshold register */
0086 #define SPRD_CTL2       0x0020
0087 #define THLD_TX_EMPTY       0x40
0088 #define THLD_TX_EMPTY_SHIFT 8
0089 #define THLD_RX_FULL        0x40
0090 #define THLD_RX_FULL_MASK   GENMASK(6, 0)
0091 
0092 /* config baud rate register */
0093 #define SPRD_CLKD0      0x0024
0094 #define SPRD_CLKD0_MASK     GENMASK(15, 0)
0095 #define SPRD_CLKD1      0x0028
0096 #define SPRD_CLKD1_MASK     GENMASK(20, 16)
0097 #define SPRD_CLKD1_SHIFT    16
0098 
0099 /* interrupt mask status register */
0100 #define SPRD_IMSR       0x002C
0101 #define SPRD_IMSR_RX_FIFO_FULL  BIT(0)
0102 #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
0103 #define SPRD_IMSR_BREAK_DETECT  BIT(7)
0104 #define SPRD_IMSR_TIMEOUT   BIT(13)
0105 #define SPRD_DEFAULT_SOURCE_CLK 26000000
0106 
0107 #define SPRD_RX_DMA_STEP    1
0108 #define SPRD_RX_FIFO_FULL   1
0109 #define SPRD_TX_FIFO_FULL   0x20
0110 #define SPRD_UART_RX_SIZE   (UART_XMIT_SIZE / 4)
0111 
0112 struct sprd_uart_dma {
0113     struct dma_chan *chn;
0114     unsigned char *virt;
0115     dma_addr_t phys_addr;
0116     dma_cookie_t cookie;
0117     u32 trans_len;
0118     bool enable;
0119 };
0120 
0121 struct sprd_uart_port {
0122     struct uart_port port;
0123     char name[16];
0124     struct clk *clk;
0125     struct sprd_uart_dma tx_dma;
0126     struct sprd_uart_dma rx_dma;
0127     dma_addr_t pos;
0128     unsigned char *rx_buf_tail;
0129 };
0130 
0131 static struct sprd_uart_port *sprd_port[UART_NR_MAX];
0132 static int sprd_ports_num;
0133 
0134 static int sprd_start_dma_rx(struct uart_port *port);
0135 static int sprd_tx_dma_config(struct uart_port *port);
0136 
0137 static inline unsigned int serial_in(struct uart_port *port,
0138                      unsigned int offset)
0139 {
0140     return readl_relaxed(port->membase + offset);
0141 }
0142 
0143 static inline void serial_out(struct uart_port *port, unsigned int offset,
0144                   int value)
0145 {
0146     writel_relaxed(value, port->membase + offset);
0147 }
0148 
0149 static unsigned int sprd_tx_empty(struct uart_port *port)
0150 {
0151     if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
0152         return 0;
0153     else
0154         return TIOCSER_TEMT;
0155 }
0156 
0157 static unsigned int sprd_get_mctrl(struct uart_port *port)
0158 {
0159     return TIOCM_DSR | TIOCM_CTS;
0160 }
0161 
0162 static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
0163 {
0164     u32 val = serial_in(port, SPRD_CTL1);
0165 
0166     if (mctrl & TIOCM_LOOP)
0167         val |= SPRD_LOOPBACK_EN;
0168     else
0169         val &= ~SPRD_LOOPBACK_EN;
0170 
0171     serial_out(port, SPRD_CTL1, val);
0172 }
0173 
0174 static void sprd_stop_rx(struct uart_port *port)
0175 {
0176     struct sprd_uart_port *sp =
0177         container_of(port, struct sprd_uart_port, port);
0178     unsigned int ien, iclr;
0179 
0180     if (sp->rx_dma.enable)
0181         dmaengine_terminate_all(sp->rx_dma.chn);
0182 
0183     iclr = serial_in(port, SPRD_ICLR);
0184     ien = serial_in(port, SPRD_IEN);
0185 
0186     ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
0187     iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
0188 
0189     serial_out(port, SPRD_IEN, ien);
0190     serial_out(port, SPRD_ICLR, iclr);
0191 }
0192 
0193 static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
0194 {
0195     u32 val = serial_in(port, SPRD_CTL1);
0196 
0197     if (enable)
0198         val |= SPRD_DMA_EN;
0199     else
0200         val &= ~SPRD_DMA_EN;
0201 
0202     serial_out(port, SPRD_CTL1, val);
0203 }
0204 
0205 static void sprd_stop_tx_dma(struct uart_port *port)
0206 {
0207     struct sprd_uart_port *sp =
0208         container_of(port, struct sprd_uart_port, port);
0209     struct circ_buf *xmit = &port->state->xmit;
0210     struct dma_tx_state state;
0211     u32 trans_len;
0212 
0213     dmaengine_pause(sp->tx_dma.chn);
0214 
0215     dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
0216     if (state.residue) {
0217         trans_len = state.residue - sp->tx_dma.phys_addr;
0218         xmit->tail = (xmit->tail + trans_len) & (UART_XMIT_SIZE - 1);
0219         port->icount.tx += trans_len;
0220         dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
0221                  sp->tx_dma.trans_len, DMA_TO_DEVICE);
0222     }
0223 
0224     dmaengine_terminate_all(sp->tx_dma.chn);
0225     sp->tx_dma.trans_len = 0;
0226 }
0227 
0228 static int sprd_tx_buf_remap(struct uart_port *port)
0229 {
0230     struct sprd_uart_port *sp =
0231         container_of(port, struct sprd_uart_port, port);
0232     struct circ_buf *xmit = &port->state->xmit;
0233 
0234     sp->tx_dma.trans_len =
0235         CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
0236 
0237     sp->tx_dma.phys_addr = dma_map_single(port->dev,
0238                           (void *)&(xmit->buf[xmit->tail]),
0239                           sp->tx_dma.trans_len,
0240                           DMA_TO_DEVICE);
0241     return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
0242 }
0243 
0244 static void sprd_complete_tx_dma(void *data)
0245 {
0246     struct uart_port *port = (struct uart_port *)data;
0247     struct sprd_uart_port *sp =
0248         container_of(port, struct sprd_uart_port, port);
0249     struct circ_buf *xmit = &port->state->xmit;
0250     unsigned long flags;
0251 
0252     spin_lock_irqsave(&port->lock, flags);
0253     dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
0254              sp->tx_dma.trans_len, DMA_TO_DEVICE);
0255 
0256     xmit->tail = (xmit->tail + sp->tx_dma.trans_len) & (UART_XMIT_SIZE - 1);
0257     port->icount.tx += sp->tx_dma.trans_len;
0258 
0259     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0260         uart_write_wakeup(port);
0261 
0262     if (uart_circ_empty(xmit) || sprd_tx_buf_remap(port) ||
0263         sprd_tx_dma_config(port))
0264         sp->tx_dma.trans_len = 0;
0265 
0266     spin_unlock_irqrestore(&port->lock, flags);
0267 }
0268 
0269 static int sprd_uart_dma_submit(struct uart_port *port,
0270                 struct sprd_uart_dma *ud, u32 trans_len,
0271                 enum dma_transfer_direction direction,
0272                 dma_async_tx_callback callback)
0273 {
0274     struct dma_async_tx_descriptor *dma_des;
0275     unsigned long flags;
0276 
0277     flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
0278                    SPRD_DMA_NO_TRG,
0279                    SPRD_DMA_FRAG_REQ,
0280                    SPRD_DMA_TRANS_INT);
0281 
0282     dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
0283                           direction, flags);
0284     if (!dma_des)
0285         return -ENODEV;
0286 
0287     dma_des->callback = callback;
0288     dma_des->callback_param = port;
0289 
0290     ud->cookie = dmaengine_submit(dma_des);
0291     if (dma_submit_error(ud->cookie))
0292         return dma_submit_error(ud->cookie);
0293 
0294     dma_async_issue_pending(ud->chn);
0295 
0296     return 0;
0297 }
0298 
0299 static int sprd_tx_dma_config(struct uart_port *port)
0300 {
0301     struct sprd_uart_port *sp =
0302         container_of(port, struct sprd_uart_port, port);
0303     u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
0304         SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
0305     int ret;
0306     struct dma_slave_config cfg = {
0307         .dst_addr = port->mapbase + SPRD_TXD,
0308         .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
0309         .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
0310         .src_maxburst = burst,
0311     };
0312 
0313     ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
0314     if (ret < 0)
0315         return ret;
0316 
0317     return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
0318                     DMA_MEM_TO_DEV, sprd_complete_tx_dma);
0319 }
0320 
0321 static void sprd_start_tx_dma(struct uart_port *port)
0322 {
0323     struct sprd_uart_port *sp =
0324         container_of(port, struct sprd_uart_port, port);
0325     struct circ_buf *xmit = &port->state->xmit;
0326 
0327     if (port->x_char) {
0328         serial_out(port, SPRD_TXD, port->x_char);
0329         port->icount.tx++;
0330         port->x_char = 0;
0331         return;
0332     }
0333 
0334     if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
0335         sprd_stop_tx_dma(port);
0336         return;
0337     }
0338 
0339     if (sp->tx_dma.trans_len)
0340         return;
0341 
0342     if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
0343         sp->tx_dma.trans_len = 0;
0344 }
0345 
0346 static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
0347 {
0348     u32 val = serial_in(port, SPRD_CTL2);
0349 
0350     val &= ~THLD_RX_FULL_MASK;
0351     val |= thld & THLD_RX_FULL_MASK;
0352     serial_out(port, SPRD_CTL2, val);
0353 }
0354 
0355 static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
0356 {
0357     sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
0358                          &sp->rx_dma.phys_addr, GFP_KERNEL);
0359     if (!sp->rx_dma.virt)
0360         return -ENOMEM;
0361 
0362     return 0;
0363 }
0364 
0365 static void sprd_rx_free_buf(struct sprd_uart_port *sp)
0366 {
0367     if (sp->rx_dma.virt)
0368         dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
0369                   sp->rx_dma.virt, sp->rx_dma.phys_addr);
0370 
0371 }
0372 
0373 static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
0374 {
0375     struct sprd_uart_port *sp =
0376         container_of(port, struct sprd_uart_port, port);
0377     struct dma_slave_config cfg = {
0378         .src_addr = port->mapbase + SPRD_RXD,
0379         .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
0380         .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
0381         .src_maxburst = burst,
0382     };
0383 
0384     return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
0385 }
0386 
0387 static void sprd_uart_dma_rx(struct uart_port *port)
0388 {
0389     struct sprd_uart_port *sp =
0390         container_of(port, struct sprd_uart_port, port);
0391     struct tty_port *tty = &port->state->port;
0392 
0393     port->icount.rx += sp->rx_dma.trans_len;
0394     tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
0395     tty_flip_buffer_push(tty);
0396 }
0397 
0398 static void sprd_uart_dma_irq(struct uart_port *port)
0399 {
0400     struct sprd_uart_port *sp =
0401         container_of(port, struct sprd_uart_port, port);
0402     struct dma_tx_state state;
0403     enum dma_status status;
0404 
0405     status = dmaengine_tx_status(sp->rx_dma.chn,
0406                      sp->rx_dma.cookie, &state);
0407     if (status == DMA_ERROR)
0408         sprd_stop_rx(port);
0409 
0410     if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
0411         return;
0412 
0413     if (!state.residue) {
0414         sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
0415             sp->rx_dma.phys_addr - sp->pos;
0416         sp->pos = sp->rx_dma.phys_addr;
0417     } else {
0418         sp->rx_dma.trans_len = state.residue - sp->pos;
0419         sp->pos = state.residue;
0420     }
0421 
0422     sprd_uart_dma_rx(port);
0423     sp->rx_buf_tail += sp->rx_dma.trans_len;
0424 }
0425 
0426 static void sprd_complete_rx_dma(void *data)
0427 {
0428     struct uart_port *port = (struct uart_port *)data;
0429     struct sprd_uart_port *sp =
0430         container_of(port, struct sprd_uart_port, port);
0431     struct dma_tx_state state;
0432     enum dma_status status;
0433     unsigned long flags;
0434 
0435     spin_lock_irqsave(&port->lock, flags);
0436 
0437     status = dmaengine_tx_status(sp->rx_dma.chn,
0438                      sp->rx_dma.cookie, &state);
0439     if (status != DMA_COMPLETE) {
0440         sprd_stop_rx(port);
0441         spin_unlock_irqrestore(&port->lock, flags);
0442         return;
0443     }
0444 
0445     if (sp->pos != sp->rx_dma.phys_addr) {
0446         sp->rx_dma.trans_len =  SPRD_UART_RX_SIZE +
0447             sp->rx_dma.phys_addr - sp->pos;
0448         sprd_uart_dma_rx(port);
0449         sp->rx_buf_tail += sp->rx_dma.trans_len;
0450     }
0451 
0452     if (sprd_start_dma_rx(port))
0453         sprd_stop_rx(port);
0454 
0455     spin_unlock_irqrestore(&port->lock, flags);
0456 }
0457 
0458 static int sprd_start_dma_rx(struct uart_port *port)
0459 {
0460     struct sprd_uart_port *sp =
0461         container_of(port, struct sprd_uart_port, port);
0462     int ret;
0463 
0464     if (!sp->rx_dma.enable)
0465         return 0;
0466 
0467     sp->pos = sp->rx_dma.phys_addr;
0468     sp->rx_buf_tail = sp->rx_dma.virt;
0469     sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
0470     ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
0471     if (ret)
0472         return ret;
0473 
0474     return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
0475                     DMA_DEV_TO_MEM, sprd_complete_rx_dma);
0476 }
0477 
0478 static void sprd_release_dma(struct uart_port *port)
0479 {
0480     struct sprd_uart_port *sp =
0481         container_of(port, struct sprd_uart_port, port);
0482 
0483     sprd_uart_dma_enable(port, false);
0484 
0485     if (sp->rx_dma.enable)
0486         dma_release_channel(sp->rx_dma.chn);
0487 
0488     if (sp->tx_dma.enable)
0489         dma_release_channel(sp->tx_dma.chn);
0490 
0491     sp->tx_dma.enable = false;
0492     sp->rx_dma.enable = false;
0493 }
0494 
0495 static void sprd_request_dma(struct uart_port *port)
0496 {
0497     struct sprd_uart_port *sp =
0498         container_of(port, struct sprd_uart_port, port);
0499 
0500     sp->tx_dma.enable = true;
0501     sp->rx_dma.enable = true;
0502 
0503     sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
0504     if (IS_ERR(sp->tx_dma.chn)) {
0505         dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
0506             PTR_ERR(sp->tx_dma.chn));
0507         sp->tx_dma.enable = false;
0508     }
0509 
0510     sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
0511     if (IS_ERR(sp->rx_dma.chn)) {
0512         dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
0513             PTR_ERR(sp->rx_dma.chn));
0514         sp->rx_dma.enable = false;
0515     }
0516 }
0517 
0518 static void sprd_stop_tx(struct uart_port *port)
0519 {
0520     struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
0521                          port);
0522     unsigned int ien, iclr;
0523 
0524     if (sp->tx_dma.enable) {
0525         sprd_stop_tx_dma(port);
0526         return;
0527     }
0528 
0529     iclr = serial_in(port, SPRD_ICLR);
0530     ien = serial_in(port, SPRD_IEN);
0531 
0532     iclr |= SPRD_IEN_TX_EMPTY;
0533     ien &= ~SPRD_IEN_TX_EMPTY;
0534 
0535     serial_out(port, SPRD_IEN, ien);
0536     serial_out(port, SPRD_ICLR, iclr);
0537 }
0538 
0539 static void sprd_start_tx(struct uart_port *port)
0540 {
0541     struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
0542                          port);
0543     unsigned int ien;
0544 
0545     if (sp->tx_dma.enable) {
0546         sprd_start_tx_dma(port);
0547         return;
0548     }
0549 
0550     ien = serial_in(port, SPRD_IEN);
0551     if (!(ien & SPRD_IEN_TX_EMPTY)) {
0552         ien |= SPRD_IEN_TX_EMPTY;
0553         serial_out(port, SPRD_IEN, ien);
0554     }
0555 }
0556 
0557 /* The Sprd serial does not support this function. */
0558 static void sprd_break_ctl(struct uart_port *port, int break_state)
0559 {
0560     /* nothing to do */
0561 }
0562 
0563 static int handle_lsr_errors(struct uart_port *port,
0564                  unsigned int *flag,
0565                  unsigned int *lsr)
0566 {
0567     int ret = 0;
0568 
0569     /* statistics */
0570     if (*lsr & SPRD_LSR_BI) {
0571         *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
0572         port->icount.brk++;
0573         ret = uart_handle_break(port);
0574         if (ret)
0575             return ret;
0576     } else if (*lsr & SPRD_LSR_PE)
0577         port->icount.parity++;
0578     else if (*lsr & SPRD_LSR_FE)
0579         port->icount.frame++;
0580     if (*lsr & SPRD_LSR_OE)
0581         port->icount.overrun++;
0582 
0583     /* mask off conditions which should be ignored */
0584     *lsr &= port->read_status_mask;
0585     if (*lsr & SPRD_LSR_BI)
0586         *flag = TTY_BREAK;
0587     else if (*lsr & SPRD_LSR_PE)
0588         *flag = TTY_PARITY;
0589     else if (*lsr & SPRD_LSR_FE)
0590         *flag = TTY_FRAME;
0591 
0592     return ret;
0593 }
0594 
0595 static inline void sprd_rx(struct uart_port *port)
0596 {
0597     struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
0598                          port);
0599     struct tty_port *tty = &port->state->port;
0600     unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT;
0601 
0602     if (sp->rx_dma.enable) {
0603         sprd_uart_dma_irq(port);
0604         return;
0605     }
0606 
0607     while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
0608            max_count--) {
0609         lsr = serial_in(port, SPRD_LSR);
0610         ch = serial_in(port, SPRD_RXD);
0611         flag = TTY_NORMAL;
0612         port->icount.rx++;
0613 
0614         if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
0615                SPRD_LSR_FE | SPRD_LSR_OE))
0616             if (handle_lsr_errors(port, &flag, &lsr))
0617                 continue;
0618         if (uart_handle_sysrq_char(port, ch))
0619             continue;
0620 
0621         uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
0622     }
0623 
0624     tty_flip_buffer_push(tty);
0625 }
0626 
0627 static inline void sprd_tx(struct uart_port *port)
0628 {
0629     struct circ_buf *xmit = &port->state->xmit;
0630     int count;
0631 
0632     if (port->x_char) {
0633         serial_out(port, SPRD_TXD, port->x_char);
0634         port->icount.tx++;
0635         port->x_char = 0;
0636         return;
0637     }
0638 
0639     if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
0640         sprd_stop_tx(port);
0641         return;
0642     }
0643 
0644     count = THLD_TX_EMPTY;
0645     do {
0646         serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]);
0647         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0648         port->icount.tx++;
0649         if (uart_circ_empty(xmit))
0650             break;
0651     } while (--count > 0);
0652 
0653     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0654         uart_write_wakeup(port);
0655 
0656     if (uart_circ_empty(xmit))
0657         sprd_stop_tx(port);
0658 }
0659 
0660 /* this handles the interrupt from one port */
0661 static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
0662 {
0663     struct uart_port *port = dev_id;
0664     unsigned int ims;
0665 
0666     spin_lock(&port->lock);
0667 
0668     ims = serial_in(port, SPRD_IMSR);
0669 
0670     if (!ims) {
0671         spin_unlock(&port->lock);
0672         return IRQ_NONE;
0673     }
0674 
0675     if (ims & SPRD_IMSR_TIMEOUT)
0676         serial_out(port, SPRD_ICLR, SPRD_ICLR_TIMEOUT);
0677 
0678     if (ims & SPRD_IMSR_BREAK_DETECT)
0679         serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
0680 
0681     if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
0682            SPRD_IMSR_TIMEOUT))
0683         sprd_rx(port);
0684 
0685     if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
0686         sprd_tx(port);
0687 
0688     spin_unlock(&port->lock);
0689 
0690     return IRQ_HANDLED;
0691 }
0692 
0693 static void sprd_uart_dma_startup(struct uart_port *port,
0694                   struct sprd_uart_port *sp)
0695 {
0696     int ret;
0697 
0698     sprd_request_dma(port);
0699     if (!(sp->rx_dma.enable || sp->tx_dma.enable))
0700         return;
0701 
0702     ret = sprd_start_dma_rx(port);
0703     if (ret) {
0704         sp->rx_dma.enable = false;
0705         dma_release_channel(sp->rx_dma.chn);
0706         dev_warn(port->dev, "fail to start RX dma mode\n");
0707     }
0708 
0709     sprd_uart_dma_enable(port, true);
0710 }
0711 
0712 static int sprd_startup(struct uart_port *port)
0713 {
0714     int ret = 0;
0715     unsigned int ien, fc;
0716     unsigned int timeout;
0717     struct sprd_uart_port *sp;
0718     unsigned long flags;
0719 
0720     serial_out(port, SPRD_CTL2,
0721            THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
0722 
0723     /* clear rx fifo */
0724     timeout = SPRD_TIMEOUT;
0725     while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
0726         serial_in(port, SPRD_RXD);
0727 
0728     /* clear tx fifo */
0729     timeout = SPRD_TIMEOUT;
0730     while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
0731         cpu_relax();
0732 
0733     /* clear interrupt */
0734     serial_out(port, SPRD_IEN, 0);
0735     serial_out(port, SPRD_ICLR, ~0);
0736 
0737     /* allocate irq */
0738     sp = container_of(port, struct sprd_uart_port, port);
0739     snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
0740 
0741     sprd_uart_dma_startup(port, sp);
0742 
0743     ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
0744                    IRQF_SHARED, sp->name, port);
0745     if (ret) {
0746         dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
0747             port->irq, ret);
0748         return ret;
0749     }
0750     fc = serial_in(port, SPRD_CTL1);
0751     fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
0752     serial_out(port, SPRD_CTL1, fc);
0753 
0754     /* enable interrupt */
0755     spin_lock_irqsave(&port->lock, flags);
0756     ien = serial_in(port, SPRD_IEN);
0757     ien |= SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
0758     if (!sp->rx_dma.enable)
0759         ien |= SPRD_IEN_RX_FULL;
0760     serial_out(port, SPRD_IEN, ien);
0761     spin_unlock_irqrestore(&port->lock, flags);
0762 
0763     return 0;
0764 }
0765 
0766 static void sprd_shutdown(struct uart_port *port)
0767 {
0768     sprd_release_dma(port);
0769     serial_out(port, SPRD_IEN, 0);
0770     serial_out(port, SPRD_ICLR, ~0);
0771     devm_free_irq(port->dev, port->irq, port);
0772 }
0773 
0774 static void sprd_set_termios(struct uart_port *port,
0775                  struct ktermios *termios,
0776                  struct ktermios *old)
0777 {
0778     unsigned int baud, quot;
0779     unsigned int lcr = 0, fc;
0780     unsigned long flags;
0781 
0782     /* ask the core to calculate the divisor for us */
0783     baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
0784 
0785     quot = port->uartclk / baud;
0786 
0787     /* set data length */
0788     switch (termios->c_cflag & CSIZE) {
0789     case CS5:
0790         lcr |= SPRD_LCR_DATA_LEN5;
0791         break;
0792     case CS6:
0793         lcr |= SPRD_LCR_DATA_LEN6;
0794         break;
0795     case CS7:
0796         lcr |= SPRD_LCR_DATA_LEN7;
0797         break;
0798     case CS8:
0799     default:
0800         lcr |= SPRD_LCR_DATA_LEN8;
0801         break;
0802     }
0803 
0804     /* calculate stop bits */
0805     lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
0806     if (termios->c_cflag & CSTOPB)
0807         lcr |= SPRD_LCR_STOP_2BIT;
0808     else
0809         lcr |= SPRD_LCR_STOP_1BIT;
0810 
0811     /* calculate parity */
0812     lcr &= ~SPRD_LCR_PARITY;
0813     termios->c_cflag &= ~CMSPAR;    /* no support mark/space */
0814     if (termios->c_cflag & PARENB) {
0815         lcr |= SPRD_LCR_PARITY_EN;
0816         if (termios->c_cflag & PARODD)
0817             lcr |= SPRD_LCR_ODD_PAR;
0818         else
0819             lcr |= SPRD_LCR_EVEN_PAR;
0820     }
0821 
0822     spin_lock_irqsave(&port->lock, flags);
0823 
0824     /* update the per-port timeout */
0825     uart_update_timeout(port, termios->c_cflag, baud);
0826 
0827     port->read_status_mask = SPRD_LSR_OE;
0828     if (termios->c_iflag & INPCK)
0829         port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
0830     if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
0831         port->read_status_mask |= SPRD_LSR_BI;
0832 
0833     /* characters to ignore */
0834     port->ignore_status_mask = 0;
0835     if (termios->c_iflag & IGNPAR)
0836         port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
0837     if (termios->c_iflag & IGNBRK) {
0838         port->ignore_status_mask |= SPRD_LSR_BI;
0839         /*
0840          * If we're ignoring parity and break indicators,
0841          * ignore overruns too (for real raw support).
0842          */
0843         if (termios->c_iflag & IGNPAR)
0844             port->ignore_status_mask |= SPRD_LSR_OE;
0845     }
0846 
0847     /* flow control */
0848     fc = serial_in(port, SPRD_CTL1);
0849     fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
0850     if (termios->c_cflag & CRTSCTS) {
0851         fc |= RX_HW_FLOW_CTL_THLD;
0852         fc |= RX_HW_FLOW_CTL_EN;
0853         fc |= TX_HW_FLOW_CTL_EN;
0854     }
0855 
0856     /* clock divider bit0~bit15 */
0857     serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
0858 
0859     /* clock divider bit16~bit20 */
0860     serial_out(port, SPRD_CLKD1,
0861            (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
0862     serial_out(port, SPRD_LCR, lcr);
0863     fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
0864     serial_out(port, SPRD_CTL1, fc);
0865 
0866     spin_unlock_irqrestore(&port->lock, flags);
0867 
0868     /* Don't rewrite B0 */
0869     if (tty_termios_baud_rate(termios))
0870         tty_termios_encode_baud_rate(termios, baud, baud);
0871 }
0872 
0873 static const char *sprd_type(struct uart_port *port)
0874 {
0875     return "SPX";
0876 }
0877 
0878 static void sprd_release_port(struct uart_port *port)
0879 {
0880     /* nothing to do */
0881 }
0882 
0883 static int sprd_request_port(struct uart_port *port)
0884 {
0885     return 0;
0886 }
0887 
0888 static void sprd_config_port(struct uart_port *port, int flags)
0889 {
0890     if (flags & UART_CONFIG_TYPE)
0891         port->type = PORT_SPRD;
0892 }
0893 
0894 static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
0895 {
0896     if (ser->type != PORT_SPRD)
0897         return -EINVAL;
0898     if (port->irq != ser->irq)
0899         return -EINVAL;
0900     if (port->iotype != ser->io_type)
0901         return -EINVAL;
0902     return 0;
0903 }
0904 
0905 static void sprd_pm(struct uart_port *port, unsigned int state,
0906         unsigned int oldstate)
0907 {
0908     struct sprd_uart_port *sup =
0909         container_of(port, struct sprd_uart_port, port);
0910 
0911     switch (state) {
0912     case UART_PM_STATE_ON:
0913         clk_prepare_enable(sup->clk);
0914         break;
0915     case UART_PM_STATE_OFF:
0916         clk_disable_unprepare(sup->clk);
0917         break;
0918     }
0919 }
0920 
0921 #ifdef CONFIG_CONSOLE_POLL
0922 static int sprd_poll_init(struct uart_port *port)
0923 {
0924     if (port->state->pm_state != UART_PM_STATE_ON) {
0925         sprd_pm(port, UART_PM_STATE_ON, 0);
0926         port->state->pm_state = UART_PM_STATE_ON;
0927     }
0928 
0929     return 0;
0930 }
0931 
0932 static int sprd_poll_get_char(struct uart_port *port)
0933 {
0934     while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK))
0935         cpu_relax();
0936 
0937     return serial_in(port, SPRD_RXD);
0938 }
0939 
0940 static void sprd_poll_put_char(struct uart_port *port, unsigned char ch)
0941 {
0942     while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
0943         cpu_relax();
0944 
0945     serial_out(port, SPRD_TXD, ch);
0946 }
0947 #endif
0948 
0949 static const struct uart_ops serial_sprd_ops = {
0950     .tx_empty = sprd_tx_empty,
0951     .get_mctrl = sprd_get_mctrl,
0952     .set_mctrl = sprd_set_mctrl,
0953     .stop_tx = sprd_stop_tx,
0954     .start_tx = sprd_start_tx,
0955     .stop_rx = sprd_stop_rx,
0956     .break_ctl = sprd_break_ctl,
0957     .startup = sprd_startup,
0958     .shutdown = sprd_shutdown,
0959     .set_termios = sprd_set_termios,
0960     .type = sprd_type,
0961     .release_port = sprd_release_port,
0962     .request_port = sprd_request_port,
0963     .config_port = sprd_config_port,
0964     .verify_port = sprd_verify_port,
0965     .pm = sprd_pm,
0966 #ifdef CONFIG_CONSOLE_POLL
0967     .poll_init  = sprd_poll_init,
0968     .poll_get_char  = sprd_poll_get_char,
0969     .poll_put_char  = sprd_poll_put_char,
0970 #endif
0971 };
0972 
0973 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
0974 static void wait_for_xmitr(struct uart_port *port)
0975 {
0976     unsigned int status, tmout = 10000;
0977 
0978     /* wait up to 10ms for the character(s) to be sent */
0979     do {
0980         status = serial_in(port, SPRD_STS1);
0981         if (--tmout == 0)
0982             break;
0983         udelay(1);
0984     } while (status & SPRD_TX_FIFO_CNT_MASK);
0985 }
0986 
0987 static void sprd_console_putchar(struct uart_port *port, unsigned char ch)
0988 {
0989     wait_for_xmitr(port);
0990     serial_out(port, SPRD_TXD, ch);
0991 }
0992 
0993 static void sprd_console_write(struct console *co, const char *s,
0994                    unsigned int count)
0995 {
0996     struct uart_port *port = &sprd_port[co->index]->port;
0997     int locked = 1;
0998     unsigned long flags;
0999 
1000     if (port->sysrq)
1001         locked = 0;
1002     else if (oops_in_progress)
1003         locked = spin_trylock_irqsave(&port->lock, flags);
1004     else
1005         spin_lock_irqsave(&port->lock, flags);
1006 
1007     uart_console_write(port, s, count, sprd_console_putchar);
1008 
1009     /* wait for transmitter to become empty */
1010     wait_for_xmitr(port);
1011 
1012     if (locked)
1013         spin_unlock_irqrestore(&port->lock, flags);
1014 }
1015 
1016 static int sprd_console_setup(struct console *co, char *options)
1017 {
1018     struct sprd_uart_port *sprd_uart_port;
1019     int baud = 115200;
1020     int bits = 8;
1021     int parity = 'n';
1022     int flow = 'n';
1023 
1024     if (co->index >= UART_NR_MAX || co->index < 0)
1025         co->index = 0;
1026 
1027     sprd_uart_port = sprd_port[co->index];
1028     if (!sprd_uart_port || !sprd_uart_port->port.membase) {
1029         pr_info("serial port %d not yet initialized\n", co->index);
1030         return -ENODEV;
1031     }
1032 
1033     if (options)
1034         uart_parse_options(options, &baud, &parity, &bits, &flow);
1035 
1036     return uart_set_options(&sprd_uart_port->port, co, baud,
1037                 parity, bits, flow);
1038 }
1039 
1040 static struct uart_driver sprd_uart_driver;
1041 static struct console sprd_console = {
1042     .name = SPRD_TTY_NAME,
1043     .write = sprd_console_write,
1044     .device = uart_console_device,
1045     .setup = sprd_console_setup,
1046     .flags = CON_PRINTBUFFER,
1047     .index = -1,
1048     .data = &sprd_uart_driver,
1049 };
1050 
1051 static int __init sprd_serial_console_init(void)
1052 {
1053     register_console(&sprd_console);
1054     return 0;
1055 }
1056 console_initcall(sprd_serial_console_init);
1057 
1058 #define SPRD_CONSOLE    (&sprd_console)
1059 
1060 /* Support for earlycon */
1061 static void sprd_putc(struct uart_port *port, unsigned char c)
1062 {
1063     unsigned int timeout = SPRD_TIMEOUT;
1064 
1065     while (timeout-- &&
1066            !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
1067         cpu_relax();
1068 
1069     writeb(c, port->membase + SPRD_TXD);
1070 }
1071 
1072 static void sprd_early_write(struct console *con, const char *s, unsigned int n)
1073 {
1074     struct earlycon_device *dev = con->data;
1075 
1076     uart_console_write(&dev->port, s, n, sprd_putc);
1077 }
1078 
1079 static int __init sprd_early_console_setup(struct earlycon_device *device,
1080                        const char *opt)
1081 {
1082     if (!device->port.membase)
1083         return -ENODEV;
1084 
1085     device->con->write = sprd_early_write;
1086     return 0;
1087 }
1088 OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
1089             sprd_early_console_setup);
1090 
1091 #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1092 #define SPRD_CONSOLE        NULL
1093 #endif
1094 
1095 static struct uart_driver sprd_uart_driver = {
1096     .owner = THIS_MODULE,
1097     .driver_name = "sprd_serial",
1098     .dev_name = SPRD_TTY_NAME,
1099     .major = 0,
1100     .minor = 0,
1101     .nr = UART_NR_MAX,
1102     .cons = SPRD_CONSOLE,
1103 };
1104 
1105 static int sprd_remove(struct platform_device *dev)
1106 {
1107     struct sprd_uart_port *sup = platform_get_drvdata(dev);
1108 
1109     if (sup) {
1110         uart_remove_one_port(&sprd_uart_driver, &sup->port);
1111         sprd_port[sup->port.line] = NULL;
1112         sprd_rx_free_buf(sup);
1113         sprd_ports_num--;
1114     }
1115 
1116     if (!sprd_ports_num)
1117         uart_unregister_driver(&sprd_uart_driver);
1118 
1119     return 0;
1120 }
1121 
1122 static bool sprd_uart_is_console(struct uart_port *uport)
1123 {
1124     struct console *cons = sprd_uart_driver.cons;
1125 
1126     if ((cons && cons->index >= 0 && cons->index == uport->line) ||
1127         of_console_check(uport->dev->of_node, SPRD_TTY_NAME, uport->line))
1128         return true;
1129 
1130     return false;
1131 }
1132 
1133 static int sprd_clk_init(struct uart_port *uport)
1134 {
1135     struct clk *clk_uart, *clk_parent;
1136     struct sprd_uart_port *u = sprd_port[uport->line];
1137 
1138     clk_uart = devm_clk_get(uport->dev, "uart");
1139     if (IS_ERR(clk_uart)) {
1140         dev_warn(uport->dev, "uart%d can't get uart clock\n",
1141              uport->line);
1142         clk_uart = NULL;
1143     }
1144 
1145     clk_parent = devm_clk_get(uport->dev, "source");
1146     if (IS_ERR(clk_parent)) {
1147         dev_warn(uport->dev, "uart%d can't get source clock\n",
1148              uport->line);
1149         clk_parent = NULL;
1150     }
1151 
1152     if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
1153         uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
1154     else
1155         uport->uartclk = clk_get_rate(clk_uart);
1156 
1157     u->clk = devm_clk_get(uport->dev, "enable");
1158     if (IS_ERR(u->clk)) {
1159         if (PTR_ERR(u->clk) == -EPROBE_DEFER)
1160             return -EPROBE_DEFER;
1161 
1162         dev_warn(uport->dev, "uart%d can't get enable clock\n",
1163             uport->line);
1164 
1165         /* To keep console alive even if the error occurred */
1166         if (!sprd_uart_is_console(uport))
1167             return PTR_ERR(u->clk);
1168 
1169         u->clk = NULL;
1170     }
1171 
1172     return 0;
1173 }
1174 
1175 static int sprd_probe(struct platform_device *pdev)
1176 {
1177     struct resource *res;
1178     struct uart_port *up;
1179     int irq;
1180     int index;
1181     int ret;
1182 
1183     index = of_alias_get_id(pdev->dev.of_node, "serial");
1184     if (index < 0 || index >= ARRAY_SIZE(sprd_port)) {
1185         dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index);
1186         return -EINVAL;
1187     }
1188 
1189     sprd_port[index] = devm_kzalloc(&pdev->dev, sizeof(*sprd_port[index]),
1190                     GFP_KERNEL);
1191     if (!sprd_port[index])
1192         return -ENOMEM;
1193 
1194     up = &sprd_port[index]->port;
1195     up->dev = &pdev->dev;
1196     up->line = index;
1197     up->type = PORT_SPRD;
1198     up->iotype = UPIO_MEM;
1199     up->uartclk = SPRD_DEF_RATE;
1200     up->fifosize = SPRD_FIFO_SIZE;
1201     up->ops = &serial_sprd_ops;
1202     up->flags = UPF_BOOT_AUTOCONF;
1203     up->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE);
1204 
1205     ret = sprd_clk_init(up);
1206     if (ret)
1207         return ret;
1208 
1209     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1210     up->membase = devm_ioremap_resource(&pdev->dev, res);
1211     if (IS_ERR(up->membase))
1212         return PTR_ERR(up->membase);
1213 
1214     up->mapbase = res->start;
1215 
1216     irq = platform_get_irq(pdev, 0);
1217     if (irq < 0)
1218         return irq;
1219     up->irq = irq;
1220 
1221     /*
1222      * Allocate one dma buffer to prepare for receive transfer, in case
1223      * memory allocation failure at runtime.
1224      */
1225     ret = sprd_rx_alloc_buf(sprd_port[index]);
1226     if (ret)
1227         return ret;
1228 
1229     if (!sprd_ports_num) {
1230         ret = uart_register_driver(&sprd_uart_driver);
1231         if (ret < 0) {
1232             pr_err("Failed to register SPRD-UART driver\n");
1233             return ret;
1234         }
1235     }
1236     sprd_ports_num++;
1237 
1238     ret = uart_add_one_port(&sprd_uart_driver, up);
1239     if (ret)
1240         sprd_remove(pdev);
1241 
1242     platform_set_drvdata(pdev, up);
1243 
1244     return ret;
1245 }
1246 
1247 #ifdef CONFIG_PM_SLEEP
1248 static int sprd_suspend(struct device *dev)
1249 {
1250     struct sprd_uart_port *sup = dev_get_drvdata(dev);
1251 
1252     uart_suspend_port(&sprd_uart_driver, &sup->port);
1253 
1254     return 0;
1255 }
1256 
1257 static int sprd_resume(struct device *dev)
1258 {
1259     struct sprd_uart_port *sup = dev_get_drvdata(dev);
1260 
1261     uart_resume_port(&sprd_uart_driver, &sup->port);
1262 
1263     return 0;
1264 }
1265 #endif
1266 
1267 static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
1268 
1269 static const struct of_device_id serial_ids[] = {
1270     {.compatible = "sprd,sc9836-uart",},
1271     {}
1272 };
1273 MODULE_DEVICE_TABLE(of, serial_ids);
1274 
1275 static struct platform_driver sprd_platform_driver = {
1276     .probe      = sprd_probe,
1277     .remove     = sprd_remove,
1278     .driver     = {
1279         .name   = "sprd_serial",
1280         .of_match_table = of_match_ptr(serial_ids),
1281         .pm = &sprd_pm_ops,
1282     },
1283 };
1284 
1285 module_platform_driver(sprd_platform_driver);
1286 
1287 MODULE_LICENSE("GPL v2");
1288 MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
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