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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Derived from many drivers using generic_serial interface,
0004  * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
0005  * (was in Linux/VR tree) by Jim Pick.
0006  *
0007  *  Copyright (C) 1999 Harald Koerfgen
0008  *  Copyright (C) 2000 Jim Pick <jim@jimpick.com>
0009  *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
0010  *  Copyright (C) 2000-2002 Toshiba Corporation
0011  *
0012  *  Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
0013  */
0014 
0015 #include <linux/module.h>
0016 #include <linux/ioport.h>
0017 #include <linux/init.h>
0018 #include <linux/console.h>
0019 #include <linux/delay.h>
0020 #include <linux/platform_device.h>
0021 #include <linux/pci.h>
0022 #include <linux/serial_core.h>
0023 #include <linux/serial.h>
0024 #include <linux/tty.h>
0025 #include <linux/tty_flip.h>
0026 
0027 #include <linux/io.h>
0028 
0029 #define PASS_LIMIT  256
0030 
0031 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
0032 /* "ttyS" is used for standard serial driver */
0033 #define TXX9_TTY_NAME "ttyTX"
0034 #define TXX9_TTY_MINOR_START    196
0035 #define TXX9_TTY_MAJOR  204
0036 #else
0037 /* acts like standard serial driver */
0038 #define TXX9_TTY_NAME "ttyS"
0039 #define TXX9_TTY_MINOR_START    64
0040 #define TXX9_TTY_MAJOR  TTY_MAJOR
0041 #endif
0042 
0043 /* flag aliases */
0044 #define UPF_TXX9_HAVE_CTS_LINE  UPF_BUGGY_UART
0045 #define UPF_TXX9_USE_SCLK   UPF_MAGIC_MULTIPLIER
0046 
0047 #ifdef CONFIG_PCI
0048 /* support for Toshiba TC86C001 SIO */
0049 #define ENABLE_SERIAL_TXX9_PCI
0050 #endif
0051 
0052 /*
0053  * Number of serial ports
0054  */
0055 #define UART_NR  CONFIG_SERIAL_TXX9_NR_UARTS
0056 
0057 #define TXX9_REGION_SIZE    0x24
0058 
0059 /* TXX9 Serial Registers */
0060 #define TXX9_SILCR  0x00
0061 #define TXX9_SIDICR 0x04
0062 #define TXX9_SIDISR 0x08
0063 #define TXX9_SICISR 0x0c
0064 #define TXX9_SIFCR  0x10
0065 #define TXX9_SIFLCR 0x14
0066 #define TXX9_SIBGR  0x18
0067 #define TXX9_SITFIFO    0x1c
0068 #define TXX9_SIRFIFO    0x20
0069 
0070 /* SILCR : Line Control */
0071 #define TXX9_SILCR_SCS_MASK 0x00000060
0072 #define TXX9_SILCR_SCS_IMCLK    0x00000000
0073 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
0074 #define TXX9_SILCR_SCS_SCLK 0x00000040
0075 #define TXX9_SILCR_SCS_SCLK_BG  0x00000060
0076 #define TXX9_SILCR_UEPS 0x00000010
0077 #define TXX9_SILCR_UPEN 0x00000008
0078 #define TXX9_SILCR_USBL_MASK    0x00000004
0079 #define TXX9_SILCR_USBL_1BIT    0x00000000
0080 #define TXX9_SILCR_USBL_2BIT    0x00000004
0081 #define TXX9_SILCR_UMODE_MASK   0x00000003
0082 #define TXX9_SILCR_UMODE_8BIT   0x00000000
0083 #define TXX9_SILCR_UMODE_7BIT   0x00000001
0084 
0085 /* SIDICR : DMA/Int. Control */
0086 #define TXX9_SIDICR_TDE 0x00008000
0087 #define TXX9_SIDICR_RDE 0x00004000
0088 #define TXX9_SIDICR_TIE 0x00002000
0089 #define TXX9_SIDICR_RIE 0x00001000
0090 #define TXX9_SIDICR_SPIE    0x00000800
0091 #define TXX9_SIDICR_CTSAC   0x00000600
0092 #define TXX9_SIDICR_STIE_MASK   0x0000003f
0093 #define TXX9_SIDICR_STIE_OERS       0x00000020
0094 #define TXX9_SIDICR_STIE_CTSS       0x00000010
0095 #define TXX9_SIDICR_STIE_RBRKD  0x00000008
0096 #define TXX9_SIDICR_STIE_TRDY       0x00000004
0097 #define TXX9_SIDICR_STIE_TXALS  0x00000002
0098 #define TXX9_SIDICR_STIE_UBRKD  0x00000001
0099 
0100 /* SIDISR : DMA/Int. Status */
0101 #define TXX9_SIDISR_UBRK    0x00008000
0102 #define TXX9_SIDISR_UVALID  0x00004000
0103 #define TXX9_SIDISR_UFER    0x00002000
0104 #define TXX9_SIDISR_UPER    0x00001000
0105 #define TXX9_SIDISR_UOER    0x00000800
0106 #define TXX9_SIDISR_ERI 0x00000400
0107 #define TXX9_SIDISR_TOUT    0x00000200
0108 #define TXX9_SIDISR_TDIS    0x00000100
0109 #define TXX9_SIDISR_RDIS    0x00000080
0110 #define TXX9_SIDISR_STIS    0x00000040
0111 #define TXX9_SIDISR_RFDN_MASK   0x0000001f
0112 
0113 /* SICISR : Change Int. Status */
0114 #define TXX9_SICISR_OERS    0x00000020
0115 #define TXX9_SICISR_CTSS    0x00000010
0116 #define TXX9_SICISR_RBRKD   0x00000008
0117 #define TXX9_SICISR_TRDY    0x00000004
0118 #define TXX9_SICISR_TXALS   0x00000002
0119 #define TXX9_SICISR_UBRKD   0x00000001
0120 
0121 /* SIFCR : FIFO Control */
0122 #define TXX9_SIFCR_SWRST    0x00008000
0123 #define TXX9_SIFCR_RDIL_MASK    0x00000180
0124 #define TXX9_SIFCR_RDIL_1   0x00000000
0125 #define TXX9_SIFCR_RDIL_4   0x00000080
0126 #define TXX9_SIFCR_RDIL_8   0x00000100
0127 #define TXX9_SIFCR_RDIL_12  0x00000180
0128 #define TXX9_SIFCR_RDIL_MAX 0x00000180
0129 #define TXX9_SIFCR_TDIL_MASK    0x00000018
0130 #define TXX9_SIFCR_TDIL_1   0x00000000
0131 #define TXX9_SIFCR_TDIL_4   0x00000001
0132 #define TXX9_SIFCR_TDIL_8   0x00000010
0133 #define TXX9_SIFCR_TDIL_MAX 0x00000010
0134 #define TXX9_SIFCR_TFRST    0x00000004
0135 #define TXX9_SIFCR_RFRST    0x00000002
0136 #define TXX9_SIFCR_FRSTE    0x00000001
0137 #define TXX9_SIO_TX_FIFO    8
0138 #define TXX9_SIO_RX_FIFO    16
0139 
0140 /* SIFLCR : Flow Control */
0141 #define TXX9_SIFLCR_RCS 0x00001000
0142 #define TXX9_SIFLCR_TES 0x00000800
0143 #define TXX9_SIFLCR_RTSSC   0x00000200
0144 #define TXX9_SIFLCR_RSDE    0x00000100
0145 #define TXX9_SIFLCR_TSDE    0x00000080
0146 #define TXX9_SIFLCR_RTSTL_MASK  0x0000001e
0147 #define TXX9_SIFLCR_RTSTL_MAX   0x0000001e
0148 #define TXX9_SIFLCR_TBRK    0x00000001
0149 
0150 /* SIBGR : Baudrate Control */
0151 #define TXX9_SIBGR_BCLK_MASK    0x00000300
0152 #define TXX9_SIBGR_BCLK_T0  0x00000000
0153 #define TXX9_SIBGR_BCLK_T2  0x00000100
0154 #define TXX9_SIBGR_BCLK_T4  0x00000200
0155 #define TXX9_SIBGR_BCLK_T6  0x00000300
0156 #define TXX9_SIBGR_BRD_MASK 0x000000ff
0157 
0158 static inline unsigned int sio_in(struct uart_port *up, int offset)
0159 {
0160     switch (up->iotype) {
0161     default:
0162         return __raw_readl(up->membase + offset);
0163     case UPIO_PORT:
0164         return inl(up->iobase + offset);
0165     }
0166 }
0167 
0168 static inline void
0169 sio_out(struct uart_port *up, int offset, int value)
0170 {
0171     switch (up->iotype) {
0172     default:
0173         __raw_writel(value, up->membase + offset);
0174         break;
0175     case UPIO_PORT:
0176         outl(value, up->iobase + offset);
0177         break;
0178     }
0179 }
0180 
0181 static inline void
0182 sio_mask(struct uart_port *up, int offset, unsigned int value)
0183 {
0184     sio_out(up, offset, sio_in(up, offset) & ~value);
0185 }
0186 static inline void
0187 sio_set(struct uart_port *up, int offset, unsigned int value)
0188 {
0189     sio_out(up, offset, sio_in(up, offset) | value);
0190 }
0191 
0192 static inline void
0193 sio_quot_set(struct uart_port *up, int quot)
0194 {
0195     quot >>= 1;
0196     if (quot < 256)
0197         sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
0198     else if (quot < (256 << 2))
0199         sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
0200     else if (quot < (256 << 4))
0201         sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
0202     else if (quot < (256 << 6))
0203         sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
0204     else
0205         sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
0206 }
0207 
0208 static void serial_txx9_stop_tx(struct uart_port *up)
0209 {
0210     sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
0211 }
0212 
0213 static void serial_txx9_start_tx(struct uart_port *up)
0214 {
0215     sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
0216 }
0217 
0218 static void serial_txx9_stop_rx(struct uart_port *up)
0219 {
0220     up->read_status_mask &= ~TXX9_SIDISR_RDIS;
0221 }
0222 
0223 static void serial_txx9_initialize(struct uart_port *up)
0224 {
0225     unsigned int tmout = 10000;
0226 
0227     sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
0228     /* TX4925 BUG WORKAROUND.  Accessing SIOC register
0229      * immediately after soft reset causes bus error. */
0230     udelay(1);
0231     while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
0232         udelay(1);
0233     /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
0234     sio_set(up, TXX9_SIFCR,
0235         TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
0236     /* initial settings */
0237     sio_out(up, TXX9_SILCR,
0238         TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
0239         ((up->flags & UPF_TXX9_USE_SCLK) ?
0240          TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
0241     sio_quot_set(up, uart_get_divisor(up, 9600));
0242     sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
0243     sio_out(up, TXX9_SIDICR, 0);
0244 }
0245 
0246 static inline void
0247 receive_chars(struct uart_port *up, unsigned int *status)
0248 {
0249     unsigned char ch;
0250     unsigned int disr = *status;
0251     int max_count = 256;
0252     char flag;
0253     unsigned int next_ignore_status_mask;
0254 
0255     do {
0256         ch = sio_in(up, TXX9_SIRFIFO);
0257         flag = TTY_NORMAL;
0258         up->icount.rx++;
0259 
0260         /* mask out RFDN_MASK bit added by previous overrun */
0261         next_ignore_status_mask =
0262             up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
0263         if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
0264                      TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
0265             /*
0266              * For statistics only
0267              */
0268             if (disr & TXX9_SIDISR_UBRK) {
0269                 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
0270                 up->icount.brk++;
0271                 /*
0272                  * We do the SysRQ and SAK checking
0273                  * here because otherwise the break
0274                  * may get masked by ignore_status_mask
0275                  * or read_status_mask.
0276                  */
0277                 if (uart_handle_break(up))
0278                     goto ignore_char;
0279             } else if (disr & TXX9_SIDISR_UPER)
0280                 up->icount.parity++;
0281             else if (disr & TXX9_SIDISR_UFER)
0282                 up->icount.frame++;
0283             if (disr & TXX9_SIDISR_UOER) {
0284                 up->icount.overrun++;
0285                 /*
0286                  * The receiver read buffer still hold
0287                  * a char which caused overrun.
0288                  * Ignore next char by adding RFDN_MASK
0289                  * to ignore_status_mask temporarily.
0290                  */
0291                 next_ignore_status_mask |=
0292                     TXX9_SIDISR_RFDN_MASK;
0293             }
0294 
0295             /*
0296              * Mask off conditions which should be ingored.
0297              */
0298             disr &= up->read_status_mask;
0299 
0300             if (disr & TXX9_SIDISR_UBRK) {
0301                 flag = TTY_BREAK;
0302             } else if (disr & TXX9_SIDISR_UPER)
0303                 flag = TTY_PARITY;
0304             else if (disr & TXX9_SIDISR_UFER)
0305                 flag = TTY_FRAME;
0306         }
0307         if (uart_handle_sysrq_char(up, ch))
0308             goto ignore_char;
0309 
0310         uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
0311 
0312     ignore_char:
0313         up->ignore_status_mask = next_ignore_status_mask;
0314         disr = sio_in(up, TXX9_SIDISR);
0315     } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
0316 
0317     tty_flip_buffer_push(&up->state->port);
0318 
0319     *status = disr;
0320 }
0321 
0322 static inline void transmit_chars(struct uart_port *up)
0323 {
0324     struct circ_buf *xmit = &up->state->xmit;
0325     int count;
0326 
0327     if (up->x_char) {
0328         sio_out(up, TXX9_SITFIFO, up->x_char);
0329         up->icount.tx++;
0330         up->x_char = 0;
0331         return;
0332     }
0333     if (uart_circ_empty(xmit) || uart_tx_stopped(up)) {
0334         serial_txx9_stop_tx(up);
0335         return;
0336     }
0337 
0338     count = TXX9_SIO_TX_FIFO;
0339     do {
0340         sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
0341         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0342         up->icount.tx++;
0343         if (uart_circ_empty(xmit))
0344             break;
0345     } while (--count > 0);
0346 
0347     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0348         uart_write_wakeup(up);
0349 
0350     if (uart_circ_empty(xmit))
0351         serial_txx9_stop_tx(up);
0352 }
0353 
0354 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
0355 {
0356     int pass_counter = 0;
0357     struct uart_port *up = dev_id;
0358     unsigned int status;
0359 
0360     while (1) {
0361         spin_lock(&up->lock);
0362         status = sio_in(up, TXX9_SIDISR);
0363         if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
0364             status &= ~TXX9_SIDISR_TDIS;
0365         if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
0366                 TXX9_SIDISR_TOUT))) {
0367             spin_unlock(&up->lock);
0368             break;
0369         }
0370 
0371         if (status & TXX9_SIDISR_RDIS)
0372             receive_chars(up, &status);
0373         if (status & TXX9_SIDISR_TDIS)
0374             transmit_chars(up);
0375         /* Clear TX/RX Int. Status */
0376         sio_mask(up, TXX9_SIDISR,
0377              TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
0378              TXX9_SIDISR_TOUT);
0379         spin_unlock(&up->lock);
0380 
0381         if (pass_counter++ > PASS_LIMIT)
0382             break;
0383     }
0384 
0385     return pass_counter ? IRQ_HANDLED : IRQ_NONE;
0386 }
0387 
0388 static unsigned int serial_txx9_tx_empty(struct uart_port *up)
0389 {
0390     unsigned long flags;
0391     unsigned int ret;
0392 
0393     spin_lock_irqsave(&up->lock, flags);
0394     ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
0395     spin_unlock_irqrestore(&up->lock, flags);
0396 
0397     return ret;
0398 }
0399 
0400 static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
0401 {
0402     unsigned int ret;
0403 
0404     /* no modem control lines */
0405     ret = TIOCM_CAR | TIOCM_DSR;
0406     ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
0407     ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
0408 
0409     return ret;
0410 }
0411 
0412 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
0413 {
0414 
0415     if (mctrl & TIOCM_RTS)
0416         sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
0417     else
0418         sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
0419 }
0420 
0421 static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
0422 {
0423     unsigned long flags;
0424 
0425     spin_lock_irqsave(&up->lock, flags);
0426     if (break_state == -1)
0427         sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
0428     else
0429         sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
0430     spin_unlock_irqrestore(&up->lock, flags);
0431 }
0432 
0433 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
0434 /*
0435  *  Wait for transmitter & holding register to empty
0436  */
0437 static void wait_for_xmitr(struct uart_port *up)
0438 {
0439     unsigned int tmout = 10000;
0440 
0441     /* Wait up to 10ms for the character(s) to be sent. */
0442     while (--tmout &&
0443            !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
0444         udelay(1);
0445 
0446     /* Wait up to 1s for flow control if necessary */
0447     if (up->flags & UPF_CONS_FLOW) {
0448         tmout = 1000000;
0449         while (--tmout &&
0450                (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
0451             udelay(1);
0452     }
0453 }
0454 #endif
0455 
0456 #ifdef CONFIG_CONSOLE_POLL
0457 /*
0458  * Console polling routines for writing and reading from the uart while
0459  * in an interrupt or debug context.
0460  */
0461 
0462 static int serial_txx9_get_poll_char(struct uart_port *up)
0463 {
0464     unsigned int ier;
0465     unsigned char c;
0466 
0467     /*
0468      *  First save the IER then disable the interrupts
0469      */
0470     ier = sio_in(up, TXX9_SIDICR);
0471     sio_out(up, TXX9_SIDICR, 0);
0472 
0473     while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
0474         ;
0475 
0476     c = sio_in(up, TXX9_SIRFIFO);
0477 
0478     /*
0479      *  Finally, clear RX interrupt status
0480      *  and restore the IER
0481      */
0482     sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
0483     sio_out(up, TXX9_SIDICR, ier);
0484     return c;
0485 }
0486 
0487 
0488 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
0489 {
0490     unsigned int ier;
0491 
0492     /*
0493      *  First save the IER then disable the interrupts
0494      */
0495     ier = sio_in(up, TXX9_SIDICR);
0496     sio_out(up, TXX9_SIDICR, 0);
0497 
0498     wait_for_xmitr(up);
0499     /*
0500      *  Send the character out.
0501      */
0502     sio_out(up, TXX9_SITFIFO, c);
0503 
0504     /*
0505      *  Finally, wait for transmitter to become empty
0506      *  and restore the IER
0507      */
0508     wait_for_xmitr(up);
0509     sio_out(up, TXX9_SIDICR, ier);
0510 }
0511 
0512 #endif /* CONFIG_CONSOLE_POLL */
0513 
0514 static int serial_txx9_startup(struct uart_port *up)
0515 {
0516     unsigned long flags;
0517     int retval;
0518 
0519     /*
0520      * Clear the FIFO buffers and disable them.
0521      * (they will be reenabled in set_termios())
0522      */
0523     sio_set(up, TXX9_SIFCR,
0524         TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
0525     /* clear reset */
0526     sio_mask(up, TXX9_SIFCR,
0527          TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
0528     sio_out(up, TXX9_SIDICR, 0);
0529 
0530     /*
0531      * Clear the interrupt registers.
0532      */
0533     sio_out(up, TXX9_SIDISR, 0);
0534 
0535     retval = request_irq(up->irq, serial_txx9_interrupt,
0536                  IRQF_SHARED, "serial_txx9", up);
0537     if (retval)
0538         return retval;
0539 
0540     /*
0541      * Now, initialize the UART
0542      */
0543     spin_lock_irqsave(&up->lock, flags);
0544     serial_txx9_set_mctrl(up, up->mctrl);
0545     spin_unlock_irqrestore(&up->lock, flags);
0546 
0547     /* Enable RX/TX */
0548     sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
0549 
0550     /*
0551      * Finally, enable interrupts.
0552      */
0553     sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
0554 
0555     return 0;
0556 }
0557 
0558 static void serial_txx9_shutdown(struct uart_port *up)
0559 {
0560     unsigned long flags;
0561 
0562     /*
0563      * Disable interrupts from this port
0564      */
0565     sio_out(up, TXX9_SIDICR, 0);    /* disable all intrs */
0566 
0567     spin_lock_irqsave(&up->lock, flags);
0568     serial_txx9_set_mctrl(up, up->mctrl);
0569     spin_unlock_irqrestore(&up->lock, flags);
0570 
0571     /*
0572      * Disable break condition
0573      */
0574     sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
0575 
0576 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
0577     if (up->cons && up->line == up->cons->index) {
0578         free_irq(up->irq, up);
0579         return;
0580     }
0581 #endif
0582     /* reset FIFOs */
0583     sio_set(up, TXX9_SIFCR,
0584         TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
0585     /* clear reset */
0586     sio_mask(up, TXX9_SIFCR,
0587          TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
0588 
0589     /* Disable RX/TX */
0590     sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
0591 
0592     free_irq(up->irq, up);
0593 }
0594 
0595 static void
0596 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
0597                struct ktermios *old)
0598 {
0599     unsigned int cval, fcr = 0;
0600     unsigned long flags;
0601     unsigned int baud, quot;
0602 
0603     /*
0604      * We don't support modem control lines.
0605      */
0606     termios->c_cflag &= ~(HUPCL | CMSPAR);
0607     termios->c_cflag |= CLOCAL;
0608 
0609     cval = sio_in(up, TXX9_SILCR);
0610     /* byte size and parity */
0611     cval &= ~TXX9_SILCR_UMODE_MASK;
0612     switch (termios->c_cflag & CSIZE) {
0613     case CS7:
0614         cval |= TXX9_SILCR_UMODE_7BIT;
0615         break;
0616     default:
0617     case CS5:   /* not supported */
0618     case CS6:   /* not supported */
0619     case CS8:
0620         cval |= TXX9_SILCR_UMODE_8BIT;
0621         termios->c_cflag &= ~CSIZE;
0622         termios->c_cflag |= CS8;
0623         break;
0624     }
0625 
0626     cval &= ~TXX9_SILCR_USBL_MASK;
0627     if (termios->c_cflag & CSTOPB)
0628         cval |= TXX9_SILCR_USBL_2BIT;
0629     else
0630         cval |= TXX9_SILCR_USBL_1BIT;
0631     cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
0632     if (termios->c_cflag & PARENB)
0633         cval |= TXX9_SILCR_UPEN;
0634     if (!(termios->c_cflag & PARODD))
0635         cval |= TXX9_SILCR_UEPS;
0636 
0637     /*
0638      * Ask the core to calculate the divisor for us.
0639      */
0640     baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
0641     quot = uart_get_divisor(up, baud);
0642 
0643     /* Set up FIFOs */
0644     /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
0645     fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
0646 
0647     /*
0648      * Ok, we're now changing the port state.  Do it with
0649      * interrupts disabled.
0650      */
0651     spin_lock_irqsave(&up->lock, flags);
0652 
0653     /*
0654      * Update the per-port timeout.
0655      */
0656     uart_update_timeout(up, termios->c_cflag, baud);
0657 
0658     up->read_status_mask = TXX9_SIDISR_UOER |
0659         TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
0660     if (termios->c_iflag & INPCK)
0661         up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
0662     if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
0663         up->read_status_mask |= TXX9_SIDISR_UBRK;
0664 
0665     /*
0666      * Characteres to ignore
0667      */
0668     up->ignore_status_mask = 0;
0669     if (termios->c_iflag & IGNPAR)
0670         up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
0671     if (termios->c_iflag & IGNBRK) {
0672         up->ignore_status_mask |= TXX9_SIDISR_UBRK;
0673         /*
0674          * If we're ignoring parity and break indicators,
0675          * ignore overruns too (for real raw support).
0676          */
0677         if (termios->c_iflag & IGNPAR)
0678             up->ignore_status_mask |= TXX9_SIDISR_UOER;
0679     }
0680 
0681     /*
0682      * ignore all characters if CREAD is not set
0683      */
0684     if ((termios->c_cflag & CREAD) == 0)
0685         up->ignore_status_mask |= TXX9_SIDISR_RDIS;
0686 
0687     /* CTS flow control flag */
0688     if ((termios->c_cflag & CRTSCTS) &&
0689         (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
0690         sio_set(up, TXX9_SIFLCR,
0691             TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
0692     } else {
0693         sio_mask(up, TXX9_SIFLCR,
0694              TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
0695     }
0696 
0697     sio_out(up, TXX9_SILCR, cval);
0698     sio_quot_set(up, quot);
0699     sio_out(up, TXX9_SIFCR, fcr);
0700 
0701     serial_txx9_set_mctrl(up, up->mctrl);
0702     spin_unlock_irqrestore(&up->lock, flags);
0703 }
0704 
0705 static void
0706 serial_txx9_pm(struct uart_port *port, unsigned int state,
0707           unsigned int oldstate)
0708 {
0709     /*
0710      * If oldstate was -1 this is called from
0711      * uart_configure_port().  In this case do not initialize the
0712      * port now, because the port was already initialized (for
0713      * non-console port) or should not be initialized here (for
0714      * console port).  If we initialized the port here we lose
0715      * serial console settings.
0716      */
0717     if (state == 0 && oldstate != -1)
0718         serial_txx9_initialize(port);
0719 }
0720 
0721 static int serial_txx9_request_resource(struct uart_port *up)
0722 {
0723     unsigned int size = TXX9_REGION_SIZE;
0724     int ret = 0;
0725 
0726     switch (up->iotype) {
0727     default:
0728         if (!up->mapbase)
0729             break;
0730 
0731         if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
0732             ret = -EBUSY;
0733             break;
0734         }
0735 
0736         if (up->flags & UPF_IOREMAP) {
0737             up->membase = ioremap(up->mapbase, size);
0738             if (!up->membase) {
0739                 release_mem_region(up->mapbase, size);
0740                 ret = -ENOMEM;
0741             }
0742         }
0743         break;
0744 
0745     case UPIO_PORT:
0746         if (!request_region(up->iobase, size, "serial_txx9"))
0747             ret = -EBUSY;
0748         break;
0749     }
0750     return ret;
0751 }
0752 
0753 static void serial_txx9_release_resource(struct uart_port *up)
0754 {
0755     unsigned int size = TXX9_REGION_SIZE;
0756 
0757     switch (up->iotype) {
0758     default:
0759         if (!up->mapbase)
0760             break;
0761 
0762         if (up->flags & UPF_IOREMAP) {
0763             iounmap(up->membase);
0764             up->membase = NULL;
0765         }
0766 
0767         release_mem_region(up->mapbase, size);
0768         break;
0769 
0770     case UPIO_PORT:
0771         release_region(up->iobase, size);
0772         break;
0773     }
0774 }
0775 
0776 static void serial_txx9_release_port(struct uart_port *up)
0777 {
0778     serial_txx9_release_resource(up);
0779 }
0780 
0781 static int serial_txx9_request_port(struct uart_port *up)
0782 {
0783     return serial_txx9_request_resource(up);
0784 }
0785 
0786 static void serial_txx9_config_port(struct uart_port *up, int uflags)
0787 {
0788     int ret;
0789 
0790     /*
0791      * Find the region that we can probe for.  This in turn
0792      * tells us whether we can probe for the type of port.
0793      */
0794     ret = serial_txx9_request_resource(up);
0795     if (ret < 0)
0796         return;
0797     up->type = PORT_TXX9;
0798     up->fifosize = TXX9_SIO_TX_FIFO;
0799 
0800 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
0801     if (up->line == up->cons->index)
0802         return;
0803 #endif
0804     serial_txx9_initialize(up);
0805 }
0806 
0807 static const char *
0808 serial_txx9_type(struct uart_port *port)
0809 {
0810     return "txx9";
0811 }
0812 
0813 static const struct uart_ops serial_txx9_pops = {
0814     .tx_empty   = serial_txx9_tx_empty,
0815     .set_mctrl  = serial_txx9_set_mctrl,
0816     .get_mctrl  = serial_txx9_get_mctrl,
0817     .stop_tx    = serial_txx9_stop_tx,
0818     .start_tx   = serial_txx9_start_tx,
0819     .stop_rx    = serial_txx9_stop_rx,
0820     .break_ctl  = serial_txx9_break_ctl,
0821     .startup    = serial_txx9_startup,
0822     .shutdown   = serial_txx9_shutdown,
0823     .set_termios    = serial_txx9_set_termios,
0824     .pm     = serial_txx9_pm,
0825     .type       = serial_txx9_type,
0826     .release_port   = serial_txx9_release_port,
0827     .request_port   = serial_txx9_request_port,
0828     .config_port    = serial_txx9_config_port,
0829 #ifdef CONFIG_CONSOLE_POLL
0830     .poll_get_char  = serial_txx9_get_poll_char,
0831     .poll_put_char  = serial_txx9_put_poll_char,
0832 #endif
0833 };
0834 
0835 static struct uart_port serial_txx9_ports[UART_NR];
0836 
0837 static void __init serial_txx9_register_ports(struct uart_driver *drv,
0838                           struct device *dev)
0839 {
0840     int i;
0841 
0842     for (i = 0; i < UART_NR; i++) {
0843         struct uart_port *up = &serial_txx9_ports[i];
0844 
0845         up->line = i;
0846         up->ops = &serial_txx9_pops;
0847         up->dev = dev;
0848         if (up->iobase || up->mapbase)
0849             uart_add_one_port(drv, up);
0850     }
0851 }
0852 
0853 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
0854 
0855 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
0856 {
0857     wait_for_xmitr(up);
0858     sio_out(up, TXX9_SITFIFO, ch);
0859 }
0860 
0861 /*
0862  *  Print a string to the serial port trying not to disturb
0863  *  any possible real use of the port...
0864  *
0865  *  The console_lock must be held when we get here.
0866  */
0867 static void
0868 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
0869 {
0870     struct uart_port *up = &serial_txx9_ports[co->index];
0871     unsigned int ier, flcr;
0872 
0873     /*
0874      *  First save the UER then disable the interrupts
0875      */
0876     ier = sio_in(up, TXX9_SIDICR);
0877     sio_out(up, TXX9_SIDICR, 0);
0878     /*
0879      *  Disable flow-control if enabled (and unnecessary)
0880      */
0881     flcr = sio_in(up, TXX9_SIFLCR);
0882     if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
0883         sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
0884 
0885     uart_console_write(up, s, count, serial_txx9_console_putchar);
0886 
0887     /*
0888      *  Finally, wait for transmitter to become empty
0889      *  and restore the IER
0890      */
0891     wait_for_xmitr(up);
0892     sio_out(up, TXX9_SIFLCR, flcr);
0893     sio_out(up, TXX9_SIDICR, ier);
0894 }
0895 
0896 static int __init serial_txx9_console_setup(struct console *co, char *options)
0897 {
0898     struct uart_port *up;
0899     int baud = 9600;
0900     int bits = 8;
0901     int parity = 'n';
0902     int flow = 'n';
0903 
0904     /*
0905      * Check whether an invalid uart number has been specified, and
0906      * if so, search for the first available port that does have
0907      * console support.
0908      */
0909     if (co->index >= UART_NR)
0910         co->index = 0;
0911     up = &serial_txx9_ports[co->index];
0912     if (!up->ops)
0913         return -ENODEV;
0914 
0915     serial_txx9_initialize(up);
0916 
0917     if (options)
0918         uart_parse_options(options, &baud, &parity, &bits, &flow);
0919 
0920     return uart_set_options(up, co, baud, parity, bits, flow);
0921 }
0922 
0923 static struct uart_driver serial_txx9_reg;
0924 static struct console serial_txx9_console = {
0925     .name       = TXX9_TTY_NAME,
0926     .write      = serial_txx9_console_write,
0927     .device     = uart_console_device,
0928     .setup      = serial_txx9_console_setup,
0929     .flags      = CON_PRINTBUFFER,
0930     .index      = -1,
0931     .data       = &serial_txx9_reg,
0932 };
0933 
0934 static int __init serial_txx9_console_init(void)
0935 {
0936     register_console(&serial_txx9_console);
0937     return 0;
0938 }
0939 console_initcall(serial_txx9_console_init);
0940 
0941 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
0942 #else
0943 #define SERIAL_TXX9_CONSOLE NULL
0944 #endif
0945 
0946 static struct uart_driver serial_txx9_reg = {
0947     .owner          = THIS_MODULE,
0948     .driver_name        = "serial_txx9",
0949     .dev_name       = TXX9_TTY_NAME,
0950     .major          = TXX9_TTY_MAJOR,
0951     .minor          = TXX9_TTY_MINOR_START,
0952     .nr         = UART_NR,
0953     .cons           = SERIAL_TXX9_CONSOLE,
0954 };
0955 
0956 int __init early_serial_txx9_setup(struct uart_port *port)
0957 {
0958     if (port->line >= ARRAY_SIZE(serial_txx9_ports))
0959         return -ENODEV;
0960 
0961     serial_txx9_ports[port->line] = *port;
0962     serial_txx9_ports[port->line].ops = &serial_txx9_pops;
0963     serial_txx9_ports[port->line].flags |=
0964         UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
0965     return 0;
0966 }
0967 
0968 static DEFINE_MUTEX(serial_txx9_mutex);
0969 
0970 /**
0971  *  serial_txx9_register_port - register a serial port
0972  *  @port: serial port template
0973  *
0974  *  Configure the serial port specified by the request.
0975  *
0976  *  The port is then probed and if necessary the IRQ is autodetected
0977  *  If this fails an error is returned.
0978  *
0979  *  On success the port is ready to use and the line number is returned.
0980  */
0981 static int serial_txx9_register_port(struct uart_port *port)
0982 {
0983     int i;
0984     struct uart_port *uart;
0985     int ret = -ENOSPC;
0986 
0987     mutex_lock(&serial_txx9_mutex);
0988     for (i = 0; i < UART_NR; i++) {
0989         uart = &serial_txx9_ports[i];
0990         if (uart_match_port(uart, port)) {
0991             uart_remove_one_port(&serial_txx9_reg, uart);
0992             break;
0993         }
0994     }
0995     if (i == UART_NR) {
0996         /* Find unused port */
0997         for (i = 0; i < UART_NR; i++) {
0998             uart = &serial_txx9_ports[i];
0999             if (!(uart->iobase || uart->mapbase))
1000                 break;
1001         }
1002     }
1003     if (i < UART_NR) {
1004         uart->iobase = port->iobase;
1005         uart->membase = port->membase;
1006         uart->irq      = port->irq;
1007         uart->uartclk  = port->uartclk;
1008         uart->iotype   = port->iotype;
1009         uart->flags    = port->flags
1010             | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1011         uart->mapbase  = port->mapbase;
1012         if (port->dev)
1013             uart->dev = port->dev;
1014         ret = uart_add_one_port(&serial_txx9_reg, uart);
1015         if (ret == 0)
1016             ret = uart->line;
1017     }
1018     mutex_unlock(&serial_txx9_mutex);
1019     return ret;
1020 }
1021 
1022 /**
1023  *  serial_txx9_unregister_port - remove a txx9 serial port at runtime
1024  *  @line: serial line number
1025  *
1026  *  Remove one serial port.  This may not be called from interrupt
1027  *  context.  We hand the port back to the our control.
1028  */
1029 static void serial_txx9_unregister_port(int line)
1030 {
1031     struct uart_port *uart = &serial_txx9_ports[line];
1032 
1033     mutex_lock(&serial_txx9_mutex);
1034     uart_remove_one_port(&serial_txx9_reg, uart);
1035     uart->flags = 0;
1036     uart->type = PORT_UNKNOWN;
1037     uart->iobase = 0;
1038     uart->mapbase = 0;
1039     uart->membase = NULL;
1040     uart->dev = NULL;
1041     mutex_unlock(&serial_txx9_mutex);
1042 }
1043 
1044 /*
1045  * Register a set of serial devices attached to a platform device.
1046  */
1047 static int serial_txx9_probe(struct platform_device *dev)
1048 {
1049     struct uart_port *p = dev_get_platdata(&dev->dev);
1050     struct uart_port port;
1051     int ret, i;
1052 
1053     memset(&port, 0, sizeof(struct uart_port));
1054     for (i = 0; p && p->uartclk != 0; p++, i++) {
1055         port.iobase = p->iobase;
1056         port.membase    = p->membase;
1057         port.irq    = p->irq;
1058         port.uartclk    = p->uartclk;
1059         port.iotype = p->iotype;
1060         port.flags  = p->flags;
1061         port.mapbase    = p->mapbase;
1062         port.dev    = &dev->dev;
1063         port.has_sysrq  = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1064         ret = serial_txx9_register_port(&port);
1065         if (ret < 0) {
1066             dev_err(&dev->dev, "unable to register port at index %d "
1067                 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1068                 p->iobase, (unsigned long long)p->mapbase,
1069                 p->irq, ret);
1070         }
1071     }
1072     return 0;
1073 }
1074 
1075 /*
1076  * Remove serial ports registered against a platform device.
1077  */
1078 static int serial_txx9_remove(struct platform_device *dev)
1079 {
1080     int i;
1081 
1082     for (i = 0; i < UART_NR; i++) {
1083         struct uart_port *up = &serial_txx9_ports[i];
1084 
1085         if (up->dev == &dev->dev)
1086             serial_txx9_unregister_port(i);
1087     }
1088     return 0;
1089 }
1090 
1091 #ifdef CONFIG_PM
1092 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1093 {
1094     int i;
1095 
1096     for (i = 0; i < UART_NR; i++) {
1097         struct uart_port *up = &serial_txx9_ports[i];
1098 
1099         if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1100             uart_suspend_port(&serial_txx9_reg, up);
1101     }
1102 
1103     return 0;
1104 }
1105 
1106 static int serial_txx9_resume(struct platform_device *dev)
1107 {
1108     int i;
1109 
1110     for (i = 0; i < UART_NR; i++) {
1111         struct uart_port *up = &serial_txx9_ports[i];
1112 
1113         if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1114             uart_resume_port(&serial_txx9_reg, up);
1115     }
1116 
1117     return 0;
1118 }
1119 #endif
1120 
1121 static struct platform_driver serial_txx9_plat_driver = {
1122     .probe      = serial_txx9_probe,
1123     .remove     = serial_txx9_remove,
1124 #ifdef CONFIG_PM
1125     .suspend    = serial_txx9_suspend,
1126     .resume     = serial_txx9_resume,
1127 #endif
1128     .driver     = {
1129         .name   = "serial_txx9",
1130     },
1131 };
1132 
1133 #ifdef ENABLE_SERIAL_TXX9_PCI
1134 /*
1135  * Probe one serial board.  Unfortunately, there is no rhyme nor reason
1136  * to the arrangement of serial ports on a PCI card.
1137  */
1138 static int
1139 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1140 {
1141     struct uart_port port;
1142     int line;
1143     int rc;
1144 
1145     rc = pci_enable_device(dev);
1146     if (rc)
1147         return rc;
1148 
1149     memset(&port, 0, sizeof(port));
1150     port.ops = &serial_txx9_pops;
1151     port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1152     port.uartclk = 66670000;
1153     port.irq = dev->irq;
1154     port.iotype = UPIO_PORT;
1155     port.iobase = pci_resource_start(dev, 1);
1156     port.dev = &dev->dev;
1157     line = serial_txx9_register_port(&port);
1158     if (line < 0) {
1159         printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1160         pci_disable_device(dev);
1161         return line;
1162     }
1163     pci_set_drvdata(dev, &serial_txx9_ports[line]);
1164 
1165     return 0;
1166 }
1167 
1168 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1169 {
1170     struct uart_port *up = pci_get_drvdata(dev);
1171 
1172     if (up) {
1173         serial_txx9_unregister_port(up->line);
1174         pci_disable_device(dev);
1175     }
1176 }
1177 
1178 #ifdef CONFIG_PM
1179 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1180 {
1181     struct uart_port *up = pci_get_drvdata(dev);
1182 
1183     if (up)
1184         uart_suspend_port(&serial_txx9_reg, up);
1185     pci_save_state(dev);
1186     pci_set_power_state(dev, pci_choose_state(dev, state));
1187     return 0;
1188 }
1189 
1190 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1191 {
1192     struct uart_port *up = pci_get_drvdata(dev);
1193 
1194     pci_set_power_state(dev, PCI_D0);
1195     pci_restore_state(dev);
1196     if (up)
1197         uart_resume_port(&serial_txx9_reg, up);
1198     return 0;
1199 }
1200 #endif
1201 
1202 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1203     { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1204     { 0, }
1205 };
1206 
1207 static struct pci_driver serial_txx9_pci_driver = {
1208     .name       = "serial_txx9",
1209     .probe      = pciserial_txx9_init_one,
1210     .remove     = pciserial_txx9_remove_one,
1211 #ifdef CONFIG_PM
1212     .suspend    = pciserial_txx9_suspend_one,
1213     .resume     = pciserial_txx9_resume_one,
1214 #endif
1215     .id_table   = serial_txx9_pci_tbl,
1216 };
1217 
1218 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1219 #endif /* ENABLE_SERIAL_TXX9_PCI */
1220 
1221 static struct platform_device *serial_txx9_plat_devs;
1222 
1223 static int __init serial_txx9_init(void)
1224 {
1225     int ret;
1226 
1227     ret = uart_register_driver(&serial_txx9_reg);
1228     if (ret)
1229         goto out;
1230 
1231     serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1232     if (!serial_txx9_plat_devs) {
1233         ret = -ENOMEM;
1234         goto unreg_uart_drv;
1235     }
1236 
1237     ret = platform_device_add(serial_txx9_plat_devs);
1238     if (ret)
1239         goto put_dev;
1240 
1241     serial_txx9_register_ports(&serial_txx9_reg,
1242                    &serial_txx9_plat_devs->dev);
1243 
1244     ret = platform_driver_register(&serial_txx9_plat_driver);
1245     if (ret)
1246         goto del_dev;
1247 
1248 #ifdef ENABLE_SERIAL_TXX9_PCI
1249     ret = pci_register_driver(&serial_txx9_pci_driver);
1250     if (ret) {
1251         platform_driver_unregister(&serial_txx9_plat_driver);
1252     }
1253 #endif
1254     if (ret == 0)
1255         goto out;
1256 
1257  del_dev:
1258     platform_device_del(serial_txx9_plat_devs);
1259  put_dev:
1260     platform_device_put(serial_txx9_plat_devs);
1261  unreg_uart_drv:
1262     uart_unregister_driver(&serial_txx9_reg);
1263  out:
1264     return ret;
1265 }
1266 
1267 static void __exit serial_txx9_exit(void)
1268 {
1269     int i;
1270 
1271 #ifdef ENABLE_SERIAL_TXX9_PCI
1272     pci_unregister_driver(&serial_txx9_pci_driver);
1273 #endif
1274     platform_driver_unregister(&serial_txx9_plat_driver);
1275     platform_device_unregister(serial_txx9_plat_devs);
1276     for (i = 0; i < UART_NR; i++) {
1277         struct uart_port *up = &serial_txx9_ports[i];
1278         if (up->iobase || up->mapbase)
1279             uart_remove_one_port(&serial_txx9_reg, up);
1280     }
1281 
1282     uart_unregister_driver(&serial_txx9_reg);
1283 }
1284 
1285 module_init(serial_txx9_init);
1286 module_exit(serial_txx9_exit);
1287 
1288 MODULE_LICENSE("GPL");
1289 MODULE_DESCRIPTION("TX39/49 serial driver");
1290 
1291 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
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