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0010 #include <linux/clk.h>
0011 #include <linux/console.h>
0012 #include <linux/delay.h>
0013 #include <linux/io.h>
0014 #include <linux/module.h>
0015 #include <linux/of.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/serial.h>
0018 #include <linux/serial_core.h>
0019 #include <linux/tty.h>
0020 #include <linux/tty_flip.h>
0021
0022 #define RDA_UART_PORT_NUM 3
0023 #define RDA_UART_DEV_NAME "ttyRDA"
0024
0025 #define RDA_UART_CTRL 0x00
0026 #define RDA_UART_STATUS 0x04
0027 #define RDA_UART_RXTX_BUFFER 0x08
0028 #define RDA_UART_IRQ_MASK 0x0c
0029 #define RDA_UART_IRQ_CAUSE 0x10
0030 #define RDA_UART_IRQ_TRIGGERS 0x14
0031 #define RDA_UART_CMD_SET 0x18
0032 #define RDA_UART_CMD_CLR 0x1c
0033
0034
0035 #define RDA_UART_ENABLE BIT(0)
0036 #define RDA_UART_DBITS_8 BIT(1)
0037 #define RDA_UART_TX_SBITS_2 BIT(2)
0038 #define RDA_UART_PARITY_EN BIT(3)
0039 #define RDA_UART_PARITY(x) (((x) & 0x3) << 4)
0040 #define RDA_UART_PARITY_ODD RDA_UART_PARITY(0)
0041 #define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1)
0042 #define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2)
0043 #define RDA_UART_PARITY_MARK RDA_UART_PARITY(3)
0044 #define RDA_UART_DIV_MODE BIT(20)
0045 #define RDA_UART_IRDA_EN BIT(21)
0046 #define RDA_UART_DMA_EN BIT(22)
0047 #define RDA_UART_FLOW_CNT_EN BIT(23)
0048 #define RDA_UART_LOOP_BACK_EN BIT(24)
0049 #define RDA_UART_RX_LOCK_ERR BIT(25)
0050 #define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28)
0051
0052
0053 #define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0)
0054 #define RDA_UART_RX_FIFO_MASK (0x7f << 0)
0055 #define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8)
0056 #define RDA_UART_TX_FIFO_MASK (0x1f << 8)
0057 #define RDA_UART_TX_ACTIVE BIT(14)
0058 #define RDA_UART_RX_ACTIVE BIT(15)
0059 #define RDA_UART_RX_OVERFLOW_ERR BIT(16)
0060 #define RDA_UART_TX_OVERFLOW_ERR BIT(17)
0061 #define RDA_UART_RX_PARITY_ERR BIT(18)
0062 #define RDA_UART_RX_FRAMING_ERR BIT(19)
0063 #define RDA_UART_RX_BREAK_INT BIT(20)
0064 #define RDA_UART_DCTS BIT(24)
0065 #define RDA_UART_CTS BIT(25)
0066 #define RDA_UART_DTR BIT(28)
0067 #define RDA_UART_CLK_ENABLED BIT(31)
0068
0069
0070 #define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0)
0071 #define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0)
0072
0073
0074 #define RDA_UART_TX_MODEM_STATUS BIT(0)
0075 #define RDA_UART_RX_DATA_AVAILABLE BIT(1)
0076 #define RDA_UART_TX_DATA_NEEDED BIT(2)
0077 #define RDA_UART_RX_TIMEOUT BIT(3)
0078 #define RDA_UART_RX_LINE_ERR BIT(4)
0079 #define RDA_UART_TX_DMA_DONE BIT(5)
0080 #define RDA_UART_RX_DMA_DONE BIT(6)
0081 #define RDA_UART_RX_DMA_TIMEOUT BIT(7)
0082 #define RDA_UART_DTR_RISE BIT(8)
0083 #define RDA_UART_DTR_FALL BIT(9)
0084
0085
0086 #define RDA_UART_TX_MODEM_STATUS_U BIT(16)
0087 #define RDA_UART_RX_DATA_AVAILABLE_U BIT(17)
0088 #define RDA_UART_TX_DATA_NEEDED_U BIT(18)
0089 #define RDA_UART_RX_TIMEOUT_U BIT(19)
0090 #define RDA_UART_RX_LINE_ERR_U BIT(20)
0091 #define RDA_UART_TX_DMA_DONE_U BIT(21)
0092 #define RDA_UART_RX_DMA_DONE_U BIT(22)
0093 #define RDA_UART_RX_DMA_TIMEOUT_U BIT(23)
0094 #define RDA_UART_DTR_RISE_U BIT(24)
0095 #define RDA_UART_DTR_FALL_U BIT(25)
0096
0097
0098 #define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0)
0099 #define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8)
0100 #define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16)
0101
0102
0103 #define RDA_UART_RI BIT(0)
0104 #define RDA_UART_DCD BIT(1)
0105 #define RDA_UART_DSR BIT(2)
0106 #define RDA_UART_TX_BREAK_CONTROL BIT(3)
0107 #define RDA_UART_TX_FINISH_N_WAIT BIT(4)
0108 #define RDA_UART_RTS BIT(5)
0109 #define RDA_UART_RX_FIFO_RESET BIT(6)
0110 #define RDA_UART_TX_FIFO_RESET BIT(7)
0111
0112 #define RDA_UART_TX_FIFO_SIZE 16
0113
0114 static struct uart_driver rda_uart_driver;
0115
0116 struct rda_uart_port {
0117 struct uart_port port;
0118 struct clk *clk;
0119 };
0120
0121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
0122
0123 static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM];
0124
0125 static inline void rda_uart_write(struct uart_port *port, u32 val,
0126 unsigned int off)
0127 {
0128 writel(val, port->membase + off);
0129 }
0130
0131 static inline u32 rda_uart_read(struct uart_port *port, unsigned int off)
0132 {
0133 return readl(port->membase + off);
0134 }
0135
0136 static unsigned int rda_uart_tx_empty(struct uart_port *port)
0137 {
0138 unsigned long flags;
0139 unsigned int ret;
0140 u32 val;
0141
0142 spin_lock_irqsave(&port->lock, flags);
0143
0144 val = rda_uart_read(port, RDA_UART_STATUS);
0145 ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;
0146
0147 spin_unlock_irqrestore(&port->lock, flags);
0148
0149 return ret;
0150 }
0151
0152 static unsigned int rda_uart_get_mctrl(struct uart_port *port)
0153 {
0154 unsigned int mctrl = 0;
0155 u32 cmd_set, status;
0156
0157 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
0158 status = rda_uart_read(port, RDA_UART_STATUS);
0159 if (cmd_set & RDA_UART_RTS)
0160 mctrl |= TIOCM_RTS;
0161 if (!(status & RDA_UART_CTS))
0162 mctrl |= TIOCM_CTS;
0163
0164 return mctrl;
0165 }
0166
0167 static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
0168 {
0169 u32 val;
0170
0171 if (mctrl & TIOCM_RTS) {
0172 val = rda_uart_read(port, RDA_UART_CMD_SET);
0173 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET);
0174 } else {
0175
0176 val = rda_uart_read(port, RDA_UART_CMD_CLR);
0177 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR);
0178 }
0179
0180 val = rda_uart_read(port, RDA_UART_CTRL);
0181
0182 if (mctrl & TIOCM_LOOP)
0183 val |= RDA_UART_LOOP_BACK_EN;
0184 else
0185 val &= ~RDA_UART_LOOP_BACK_EN;
0186
0187 rda_uart_write(port, val, RDA_UART_CTRL);
0188 }
0189
0190 static void rda_uart_stop_tx(struct uart_port *port)
0191 {
0192 u32 val;
0193
0194 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
0195 val &= ~RDA_UART_TX_DATA_NEEDED;
0196 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
0197
0198 val = rda_uart_read(port, RDA_UART_CMD_SET);
0199 val |= RDA_UART_TX_FIFO_RESET;
0200 rda_uart_write(port, val, RDA_UART_CMD_SET);
0201 }
0202
0203 static void rda_uart_stop_rx(struct uart_port *port)
0204 {
0205 u32 val;
0206
0207 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
0208 val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
0209 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
0210
0211
0212 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
0213
0214 val = rda_uart_read(port, RDA_UART_CMD_SET);
0215 val |= RDA_UART_RX_FIFO_RESET;
0216 rda_uart_write(port, val, RDA_UART_CMD_SET);
0217 }
0218
0219 static void rda_uart_start_tx(struct uart_port *port)
0220 {
0221 u32 val;
0222
0223 if (uart_tx_stopped(port)) {
0224 rda_uart_stop_tx(port);
0225 return;
0226 }
0227
0228 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
0229 val |= RDA_UART_TX_DATA_NEEDED;
0230 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
0231 }
0232
0233 static void rda_uart_change_baudrate(struct rda_uart_port *rda_port,
0234 unsigned long baud)
0235 {
0236 clk_set_rate(rda_port->clk, baud * 8);
0237 }
0238
0239 static void rda_uart_set_termios(struct uart_port *port,
0240 struct ktermios *termios,
0241 struct ktermios *old)
0242 {
0243 struct rda_uart_port *rda_port = to_rda_uart_port(port);
0244 unsigned long flags;
0245 unsigned int ctrl, cmd_set, cmd_clr, triggers;
0246 unsigned int baud;
0247 u32 irq_mask;
0248
0249 spin_lock_irqsave(&port->lock, flags);
0250
0251 baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
0252 rda_uart_change_baudrate(rda_port, baud);
0253
0254 ctrl = rda_uart_read(port, RDA_UART_CTRL);
0255 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
0256 cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR);
0257
0258 switch (termios->c_cflag & CSIZE) {
0259 case CS5:
0260 case CS6:
0261 dev_warn(port->dev, "bit size not supported, using 7 bits\n");
0262 fallthrough;
0263 case CS7:
0264 ctrl &= ~RDA_UART_DBITS_8;
0265 termios->c_cflag &= ~CSIZE;
0266 termios->c_cflag |= CS7;
0267 break;
0268 default:
0269 ctrl |= RDA_UART_DBITS_8;
0270 break;
0271 }
0272
0273
0274 if (termios->c_cflag & CSTOPB)
0275 ctrl |= RDA_UART_TX_SBITS_2;
0276 else
0277 ctrl &= ~RDA_UART_TX_SBITS_2;
0278
0279
0280 if (termios->c_cflag & PARENB) {
0281 ctrl |= RDA_UART_PARITY_EN;
0282
0283
0284 if (termios->c_cflag & CMSPAR) {
0285 if (termios->c_cflag & PARODD)
0286 ctrl |= RDA_UART_PARITY_MARK;
0287 else
0288 ctrl |= RDA_UART_PARITY_SPACE;
0289 } else if (termios->c_cflag & PARODD) {
0290 ctrl |= RDA_UART_PARITY_ODD;
0291 } else {
0292 ctrl |= RDA_UART_PARITY_EVEN;
0293 }
0294 } else {
0295 ctrl &= ~RDA_UART_PARITY_EN;
0296 }
0297
0298
0299 if (termios->c_cflag & CRTSCTS) {
0300 ctrl |= RDA_UART_FLOW_CNT_EN;
0301 cmd_set |= RDA_UART_RTS;
0302 } else {
0303 ctrl &= ~RDA_UART_FLOW_CNT_EN;
0304 cmd_clr |= RDA_UART_RTS;
0305 }
0306
0307 ctrl |= RDA_UART_ENABLE;
0308 ctrl &= ~RDA_UART_DMA_EN;
0309
0310 triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
0311 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
0312 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
0313
0314 rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS);
0315 rda_uart_write(port, ctrl, RDA_UART_CTRL);
0316 rda_uart_write(port, cmd_set, RDA_UART_CMD_SET);
0317 rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR);
0318
0319 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
0320
0321
0322 if (tty_termios_baud_rate(termios))
0323 tty_termios_encode_baud_rate(termios, baud, baud);
0324
0325
0326 uart_update_timeout(port, termios->c_cflag, baud);
0327
0328 spin_unlock_irqrestore(&port->lock, flags);
0329 }
0330
0331 static void rda_uart_send_chars(struct uart_port *port)
0332 {
0333 struct circ_buf *xmit = &port->state->xmit;
0334 unsigned int ch;
0335 u32 val;
0336
0337 if (uart_tx_stopped(port))
0338 return;
0339
0340 if (port->x_char) {
0341 while (!(rda_uart_read(port, RDA_UART_STATUS) &
0342 RDA_UART_TX_FIFO_MASK))
0343 cpu_relax();
0344
0345 rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER);
0346 port->icount.tx++;
0347 port->x_char = 0;
0348 }
0349
0350 while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) {
0351 if (uart_circ_empty(xmit))
0352 break;
0353
0354 ch = xmit->buf[xmit->tail];
0355 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
0356 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0357 port->icount.tx++;
0358 }
0359
0360 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0361 uart_write_wakeup(port);
0362
0363 if (!uart_circ_empty(xmit)) {
0364
0365 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
0366 val |= RDA_UART_TX_DATA_NEEDED;
0367 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
0368 }
0369 }
0370
0371 static void rda_uart_receive_chars(struct uart_port *port)
0372 {
0373 u32 status, val;
0374
0375 status = rda_uart_read(port, RDA_UART_STATUS);
0376 while ((status & RDA_UART_RX_FIFO_MASK)) {
0377 char flag = TTY_NORMAL;
0378
0379 if (status & RDA_UART_RX_PARITY_ERR) {
0380 port->icount.parity++;
0381 flag = TTY_PARITY;
0382 }
0383
0384 if (status & RDA_UART_RX_FRAMING_ERR) {
0385 port->icount.frame++;
0386 flag = TTY_FRAME;
0387 }
0388
0389 if (status & RDA_UART_RX_OVERFLOW_ERR) {
0390 port->icount.overrun++;
0391 flag = TTY_OVERRUN;
0392 }
0393
0394 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
0395 val &= 0xff;
0396
0397 port->icount.rx++;
0398 tty_insert_flip_char(&port->state->port, val, flag);
0399
0400 status = rda_uart_read(port, RDA_UART_STATUS);
0401 }
0402
0403 tty_flip_buffer_push(&port->state->port);
0404 }
0405
0406 static irqreturn_t rda_interrupt(int irq, void *dev_id)
0407 {
0408 struct uart_port *port = dev_id;
0409 unsigned long flags;
0410 u32 val, irq_mask;
0411
0412 spin_lock_irqsave(&port->lock, flags);
0413
0414
0415 val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);
0416 rda_uart_write(port, val, RDA_UART_IRQ_CAUSE);
0417
0418 if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT))
0419 rda_uart_receive_chars(port);
0420
0421 if (val & (RDA_UART_TX_DATA_NEEDED)) {
0422 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
0423 irq_mask &= ~RDA_UART_TX_DATA_NEEDED;
0424 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
0425
0426 rda_uart_send_chars(port);
0427 }
0428
0429 spin_unlock_irqrestore(&port->lock, flags);
0430
0431 return IRQ_HANDLED;
0432 }
0433
0434 static int rda_uart_startup(struct uart_port *port)
0435 {
0436 unsigned long flags;
0437 int ret;
0438 u32 val;
0439
0440 spin_lock_irqsave(&port->lock, flags);
0441 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
0442 spin_unlock_irqrestore(&port->lock, flags);
0443
0444 ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
0445 "rda-uart", port);
0446 if (ret)
0447 return ret;
0448
0449 spin_lock_irqsave(&port->lock, flags);
0450
0451 val = rda_uart_read(port, RDA_UART_CTRL);
0452 val |= RDA_UART_ENABLE;
0453 rda_uart_write(port, val, RDA_UART_CTRL);
0454
0455
0456 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
0457 val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
0458 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
0459
0460 spin_unlock_irqrestore(&port->lock, flags);
0461
0462 return 0;
0463 }
0464
0465 static void rda_uart_shutdown(struct uart_port *port)
0466 {
0467 unsigned long flags;
0468 u32 val;
0469
0470 spin_lock_irqsave(&port->lock, flags);
0471
0472 rda_uart_stop_tx(port);
0473 rda_uart_stop_rx(port);
0474
0475 val = rda_uart_read(port, RDA_UART_CTRL);
0476 val &= ~RDA_UART_ENABLE;
0477 rda_uart_write(port, val, RDA_UART_CTRL);
0478
0479 spin_unlock_irqrestore(&port->lock, flags);
0480 }
0481
0482 static const char *rda_uart_type(struct uart_port *port)
0483 {
0484 return (port->type == PORT_RDA) ? "rda-uart" : NULL;
0485 }
0486
0487 static int rda_uart_request_port(struct uart_port *port)
0488 {
0489 struct platform_device *pdev = to_platform_device(port->dev);
0490 struct resource *res;
0491
0492 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0493 if (!res)
0494 return -ENXIO;
0495
0496 if (!devm_request_mem_region(port->dev, port->mapbase,
0497 resource_size(res), dev_name(port->dev)))
0498 return -EBUSY;
0499
0500 if (port->flags & UPF_IOREMAP) {
0501 port->membase = devm_ioremap(port->dev, port->mapbase,
0502 resource_size(res));
0503 if (!port->membase)
0504 return -EBUSY;
0505 }
0506
0507 return 0;
0508 }
0509
0510 static void rda_uart_config_port(struct uart_port *port, int flags)
0511 {
0512 unsigned long irq_flags;
0513
0514 if (flags & UART_CONFIG_TYPE) {
0515 port->type = PORT_RDA;
0516 rda_uart_request_port(port);
0517 }
0518
0519 spin_lock_irqsave(&port->lock, irq_flags);
0520
0521
0522 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
0523
0524
0525 rda_uart_write(port, 0, RDA_UART_STATUS);
0526
0527 spin_unlock_irqrestore(&port->lock, irq_flags);
0528 }
0529
0530 static void rda_uart_release_port(struct uart_port *port)
0531 {
0532 struct platform_device *pdev = to_platform_device(port->dev);
0533 struct resource *res;
0534
0535 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0536 if (!res)
0537 return;
0538
0539 if (port->flags & UPF_IOREMAP) {
0540 devm_release_mem_region(port->dev, port->mapbase,
0541 resource_size(res));
0542 devm_iounmap(port->dev, port->membase);
0543 port->membase = NULL;
0544 }
0545 }
0546
0547 static int rda_uart_verify_port(struct uart_port *port,
0548 struct serial_struct *ser)
0549 {
0550 if (port->type != PORT_RDA)
0551 return -EINVAL;
0552
0553 if (port->irq != ser->irq)
0554 return -EINVAL;
0555
0556 return 0;
0557 }
0558
0559 static const struct uart_ops rda_uart_ops = {
0560 .tx_empty = rda_uart_tx_empty,
0561 .get_mctrl = rda_uart_get_mctrl,
0562 .set_mctrl = rda_uart_set_mctrl,
0563 .start_tx = rda_uart_start_tx,
0564 .stop_tx = rda_uart_stop_tx,
0565 .stop_rx = rda_uart_stop_rx,
0566 .startup = rda_uart_startup,
0567 .shutdown = rda_uart_shutdown,
0568 .set_termios = rda_uart_set_termios,
0569 .type = rda_uart_type,
0570 .request_port = rda_uart_request_port,
0571 .release_port = rda_uart_release_port,
0572 .config_port = rda_uart_config_port,
0573 .verify_port = rda_uart_verify_port,
0574 };
0575
0576 #ifdef CONFIG_SERIAL_RDA_CONSOLE
0577
0578 static void rda_console_putchar(struct uart_port *port, unsigned char ch)
0579 {
0580 if (!port->membase)
0581 return;
0582
0583 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
0584 cpu_relax();
0585
0586 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
0587 }
0588
0589 static void rda_uart_port_write(struct uart_port *port, const char *s,
0590 u_int count)
0591 {
0592 u32 old_irq_mask;
0593 unsigned long flags;
0594 int locked;
0595
0596 local_irq_save(flags);
0597
0598 if (port->sysrq) {
0599 locked = 0;
0600 } else if (oops_in_progress) {
0601 locked = spin_trylock(&port->lock);
0602 } else {
0603 spin_lock(&port->lock);
0604 locked = 1;
0605 }
0606
0607 old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
0608 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
0609
0610 uart_console_write(port, s, count, rda_console_putchar);
0611
0612
0613 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
0614 cpu_relax();
0615
0616 rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);
0617
0618 if (locked)
0619 spin_unlock(&port->lock);
0620
0621 local_irq_restore(flags);
0622 }
0623
0624 static void rda_uart_console_write(struct console *co, const char *s,
0625 u_int count)
0626 {
0627 struct rda_uart_port *rda_port;
0628
0629 rda_port = rda_uart_ports[co->index];
0630 if (!rda_port)
0631 return;
0632
0633 rda_uart_port_write(&rda_port->port, s, count);
0634 }
0635
0636 static int rda_uart_console_setup(struct console *co, char *options)
0637 {
0638 struct rda_uart_port *rda_port;
0639 int baud = 921600;
0640 int bits = 8;
0641 int parity = 'n';
0642 int flow = 'n';
0643
0644 if (co->index < 0 || co->index >= RDA_UART_PORT_NUM)
0645 return -EINVAL;
0646
0647 rda_port = rda_uart_ports[co->index];
0648 if (!rda_port || !rda_port->port.membase)
0649 return -ENODEV;
0650
0651 if (options)
0652 uart_parse_options(options, &baud, &parity, &bits, &flow);
0653
0654 return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
0655 }
0656
0657 static struct console rda_uart_console = {
0658 .name = RDA_UART_DEV_NAME,
0659 .write = rda_uart_console_write,
0660 .device = uart_console_device,
0661 .setup = rda_uart_console_setup,
0662 .flags = CON_PRINTBUFFER,
0663 .index = -1,
0664 .data = &rda_uart_driver,
0665 };
0666
0667 static int __init rda_uart_console_init(void)
0668 {
0669 register_console(&rda_uart_console);
0670
0671 return 0;
0672 }
0673 console_initcall(rda_uart_console_init);
0674
0675 static void rda_uart_early_console_write(struct console *co,
0676 const char *s,
0677 u_int count)
0678 {
0679 struct earlycon_device *dev = co->data;
0680
0681 rda_uart_port_write(&dev->port, s, count);
0682 }
0683
0684 static int __init
0685 rda_uart_early_console_setup(struct earlycon_device *device, const char *opt)
0686 {
0687 if (!device->port.membase)
0688 return -ENODEV;
0689
0690 device->con->write = rda_uart_early_console_write;
0691
0692 return 0;
0693 }
0694
0695 OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart",
0696 rda_uart_early_console_setup);
0697
0698 #define RDA_UART_CONSOLE (&rda_uart_console)
0699 #else
0700 #define RDA_UART_CONSOLE NULL
0701 #endif
0702
0703 static struct uart_driver rda_uart_driver = {
0704 .owner = THIS_MODULE,
0705 .driver_name = "rda-uart",
0706 .dev_name = RDA_UART_DEV_NAME,
0707 .nr = RDA_UART_PORT_NUM,
0708 .cons = RDA_UART_CONSOLE,
0709 };
0710
0711 static const struct of_device_id rda_uart_dt_matches[] = {
0712 { .compatible = "rda,8810pl-uart" },
0713 { }
0714 };
0715 MODULE_DEVICE_TABLE(of, rda_uart_dt_matches);
0716
0717 static int rda_uart_probe(struct platform_device *pdev)
0718 {
0719 struct resource *res_mem;
0720 struct rda_uart_port *rda_port;
0721 int ret, irq;
0722
0723 if (pdev->dev.of_node)
0724 pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
0725
0726 if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) {
0727 dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
0728 return -EINVAL;
0729 }
0730
0731 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0732 if (!res_mem) {
0733 dev_err(&pdev->dev, "could not get mem\n");
0734 return -ENODEV;
0735 }
0736
0737 irq = platform_get_irq(pdev, 0);
0738 if (irq < 0)
0739 return irq;
0740
0741 if (rda_uart_ports[pdev->id]) {
0742 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
0743 return -EBUSY;
0744 }
0745
0746 rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL);
0747 if (!rda_port)
0748 return -ENOMEM;
0749
0750 rda_port->clk = devm_clk_get(&pdev->dev, NULL);
0751 if (IS_ERR(rda_port->clk)) {
0752 dev_err(&pdev->dev, "could not get clk\n");
0753 return PTR_ERR(rda_port->clk);
0754 }
0755
0756 rda_port->port.dev = &pdev->dev;
0757 rda_port->port.regshift = 0;
0758 rda_port->port.line = pdev->id;
0759 rda_port->port.type = PORT_RDA;
0760 rda_port->port.iotype = UPIO_MEM;
0761 rda_port->port.mapbase = res_mem->start;
0762 rda_port->port.irq = irq;
0763 rda_port->port.uartclk = clk_get_rate(rda_port->clk);
0764 if (rda_port->port.uartclk == 0) {
0765 dev_err(&pdev->dev, "clock rate is zero\n");
0766 return -EINVAL;
0767 }
0768 rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
0769 UPF_LOW_LATENCY;
0770 rda_port->port.x_char = 0;
0771 rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE;
0772 rda_port->port.ops = &rda_uart_ops;
0773
0774 rda_uart_ports[pdev->id] = rda_port;
0775 platform_set_drvdata(pdev, rda_port);
0776
0777 ret = uart_add_one_port(&rda_uart_driver, &rda_port->port);
0778 if (ret)
0779 rda_uart_ports[pdev->id] = NULL;
0780
0781 return ret;
0782 }
0783
0784 static int rda_uart_remove(struct platform_device *pdev)
0785 {
0786 struct rda_uart_port *rda_port = platform_get_drvdata(pdev);
0787
0788 uart_remove_one_port(&rda_uart_driver, &rda_port->port);
0789 rda_uart_ports[pdev->id] = NULL;
0790
0791 return 0;
0792 }
0793
0794 static struct platform_driver rda_uart_platform_driver = {
0795 .probe = rda_uart_probe,
0796 .remove = rda_uart_remove,
0797 .driver = {
0798 .name = "rda-uart",
0799 .of_match_table = rda_uart_dt_matches,
0800 },
0801 };
0802
0803 static int __init rda_uart_init(void)
0804 {
0805 int ret;
0806
0807 ret = uart_register_driver(&rda_uart_driver);
0808 if (ret)
0809 return ret;
0810
0811 ret = platform_driver_register(&rda_uart_platform_driver);
0812 if (ret)
0813 uart_unregister_driver(&rda_uart_driver);
0814
0815 return ret;
0816 }
0817
0818 static void __exit rda_uart_exit(void)
0819 {
0820 platform_driver_unregister(&rda_uart_platform_driver);
0821 uart_unregister_driver(&rda_uart_driver);
0822 }
0823
0824 module_init(rda_uart_init);
0825 module_exit(rda_uart_exit);
0826
0827 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
0828 MODULE_DESCRIPTION("RDA8810PL serial device driver");
0829 MODULE_LICENSE("GPL");