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0015 #include <linux/module.h>
0016 #include <linux/ioport.h>
0017 #include <linux/init.h>
0018 #include <linux/serial.h>
0019 #include <linux/tty.h>
0020 #include <linux/tty_flip.h>
0021 #include <linux/console.h>
0022 #include <linux/delay.h> /* for udelay */
0023 #include <linux/device.h>
0024 #include <linux/io.h>
0025 #include <asm/irq.h>
0026 #include <asm/parisc-device.h>
0027
0028 #include <linux/sysrq.h>
0029 #include <linux/serial_core.h>
0030
0031 #define MUX_OFFSET 0x800
0032 #define MUX_LINE_OFFSET 0x80
0033
0034 #define MUX_FIFO_SIZE 255
0035 #define MUX_POLL_DELAY (30 * HZ / 1000)
0036
0037 #define IO_DATA_REG_OFFSET 0x3c
0038 #define IO_DCOUNT_REG_OFFSET 0x40
0039
0040 #define MUX_EOFIFO(status) ((status & 0xF000) == 0xF000)
0041 #define MUX_STATUS(status) ((status & 0xF000) == 0x8000)
0042 #define MUX_BREAK(status) ((status & 0xF000) == 0x2000)
0043
0044 #define MUX_NR 256
0045 static unsigned int port_cnt __read_mostly;
0046 struct mux_port {
0047 struct uart_port port;
0048 int enabled;
0049 };
0050 static struct mux_port mux_ports[MUX_NR];
0051
0052 static struct uart_driver mux_driver = {
0053 .owner = THIS_MODULE,
0054 .driver_name = "ttyB",
0055 .dev_name = "ttyB",
0056 .major = MUX_MAJOR,
0057 .minor = 0,
0058 .nr = MUX_NR,
0059 };
0060
0061 static struct timer_list mux_timer;
0062
0063 #define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + IO_DATA_REG_OFFSET)
0064 #define UART_GET_FIFO_CNT(p) __raw_readl((p)->membase + IO_DCOUNT_REG_OFFSET)
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076 static int __init get_mux_port_count(struct parisc_device *dev)
0077 {
0078 int status;
0079 u8 iodc_data[32];
0080 unsigned long bytecnt;
0081
0082
0083
0084
0085
0086 if(dev->id.hversion == 0x15)
0087 return 1;
0088
0089 status = pdc_iodc_read(&bytecnt, dev->hpa.start, 0, iodc_data, 32);
0090 BUG_ON(status != PDC_OK);
0091
0092
0093 return ((((iodc_data)[4] & 0xf0) >> 4) * 8) + 8;
0094 }
0095
0096
0097
0098
0099
0100
0101
0102
0103
0104 static unsigned int mux_tx_empty(struct uart_port *port)
0105 {
0106 return UART_GET_FIFO_CNT(port) ? 0 : TIOCSER_TEMT;
0107 }
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117 static void mux_set_mctrl(struct uart_port *port, unsigned int mctrl)
0118 {
0119 }
0120
0121
0122
0123
0124
0125
0126
0127
0128 static unsigned int mux_get_mctrl(struct uart_port *port)
0129 {
0130 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
0131 }
0132
0133
0134
0135
0136
0137
0138
0139 static void mux_stop_tx(struct uart_port *port)
0140 {
0141 }
0142
0143
0144
0145
0146
0147
0148
0149 static void mux_start_tx(struct uart_port *port)
0150 {
0151 }
0152
0153
0154
0155
0156
0157
0158
0159 static void mux_stop_rx(struct uart_port *port)
0160 {
0161 }
0162
0163
0164
0165
0166
0167
0168
0169
0170 static void mux_break_ctl(struct uart_port *port, int break_state)
0171 {
0172 }
0173
0174
0175
0176
0177
0178
0179
0180
0181 static void mux_write(struct uart_port *port)
0182 {
0183 int count;
0184 struct circ_buf *xmit = &port->state->xmit;
0185
0186 if(port->x_char) {
0187 UART_PUT_CHAR(port, port->x_char);
0188 port->icount.tx++;
0189 port->x_char = 0;
0190 return;
0191 }
0192
0193 if(uart_circ_empty(xmit) || uart_tx_stopped(port)) {
0194 mux_stop_tx(port);
0195 return;
0196 }
0197
0198 count = (port->fifosize) - UART_GET_FIFO_CNT(port);
0199 do {
0200 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
0201 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0202 port->icount.tx++;
0203 if(uart_circ_empty(xmit))
0204 break;
0205
0206 } while(--count > 0);
0207
0208 while(UART_GET_FIFO_CNT(port))
0209 udelay(1);
0210
0211 if(uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0212 uart_write_wakeup(port);
0213
0214 if (uart_circ_empty(xmit))
0215 mux_stop_tx(port);
0216 }
0217
0218
0219
0220
0221
0222
0223
0224
0225 static void mux_read(struct uart_port *port)
0226 {
0227 struct tty_port *tport = &port->state->port;
0228 int data;
0229 __u32 start_count = port->icount.rx;
0230
0231 while(1) {
0232 data = __raw_readl(port->membase + IO_DATA_REG_OFFSET);
0233
0234 if (MUX_STATUS(data))
0235 continue;
0236
0237 if (MUX_EOFIFO(data))
0238 break;
0239
0240 port->icount.rx++;
0241
0242 if (MUX_BREAK(data)) {
0243 port->icount.brk++;
0244 if(uart_handle_break(port))
0245 continue;
0246 }
0247
0248 if (uart_handle_sysrq_char(port, data & 0xffu))
0249 continue;
0250
0251 tty_insert_flip_char(tport, data & 0xFF, TTY_NORMAL);
0252 }
0253
0254 if (start_count != port->icount.rx)
0255 tty_flip_buffer_push(tport);
0256 }
0257
0258
0259
0260
0261
0262
0263
0264
0265 static int mux_startup(struct uart_port *port)
0266 {
0267 mux_ports[port->line].enabled = 1;
0268 return 0;
0269 }
0270
0271
0272
0273
0274
0275
0276
0277 static void mux_shutdown(struct uart_port *port)
0278 {
0279 mux_ports[port->line].enabled = 0;
0280 }
0281
0282
0283
0284
0285
0286
0287
0288
0289
0290 static void
0291 mux_set_termios(struct uart_port *port, struct ktermios *termios,
0292 struct ktermios *old)
0293 {
0294 }
0295
0296
0297
0298
0299
0300
0301
0302
0303 static const char *mux_type(struct uart_port *port)
0304 {
0305 return "Mux";
0306 }
0307
0308
0309
0310
0311
0312
0313
0314
0315 static void mux_release_port(struct uart_port *port)
0316 {
0317 }
0318
0319
0320
0321
0322
0323
0324
0325
0326
0327 static int mux_request_port(struct uart_port *port)
0328 {
0329 return 0;
0330 }
0331
0332
0333
0334
0335
0336
0337
0338
0339
0340
0341
0342
0343 static void mux_config_port(struct uart_port *port, int type)
0344 {
0345 port->type = PORT_MUX;
0346 }
0347
0348
0349
0350
0351
0352
0353
0354
0355
0356 static int mux_verify_port(struct uart_port *port, struct serial_struct *ser)
0357 {
0358 if(port->membase == NULL)
0359 return -EINVAL;
0360
0361 return 0;
0362 }
0363
0364
0365
0366
0367
0368
0369
0370 static void mux_poll(struct timer_list *unused)
0371 {
0372 int i;
0373
0374 for(i = 0; i < port_cnt; ++i) {
0375 if(!mux_ports[i].enabled)
0376 continue;
0377
0378 mux_read(&mux_ports[i].port);
0379 mux_write(&mux_ports[i].port);
0380 }
0381
0382 mod_timer(&mux_timer, jiffies + MUX_POLL_DELAY);
0383 }
0384
0385
0386 #ifdef CONFIG_SERIAL_MUX_CONSOLE
0387 static void mux_console_write(struct console *co, const char *s, unsigned count)
0388 {
0389
0390 while(UART_GET_FIFO_CNT(&mux_ports[0].port))
0391 udelay(1);
0392
0393 while(count--) {
0394 if(*s == '\n') {
0395 UART_PUT_CHAR(&mux_ports[0].port, '\r');
0396 }
0397 UART_PUT_CHAR(&mux_ports[0].port, *s++);
0398 }
0399
0400 }
0401
0402 static int mux_console_setup(struct console *co, char *options)
0403 {
0404 return 0;
0405 }
0406
0407 static struct console mux_console = {
0408 .name = "ttyB",
0409 .write = mux_console_write,
0410 .device = uart_console_device,
0411 .setup = mux_console_setup,
0412 .flags = CON_ENABLED | CON_PRINTBUFFER,
0413 .index = 0,
0414 .data = &mux_driver,
0415 };
0416
0417 #define MUX_CONSOLE &mux_console
0418 #else
0419 #define MUX_CONSOLE NULL
0420 #endif
0421
0422 static const struct uart_ops mux_pops = {
0423 .tx_empty = mux_tx_empty,
0424 .set_mctrl = mux_set_mctrl,
0425 .get_mctrl = mux_get_mctrl,
0426 .stop_tx = mux_stop_tx,
0427 .start_tx = mux_start_tx,
0428 .stop_rx = mux_stop_rx,
0429 .break_ctl = mux_break_ctl,
0430 .startup = mux_startup,
0431 .shutdown = mux_shutdown,
0432 .set_termios = mux_set_termios,
0433 .type = mux_type,
0434 .release_port = mux_release_port,
0435 .request_port = mux_request_port,
0436 .config_port = mux_config_port,
0437 .verify_port = mux_verify_port,
0438 };
0439
0440
0441
0442
0443
0444
0445
0446
0447 static int __init mux_probe(struct parisc_device *dev)
0448 {
0449 int i, status;
0450
0451 int port_count = get_mux_port_count(dev);
0452 printk(KERN_INFO "Serial mux driver (%d ports) Revision: 0.6\n", port_count);
0453
0454 dev_set_drvdata(&dev->dev, (void *)(long)port_count);
0455 request_mem_region(dev->hpa.start + MUX_OFFSET,
0456 port_count * MUX_LINE_OFFSET, "Mux");
0457
0458 if(!port_cnt) {
0459 mux_driver.cons = MUX_CONSOLE;
0460
0461 status = uart_register_driver(&mux_driver);
0462 if(status) {
0463 printk(KERN_ERR "Serial mux: Unable to register driver.\n");
0464 return 1;
0465 }
0466 }
0467
0468 for(i = 0; i < port_count; ++i, ++port_cnt) {
0469 struct uart_port *port = &mux_ports[port_cnt].port;
0470 port->iobase = 0;
0471 port->mapbase = dev->hpa.start + MUX_OFFSET +
0472 (i * MUX_LINE_OFFSET);
0473 port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET);
0474 port->iotype = UPIO_MEM;
0475 port->type = PORT_MUX;
0476 port->irq = 0;
0477 port->uartclk = 0;
0478 port->fifosize = MUX_FIFO_SIZE;
0479 port->ops = &mux_pops;
0480 port->flags = UPF_BOOT_AUTOCONF;
0481 port->line = port_cnt;
0482 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MUX_CONSOLE);
0483
0484 spin_lock_init(&port->lock);
0485
0486 status = uart_add_one_port(&mux_driver, port);
0487 BUG_ON(status);
0488 }
0489
0490 return 0;
0491 }
0492
0493 static void __exit mux_remove(struct parisc_device *dev)
0494 {
0495 int i, j;
0496 int port_count = (long)dev_get_drvdata(&dev->dev);
0497
0498
0499 for(i = 0; i < port_cnt; ++i) {
0500 if(mux_ports[i].port.mapbase == dev->hpa.start + MUX_OFFSET)
0501 break;
0502 }
0503 BUG_ON(i + port_count > port_cnt);
0504
0505
0506 for(j = 0; j < port_count; ++j, ++i) {
0507 struct uart_port *port = &mux_ports[i].port;
0508
0509 uart_remove_one_port(&mux_driver, port);
0510 if(port->membase)
0511 iounmap(port->membase);
0512 }
0513
0514 release_mem_region(dev->hpa.start + MUX_OFFSET, port_count * MUX_LINE_OFFSET);
0515 }
0516
0517
0518
0519
0520
0521
0522
0523
0524
0525 static const struct parisc_device_id builtin_mux_tbl[] __initconst = {
0526 { HPHW_A_DIRECT, HVERSION_REV_ANY_ID, 0x15, 0x0000D },
0527 { HPHW_A_DIRECT, HVERSION_REV_ANY_ID, 0x44, 0x0000D },
0528 { 0, }
0529 };
0530
0531 static const struct parisc_device_id mux_tbl[] __initconst = {
0532 { HPHW_A_DIRECT, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x0000D },
0533 { 0, }
0534 };
0535
0536 MODULE_DEVICE_TABLE(parisc, builtin_mux_tbl);
0537 MODULE_DEVICE_TABLE(parisc, mux_tbl);
0538
0539 static struct parisc_driver builtin_serial_mux_driver __refdata = {
0540 .name = "builtin_serial_mux",
0541 .id_table = builtin_mux_tbl,
0542 .probe = mux_probe,
0543 .remove = __exit_p(mux_remove),
0544 };
0545
0546 static struct parisc_driver serial_mux_driver __refdata = {
0547 .name = "serial_mux",
0548 .id_table = mux_tbl,
0549 .probe = mux_probe,
0550 .remove = __exit_p(mux_remove),
0551 };
0552
0553
0554
0555
0556
0557
0558 static int __init mux_init(void)
0559 {
0560 register_parisc_driver(&builtin_serial_mux_driver);
0561 register_parisc_driver(&serial_mux_driver);
0562
0563 if(port_cnt > 0) {
0564
0565 timer_setup(&mux_timer, mux_poll, 0);
0566 mod_timer(&mux_timer, jiffies + MUX_POLL_DELAY);
0567
0568 #ifdef CONFIG_SERIAL_MUX_CONSOLE
0569 register_console(&mux_console);
0570 #endif
0571 }
0572
0573 return 0;
0574 }
0575
0576
0577
0578
0579
0580
0581 static void __exit mux_exit(void)
0582 {
0583
0584 if(port_cnt > 0) {
0585 del_timer_sync(&mux_timer);
0586 #ifdef CONFIG_SERIAL_MUX_CONSOLE
0587 unregister_console(&mux_console);
0588 #endif
0589 }
0590
0591 unregister_parisc_driver(&builtin_serial_mux_driver);
0592 unregister_parisc_driver(&serial_mux_driver);
0593 uart_unregister_driver(&mux_driver);
0594 }
0595
0596 module_init(mux_init);
0597 module_exit(mux_exit);
0598
0599 MODULE_AUTHOR("Ryan Bradetich");
0600 MODULE_DESCRIPTION("Serial MUX driver");
0601 MODULE_LICENSE("GPL");
0602 MODULE_ALIAS_CHARDEV_MAJOR(MUX_MAJOR);