Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  *
0004  *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
0005  *
0006  * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
0007  * to use polling for flow control. TX empty IRQ is unusable, since
0008  * writing conf clears FIFO buffer and we cannot have this interrupt
0009  * always asking us for attention.
0010  *
0011  * Example platform data:
0012 
0013  static struct plat_max3100 max3100_plat_data = {
0014  .loopback = 0,
0015  .crystal = 0,
0016  .poll_time = 100,
0017  };
0018 
0019  static struct spi_board_info spi_board_info[] = {
0020  {
0021  .modalias  = "max3100",
0022  .platform_data = &max3100_plat_data,
0023  .irq       = IRQ_EINT12,
0024  .max_speed_hz  = 5*1000*1000,
0025  .chip_select   = 0,
0026  },
0027  };
0028 
0029  * The initial minor number is 209 in the low-density serial port:
0030  * mknod /dev/ttyMAX0 c 204 209
0031  */
0032 
0033 #define MAX3100_MAJOR 204
0034 #define MAX3100_MINOR 209
0035 /* 4 MAX3100s should be enough for everyone */
0036 #define MAX_MAX3100 4
0037 
0038 #include <linux/delay.h>
0039 #include <linux/slab.h>
0040 #include <linux/device.h>
0041 #include <linux/module.h>
0042 #include <linux/serial_core.h>
0043 #include <linux/serial.h>
0044 #include <linux/spi/spi.h>
0045 #include <linux/freezer.h>
0046 #include <linux/tty.h>
0047 #include <linux/tty_flip.h>
0048 
0049 #include <linux/serial_max3100.h>
0050 
0051 #define MAX3100_C    (1<<14)
0052 #define MAX3100_D    (0<<14)
0053 #define MAX3100_W    (1<<15)
0054 #define MAX3100_RX   (0<<15)
0055 
0056 #define MAX3100_WC   (MAX3100_W  | MAX3100_C)
0057 #define MAX3100_RC   (MAX3100_RX | MAX3100_C)
0058 #define MAX3100_WD   (MAX3100_W  | MAX3100_D)
0059 #define MAX3100_RD   (MAX3100_RX | MAX3100_D)
0060 #define MAX3100_CMD  (3 << 14)
0061 
0062 #define MAX3100_T    (1<<14)
0063 #define MAX3100_R    (1<<15)
0064 
0065 #define MAX3100_FEN  (1<<13)
0066 #define MAX3100_SHDN (1<<12)
0067 #define MAX3100_TM   (1<<11)
0068 #define MAX3100_RM   (1<<10)
0069 #define MAX3100_PM   (1<<9)
0070 #define MAX3100_RAM  (1<<8)
0071 #define MAX3100_IR   (1<<7)
0072 #define MAX3100_ST   (1<<6)
0073 #define MAX3100_PE   (1<<5)
0074 #define MAX3100_L    (1<<4)
0075 #define MAX3100_BAUD (0xf)
0076 
0077 #define MAX3100_TE   (1<<10)
0078 #define MAX3100_RAFE (1<<10)
0079 #define MAX3100_RTS  (1<<9)
0080 #define MAX3100_CTS  (1<<9)
0081 #define MAX3100_PT   (1<<8)
0082 #define MAX3100_DATA (0xff)
0083 
0084 #define MAX3100_RT   (MAX3100_R | MAX3100_T)
0085 #define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
0086 
0087 /* the following simulate a status reg for ignore_status_mask */
0088 #define MAX3100_STATUS_PE 1
0089 #define MAX3100_STATUS_FE 2
0090 #define MAX3100_STATUS_OE 4
0091 
0092 struct max3100_port {
0093     struct uart_port port;
0094     struct spi_device *spi;
0095 
0096     int cts;            /* last CTS received for flow ctrl */
0097     int tx_empty;       /* last TX empty bit */
0098 
0099     spinlock_t conf_lock;   /* shared data */
0100     int conf_commit;    /* need to make changes */
0101     int conf;       /* configuration for the MAX31000
0102                  * (bits 0-7, bits 8-11 are irqs) */
0103     int rts_commit;         /* need to change rts */
0104     int rts;        /* rts status */
0105     int baud;       /* current baud rate */
0106 
0107     int parity;     /* keeps track if we should send parity */
0108 #define MAX3100_PARITY_ON 1
0109 #define MAX3100_PARITY_ODD 2
0110 #define MAX3100_7BIT 4
0111     int rx_enabled;         /* if we should rx chars */
0112 
0113     int irq;        /* irq assigned to the max3100 */
0114 
0115     int minor;      /* minor number */
0116     int crystal;        /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
0117     int loopback;       /* 1 if we are in loopback mode */
0118 
0119     /* for handling irqs: need workqueue since we do spi_sync */
0120     struct workqueue_struct *workqueue;
0121     struct work_struct work;
0122     /* set to 1 to make the workhandler exit as soon as possible */
0123     int  force_end_work;
0124     /* need to know we are suspending to avoid deadlock on workqueue */
0125     int suspending;
0126 
0127     /* hook for suspending MAX3100 via dedicated pin */
0128     void (*max3100_hw_suspend) (int suspend);
0129 
0130     /* poll time (in ms) for ctrl lines */
0131     int poll_time;
0132     /* and its timer */
0133     struct timer_list   timer;
0134 };
0135 
0136 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
0137 static DEFINE_MUTEX(max3100s_lock);        /* race on probe */
0138 
0139 static int max3100_do_parity(struct max3100_port *s, u16 c)
0140 {
0141     int parity;
0142 
0143     if (s->parity & MAX3100_PARITY_ODD)
0144         parity = 1;
0145     else
0146         parity = 0;
0147 
0148     if (s->parity & MAX3100_7BIT)
0149         c &= 0x7f;
0150     else
0151         c &= 0xff;
0152 
0153     parity = parity ^ (hweight8(c) & 1);
0154     return parity;
0155 }
0156 
0157 static int max3100_check_parity(struct max3100_port *s, u16 c)
0158 {
0159     return max3100_do_parity(s, c) == ((c >> 8) & 1);
0160 }
0161 
0162 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
0163 {
0164     if (s->parity & MAX3100_7BIT)
0165         *c &= 0x7f;
0166     else
0167         *c &= 0xff;
0168 
0169     if (s->parity & MAX3100_PARITY_ON)
0170         *c |= max3100_do_parity(s, *c) << 8;
0171 }
0172 
0173 static void max3100_work(struct work_struct *w);
0174 
0175 static void max3100_dowork(struct max3100_port *s)
0176 {
0177     if (!s->force_end_work && !freezing(current) && !s->suspending)
0178         queue_work(s->workqueue, &s->work);
0179 }
0180 
0181 static void max3100_timeout(struct timer_list *t)
0182 {
0183     struct max3100_port *s = from_timer(s, t, timer);
0184 
0185     if (s->port.state) {
0186         max3100_dowork(s);
0187         mod_timer(&s->timer, jiffies + s->poll_time);
0188     }
0189 }
0190 
0191 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
0192 {
0193     struct spi_message message;
0194     u16 etx, erx;
0195     int status;
0196     struct spi_transfer tran = {
0197         .tx_buf = &etx,
0198         .rx_buf = &erx,
0199         .len = 2,
0200     };
0201 
0202     etx = cpu_to_be16(tx);
0203     spi_message_init(&message);
0204     spi_message_add_tail(&tran, &message);
0205     status = spi_sync(s->spi, &message);
0206     if (status) {
0207         dev_warn(&s->spi->dev, "error while calling spi_sync\n");
0208         return -EIO;
0209     }
0210     *rx = be16_to_cpu(erx);
0211     s->tx_empty = (*rx & MAX3100_T) > 0;
0212     dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
0213     return 0;
0214 }
0215 
0216 static int max3100_handlerx(struct max3100_port *s, u16 rx)
0217 {
0218     unsigned int ch, flg, status = 0;
0219     int ret = 0, cts;
0220 
0221     if (rx & MAX3100_R && s->rx_enabled) {
0222         dev_dbg(&s->spi->dev, "%s\n", __func__);
0223         ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
0224         if (rx & MAX3100_RAFE) {
0225             s->port.icount.frame++;
0226             flg = TTY_FRAME;
0227             status |= MAX3100_STATUS_FE;
0228         } else {
0229             if (s->parity & MAX3100_PARITY_ON) {
0230                 if (max3100_check_parity(s, rx)) {
0231                     s->port.icount.rx++;
0232                     flg = TTY_NORMAL;
0233                 } else {
0234                     s->port.icount.parity++;
0235                     flg = TTY_PARITY;
0236                     status |= MAX3100_STATUS_PE;
0237                 }
0238             } else {
0239                 s->port.icount.rx++;
0240                 flg = TTY_NORMAL;
0241             }
0242         }
0243         uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
0244         ret = 1;
0245     }
0246 
0247     cts = (rx & MAX3100_CTS) > 0;
0248     if (s->cts != cts) {
0249         s->cts = cts;
0250         uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
0251     }
0252 
0253     return ret;
0254 }
0255 
0256 static void max3100_work(struct work_struct *w)
0257 {
0258     struct max3100_port *s = container_of(w, struct max3100_port, work);
0259     int rxchars;
0260     u16 tx, rx;
0261     int conf, cconf, crts;
0262     struct circ_buf *xmit = &s->port.state->xmit;
0263 
0264     dev_dbg(&s->spi->dev, "%s\n", __func__);
0265 
0266     rxchars = 0;
0267     do {
0268         spin_lock(&s->conf_lock);
0269         conf = s->conf;
0270         cconf = s->conf_commit;
0271         s->conf_commit = 0;
0272         crts = s->rts_commit;
0273         s->rts_commit = 0;
0274         spin_unlock(&s->conf_lock);
0275         if (cconf)
0276             max3100_sr(s, MAX3100_WC | conf, &rx);
0277         if (crts) {
0278             max3100_sr(s, MAX3100_WD | MAX3100_TE |
0279                    (s->rts ? MAX3100_RTS : 0), &rx);
0280             rxchars += max3100_handlerx(s, rx);
0281         }
0282 
0283         max3100_sr(s, MAX3100_RD, &rx);
0284         rxchars += max3100_handlerx(s, rx);
0285 
0286         if (rx & MAX3100_T) {
0287             tx = 0xffff;
0288             if (s->port.x_char) {
0289                 tx = s->port.x_char;
0290                 s->port.icount.tx++;
0291                 s->port.x_char = 0;
0292             } else if (!uart_circ_empty(xmit) &&
0293                    !uart_tx_stopped(&s->port)) {
0294                 tx = xmit->buf[xmit->tail];
0295                 xmit->tail = (xmit->tail + 1) &
0296                     (UART_XMIT_SIZE - 1);
0297                 s->port.icount.tx++;
0298             }
0299             if (tx != 0xffff) {
0300                 max3100_calc_parity(s, &tx);
0301                 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
0302                 max3100_sr(s, tx, &rx);
0303                 rxchars += max3100_handlerx(s, rx);
0304             }
0305         }
0306 
0307         if (rxchars > 16) {
0308             tty_flip_buffer_push(&s->port.state->port);
0309             rxchars = 0;
0310         }
0311         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0312             uart_write_wakeup(&s->port);
0313 
0314     } while (!s->force_end_work &&
0315          !freezing(current) &&
0316          ((rx & MAX3100_R) ||
0317           (!uart_circ_empty(xmit) &&
0318            !uart_tx_stopped(&s->port))));
0319 
0320     if (rxchars > 0)
0321         tty_flip_buffer_push(&s->port.state->port);
0322 }
0323 
0324 static irqreturn_t max3100_irq(int irqno, void *dev_id)
0325 {
0326     struct max3100_port *s = dev_id;
0327 
0328     dev_dbg(&s->spi->dev, "%s\n", __func__);
0329 
0330     max3100_dowork(s);
0331     return IRQ_HANDLED;
0332 }
0333 
0334 static void max3100_enable_ms(struct uart_port *port)
0335 {
0336     struct max3100_port *s = container_of(port,
0337                           struct max3100_port,
0338                           port);
0339 
0340     if (s->poll_time > 0)
0341         mod_timer(&s->timer, jiffies);
0342     dev_dbg(&s->spi->dev, "%s\n", __func__);
0343 }
0344 
0345 static void max3100_start_tx(struct uart_port *port)
0346 {
0347     struct max3100_port *s = container_of(port,
0348                           struct max3100_port,
0349                           port);
0350 
0351     dev_dbg(&s->spi->dev, "%s\n", __func__);
0352 
0353     max3100_dowork(s);
0354 }
0355 
0356 static void max3100_stop_rx(struct uart_port *port)
0357 {
0358     struct max3100_port *s = container_of(port,
0359                           struct max3100_port,
0360                           port);
0361 
0362     dev_dbg(&s->spi->dev, "%s\n", __func__);
0363 
0364     s->rx_enabled = 0;
0365     spin_lock(&s->conf_lock);
0366     s->conf &= ~MAX3100_RM;
0367     s->conf_commit = 1;
0368     spin_unlock(&s->conf_lock);
0369     max3100_dowork(s);
0370 }
0371 
0372 static unsigned int max3100_tx_empty(struct uart_port *port)
0373 {
0374     struct max3100_port *s = container_of(port,
0375                           struct max3100_port,
0376                           port);
0377 
0378     dev_dbg(&s->spi->dev, "%s\n", __func__);
0379 
0380     /* may not be truly up-to-date */
0381     max3100_dowork(s);
0382     return s->tx_empty;
0383 }
0384 
0385 static unsigned int max3100_get_mctrl(struct uart_port *port)
0386 {
0387     struct max3100_port *s = container_of(port,
0388                           struct max3100_port,
0389                           port);
0390 
0391     dev_dbg(&s->spi->dev, "%s\n", __func__);
0392 
0393     /* may not be truly up-to-date */
0394     max3100_dowork(s);
0395     /* always assert DCD and DSR since these lines are not wired */
0396     return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
0397 }
0398 
0399 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
0400 {
0401     struct max3100_port *s = container_of(port,
0402                           struct max3100_port,
0403                           port);
0404     int rts;
0405 
0406     dev_dbg(&s->spi->dev, "%s\n", __func__);
0407 
0408     rts = (mctrl & TIOCM_RTS) > 0;
0409 
0410     spin_lock(&s->conf_lock);
0411     if (s->rts != rts) {
0412         s->rts = rts;
0413         s->rts_commit = 1;
0414         max3100_dowork(s);
0415     }
0416     spin_unlock(&s->conf_lock);
0417 }
0418 
0419 static void
0420 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
0421             struct ktermios *old)
0422 {
0423     struct max3100_port *s = container_of(port,
0424                           struct max3100_port,
0425                           port);
0426     int baud = 0;
0427     unsigned cflag;
0428     u32 param_new, param_mask, parity = 0;
0429 
0430     dev_dbg(&s->spi->dev, "%s\n", __func__);
0431 
0432     cflag = termios->c_cflag;
0433     param_mask = 0;
0434 
0435     baud = tty_termios_baud_rate(termios);
0436     param_new = s->conf & MAX3100_BAUD;
0437     switch (baud) {
0438     case 300:
0439         if (s->crystal)
0440             baud = s->baud;
0441         else
0442             param_new = 15;
0443         break;
0444     case 600:
0445         param_new = 14 + s->crystal;
0446         break;
0447     case 1200:
0448         param_new = 13 + s->crystal;
0449         break;
0450     case 2400:
0451         param_new = 12 + s->crystal;
0452         break;
0453     case 4800:
0454         param_new = 11 + s->crystal;
0455         break;
0456     case 9600:
0457         param_new = 10 + s->crystal;
0458         break;
0459     case 19200:
0460         param_new = 9 + s->crystal;
0461         break;
0462     case 38400:
0463         param_new = 8 + s->crystal;
0464         break;
0465     case 57600:
0466         param_new = 1 + s->crystal;
0467         break;
0468     case 115200:
0469         param_new = 0 + s->crystal;
0470         break;
0471     case 230400:
0472         if (s->crystal)
0473             param_new = 0;
0474         else
0475             baud = s->baud;
0476         break;
0477     default:
0478         baud = s->baud;
0479     }
0480     tty_termios_encode_baud_rate(termios, baud, baud);
0481     s->baud = baud;
0482     param_mask |= MAX3100_BAUD;
0483 
0484     if ((cflag & CSIZE) == CS8) {
0485         param_new &= ~MAX3100_L;
0486         parity &= ~MAX3100_7BIT;
0487     } else {
0488         param_new |= MAX3100_L;
0489         parity |= MAX3100_7BIT;
0490         cflag = (cflag & ~CSIZE) | CS7;
0491     }
0492     param_mask |= MAX3100_L;
0493 
0494     if (cflag & CSTOPB)
0495         param_new |= MAX3100_ST;
0496     else
0497         param_new &= ~MAX3100_ST;
0498     param_mask |= MAX3100_ST;
0499 
0500     if (cflag & PARENB) {
0501         param_new |= MAX3100_PE;
0502         parity |= MAX3100_PARITY_ON;
0503     } else {
0504         param_new &= ~MAX3100_PE;
0505         parity &= ~MAX3100_PARITY_ON;
0506     }
0507     param_mask |= MAX3100_PE;
0508 
0509     if (cflag & PARODD)
0510         parity |= MAX3100_PARITY_ODD;
0511     else
0512         parity &= ~MAX3100_PARITY_ODD;
0513 
0514     /* mask termios capabilities we don't support */
0515     cflag &= ~CMSPAR;
0516     termios->c_cflag = cflag;
0517 
0518     s->port.ignore_status_mask = 0;
0519     if (termios->c_iflag & IGNPAR)
0520         s->port.ignore_status_mask |=
0521             MAX3100_STATUS_PE | MAX3100_STATUS_FE |
0522             MAX3100_STATUS_OE;
0523 
0524     if (s->poll_time > 0)
0525         del_timer_sync(&s->timer);
0526 
0527     uart_update_timeout(port, termios->c_cflag, baud);
0528 
0529     spin_lock(&s->conf_lock);
0530     s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
0531     s->conf_commit = 1;
0532     s->parity = parity;
0533     spin_unlock(&s->conf_lock);
0534     max3100_dowork(s);
0535 
0536     if (UART_ENABLE_MS(&s->port, termios->c_cflag))
0537         max3100_enable_ms(&s->port);
0538 }
0539 
0540 static void max3100_shutdown(struct uart_port *port)
0541 {
0542     struct max3100_port *s = container_of(port,
0543                           struct max3100_port,
0544                           port);
0545 
0546     dev_dbg(&s->spi->dev, "%s\n", __func__);
0547 
0548     if (s->suspending)
0549         return;
0550 
0551     s->force_end_work = 1;
0552 
0553     if (s->poll_time > 0)
0554         del_timer_sync(&s->timer);
0555 
0556     if (s->workqueue) {
0557         destroy_workqueue(s->workqueue);
0558         s->workqueue = NULL;
0559     }
0560     if (s->irq)
0561         free_irq(s->irq, s);
0562 
0563     /* set shutdown mode to save power */
0564     if (s->max3100_hw_suspend)
0565         s->max3100_hw_suspend(1);
0566     else  {
0567         u16 tx, rx;
0568 
0569         tx = MAX3100_WC | MAX3100_SHDN;
0570         max3100_sr(s, tx, &rx);
0571     }
0572 }
0573 
0574 static int max3100_startup(struct uart_port *port)
0575 {
0576     struct max3100_port *s = container_of(port,
0577                           struct max3100_port,
0578                           port);
0579     char b[12];
0580 
0581     dev_dbg(&s->spi->dev, "%s\n", __func__);
0582 
0583     s->conf = MAX3100_RM;
0584     s->baud = s->crystal ? 230400 : 115200;
0585     s->rx_enabled = 1;
0586 
0587     if (s->suspending)
0588         return 0;
0589 
0590     s->force_end_work = 0;
0591     s->parity = 0;
0592     s->rts = 0;
0593 
0594     sprintf(b, "max3100-%d", s->minor);
0595     s->workqueue = create_freezable_workqueue(b);
0596     if (!s->workqueue) {
0597         dev_warn(&s->spi->dev, "cannot create workqueue\n");
0598         return -EBUSY;
0599     }
0600     INIT_WORK(&s->work, max3100_work);
0601 
0602     if (request_irq(s->irq, max3100_irq,
0603             IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
0604         dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
0605         s->irq = 0;
0606         destroy_workqueue(s->workqueue);
0607         s->workqueue = NULL;
0608         return -EBUSY;
0609     }
0610 
0611     if (s->loopback) {
0612         u16 tx, rx;
0613         tx = 0x4001;
0614         max3100_sr(s, tx, &rx);
0615     }
0616 
0617     if (s->max3100_hw_suspend)
0618         s->max3100_hw_suspend(0);
0619     s->conf_commit = 1;
0620     max3100_dowork(s);
0621     /* wait for clock to settle */
0622     msleep(50);
0623 
0624     max3100_enable_ms(&s->port);
0625 
0626     return 0;
0627 }
0628 
0629 static const char *max3100_type(struct uart_port *port)
0630 {
0631     struct max3100_port *s = container_of(port,
0632                           struct max3100_port,
0633                           port);
0634 
0635     dev_dbg(&s->spi->dev, "%s\n", __func__);
0636 
0637     return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
0638 }
0639 
0640 static void max3100_release_port(struct uart_port *port)
0641 {
0642     struct max3100_port *s = container_of(port,
0643                           struct max3100_port,
0644                           port);
0645 
0646     dev_dbg(&s->spi->dev, "%s\n", __func__);
0647 }
0648 
0649 static void max3100_config_port(struct uart_port *port, int flags)
0650 {
0651     struct max3100_port *s = container_of(port,
0652                           struct max3100_port,
0653                           port);
0654 
0655     dev_dbg(&s->spi->dev, "%s\n", __func__);
0656 
0657     if (flags & UART_CONFIG_TYPE)
0658         s->port.type = PORT_MAX3100;
0659 }
0660 
0661 static int max3100_verify_port(struct uart_port *port,
0662                    struct serial_struct *ser)
0663 {
0664     struct max3100_port *s = container_of(port,
0665                           struct max3100_port,
0666                           port);
0667     int ret = -EINVAL;
0668 
0669     dev_dbg(&s->spi->dev, "%s\n", __func__);
0670 
0671     if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
0672         ret = 0;
0673     return ret;
0674 }
0675 
0676 static void max3100_stop_tx(struct uart_port *port)
0677 {
0678     struct max3100_port *s = container_of(port,
0679                           struct max3100_port,
0680                           port);
0681 
0682     dev_dbg(&s->spi->dev, "%s\n", __func__);
0683 }
0684 
0685 static int max3100_request_port(struct uart_port *port)
0686 {
0687     struct max3100_port *s = container_of(port,
0688                           struct max3100_port,
0689                           port);
0690 
0691     dev_dbg(&s->spi->dev, "%s\n", __func__);
0692     return 0;
0693 }
0694 
0695 static void max3100_break_ctl(struct uart_port *port, int break_state)
0696 {
0697     struct max3100_port *s = container_of(port,
0698                           struct max3100_port,
0699                           port);
0700 
0701     dev_dbg(&s->spi->dev, "%s\n", __func__);
0702 }
0703 
0704 static const struct uart_ops max3100_ops = {
0705     .tx_empty   = max3100_tx_empty,
0706     .set_mctrl  = max3100_set_mctrl,
0707     .get_mctrl  = max3100_get_mctrl,
0708     .stop_tx        = max3100_stop_tx,
0709     .start_tx   = max3100_start_tx,
0710     .stop_rx    = max3100_stop_rx,
0711     .enable_ms      = max3100_enable_ms,
0712     .break_ctl      = max3100_break_ctl,
0713     .startup    = max3100_startup,
0714     .shutdown   = max3100_shutdown,
0715     .set_termios    = max3100_set_termios,
0716     .type       = max3100_type,
0717     .release_port   = max3100_release_port,
0718     .request_port   = max3100_request_port,
0719     .config_port    = max3100_config_port,
0720     .verify_port    = max3100_verify_port,
0721 };
0722 
0723 static struct uart_driver max3100_uart_driver = {
0724     .owner          = THIS_MODULE,
0725     .driver_name    = "ttyMAX",
0726     .dev_name       = "ttyMAX",
0727     .major          = MAX3100_MAJOR,
0728     .minor          = MAX3100_MINOR,
0729     .nr             = MAX_MAX3100,
0730 };
0731 static int uart_driver_registered;
0732 
0733 static int max3100_probe(struct spi_device *spi)
0734 {
0735     int i, retval;
0736     struct plat_max3100 *pdata;
0737     u16 tx, rx;
0738 
0739     mutex_lock(&max3100s_lock);
0740 
0741     if (!uart_driver_registered) {
0742         uart_driver_registered = 1;
0743         retval = uart_register_driver(&max3100_uart_driver);
0744         if (retval) {
0745             printk(KERN_ERR "Couldn't register max3100 uart driver\n");
0746             mutex_unlock(&max3100s_lock);
0747             return retval;
0748         }
0749     }
0750 
0751     for (i = 0; i < MAX_MAX3100; i++)
0752         if (!max3100s[i])
0753             break;
0754     if (i == MAX_MAX3100) {
0755         dev_warn(&spi->dev, "too many MAX3100 chips\n");
0756         mutex_unlock(&max3100s_lock);
0757         return -ENOMEM;
0758     }
0759 
0760     max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
0761     if (!max3100s[i]) {
0762         dev_warn(&spi->dev,
0763              "kmalloc for max3100 structure %d failed!\n", i);
0764         mutex_unlock(&max3100s_lock);
0765         return -ENOMEM;
0766     }
0767     max3100s[i]->spi = spi;
0768     max3100s[i]->irq = spi->irq;
0769     spin_lock_init(&max3100s[i]->conf_lock);
0770     spi_set_drvdata(spi, max3100s[i]);
0771     pdata = dev_get_platdata(&spi->dev);
0772     max3100s[i]->crystal = pdata->crystal;
0773     max3100s[i]->loopback = pdata->loopback;
0774     max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
0775     if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
0776         max3100s[i]->poll_time = 1;
0777     max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
0778     max3100s[i]->minor = i;
0779     timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
0780 
0781     dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
0782     max3100s[i]->port.irq = max3100s[i]->irq;
0783     max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
0784     max3100s[i]->port.fifosize = 16;
0785     max3100s[i]->port.ops = &max3100_ops;
0786     max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
0787     max3100s[i]->port.line = i;
0788     max3100s[i]->port.type = PORT_MAX3100;
0789     max3100s[i]->port.dev = &spi->dev;
0790     retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
0791     if (retval < 0)
0792         dev_warn(&spi->dev,
0793              "uart_add_one_port failed for line %d with error %d\n",
0794              i, retval);
0795 
0796     /* set shutdown mode to save power. Will be woken-up on open */
0797     if (max3100s[i]->max3100_hw_suspend)
0798         max3100s[i]->max3100_hw_suspend(1);
0799     else {
0800         tx = MAX3100_WC | MAX3100_SHDN;
0801         max3100_sr(max3100s[i], tx, &rx);
0802     }
0803     mutex_unlock(&max3100s_lock);
0804     return 0;
0805 }
0806 
0807 static void max3100_remove(struct spi_device *spi)
0808 {
0809     struct max3100_port *s = spi_get_drvdata(spi);
0810     int i;
0811 
0812     mutex_lock(&max3100s_lock);
0813 
0814     /* find out the index for the chip we are removing */
0815     for (i = 0; i < MAX_MAX3100; i++)
0816         if (max3100s[i] == s) {
0817             dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
0818             uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
0819             kfree(max3100s[i]);
0820             max3100s[i] = NULL;
0821             break;
0822         }
0823 
0824     WARN_ON(i == MAX_MAX3100);
0825     
0826     /* check if this is the last chip we have */
0827     for (i = 0; i < MAX_MAX3100; i++)
0828         if (max3100s[i]) {
0829             mutex_unlock(&max3100s_lock);
0830             return;
0831         }
0832     pr_debug("removing max3100 driver\n");
0833     uart_unregister_driver(&max3100_uart_driver);
0834 
0835     mutex_unlock(&max3100s_lock);
0836 }
0837 
0838 #ifdef CONFIG_PM_SLEEP
0839 
0840 static int max3100_suspend(struct device *dev)
0841 {
0842     struct max3100_port *s = dev_get_drvdata(dev);
0843 
0844     dev_dbg(&s->spi->dev, "%s\n", __func__);
0845 
0846     disable_irq(s->irq);
0847 
0848     s->suspending = 1;
0849     uart_suspend_port(&max3100_uart_driver, &s->port);
0850 
0851     if (s->max3100_hw_suspend)
0852         s->max3100_hw_suspend(1);
0853     else {
0854         /* no HW suspend, so do SW one */
0855         u16 tx, rx;
0856 
0857         tx = MAX3100_WC | MAX3100_SHDN;
0858         max3100_sr(s, tx, &rx);
0859     }
0860     return 0;
0861 }
0862 
0863 static int max3100_resume(struct device *dev)
0864 {
0865     struct max3100_port *s = dev_get_drvdata(dev);
0866 
0867     dev_dbg(&s->spi->dev, "%s\n", __func__);
0868 
0869     if (s->max3100_hw_suspend)
0870         s->max3100_hw_suspend(0);
0871     uart_resume_port(&max3100_uart_driver, &s->port);
0872     s->suspending = 0;
0873 
0874     enable_irq(s->irq);
0875 
0876     s->conf_commit = 1;
0877     if (s->workqueue)
0878         max3100_dowork(s);
0879 
0880     return 0;
0881 }
0882 
0883 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
0884 #define MAX3100_PM_OPS (&max3100_pm_ops)
0885 
0886 #else
0887 #define MAX3100_PM_OPS NULL
0888 #endif
0889 
0890 static struct spi_driver max3100_driver = {
0891     .driver = {
0892         .name       = "max3100",
0893         .pm     = MAX3100_PM_OPS,
0894     },
0895     .probe      = max3100_probe,
0896     .remove     = max3100_remove,
0897 };
0898 
0899 module_spi_driver(max3100_driver);
0900 
0901 MODULE_DESCRIPTION("MAX3100 driver");
0902 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
0903 MODULE_LICENSE("GPL");
0904 MODULE_ALIAS("spi:max3100");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!