tty/serial/dz.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * dz.h: Serial port driver for DECstations equipped
0004  *       with the DZ chipset.
0005  *
0006  * Copyright (C) 1998 Olivier A. D. Lebaillif
0007  *
0008  * Email: olivier.lebaillif@ifrsys.com
0009  *
0010  * Copyright (C) 2004, 2006  Maciej W. Rozycki
0011  */
0012 #ifndef DZ_SERIAL_H
0013 #define DZ_SERIAL_H
0014
0015 /*
0016  * Definitions for the Control and Status Register.
0017  */
0018 #define DZ_TRDY        0x8000                 /* Transmitter empty */
0019 #define DZ_TIE         0x4000                 /* Transmitter Interrupt Enbl */
0020 #define DZ_TLINE       0x0300                 /* Transmitter Line Number */
0021 #define DZ_RDONE       0x0080                 /* Receiver data ready */
0022 #define DZ_RIE         0x0040                 /* Receive Interrupt Enable */
0023 #define DZ_MSE         0x0020                 /* Master Scan Enable */
0024 #define DZ_CLR         0x0010                 /* Master reset */
0025 #define DZ_MAINT       0x0008                 /* Loop Back Mode */
0026
0027 /*
0028  * Definitions for the Receiver Buffer Register.
0029  */
0030 #define DZ_RBUF_MASK   0x00FF                 /* Data Mask */
0031 #define DZ_LINE_MASK   0x0300                 /* Line Mask */
0032 #define DZ_DVAL        0x8000                 /* Valid Data indicator */
0033 #define DZ_OERR        0x4000                 /* Overrun error indicator */
0034 #define DZ_FERR        0x2000                 /* Frame error indicator */
0035 #define DZ_PERR        0x1000                 /* Parity error indicator */
0036
0037 #define DZ_BREAK       0x0800                 /* BREAK event software flag */
0038
0039 #define LINE(x) ((x & DZ_LINE_MASK) >> 8)     /* Get the line number
0040                                                  from the input buffer */
0041 #define UCHAR(x) ((unsigned char)(x & DZ_RBUF_MASK))
0042
0043 /*
0044  * Definitions for the Transmit Control Register.
0045  */
0046 #define DZ_LINE_KEYBOARD 0x0001
0047 #define DZ_LINE_MOUSE    0x0002
0048 #define DZ_LINE_MODEM    0x0004
0049 #define DZ_LINE_PRINTER  0x0008
0050
0051 #define DZ_MODEM_RTS     0x0800               /* RTS for the modem line (2) */
0052 #define DZ_MODEM_DTR     0x0400               /* DTR for the modem line (2) */
0053 #define DZ_PRINT_RTS     0x0200               /* RTS for the prntr line (3) */
0054 #define DZ_PRINT_DTR     0x0100               /* DTR for the prntr line (3) */
0055 #define DZ_LNENB         0x000f               /* Transmitter Line Enable */
0056
0057 /*
0058  * Definitions for the Modem Status Register.
0059  */
0060 #define DZ_MODEM_RI      0x0800               /* RI for the modem line (2) */
0061 #define DZ_MODEM_CD      0x0400               /* CD for the modem line (2) */
0062 #define DZ_MODEM_DSR     0x0200               /* DSR for the modem line (2) */
0063 #define DZ_MODEM_CTS     0x0100               /* CTS for the modem line (2) */
0064 #define DZ_PRINT_RI      0x0008               /* RI for the printer line (3) */
0065 #define DZ_PRINT_CD      0x0004               /* CD for the printer line (3) */
0066 #define DZ_PRINT_DSR     0x0002               /* DSR for the prntr line (3) */
0067 #define DZ_PRINT_CTS     0x0001               /* CTS for the prntr line (3) */
0068
0069 /*
0070  * Definitions for the Transmit Data Register.
0071  */
0072 #define DZ_BRK0          0x0100               /* Break assertion for line 0 */
0073 #define DZ_BRK1          0x0200               /* Break assertion for line 1 */
0074 #define DZ_BRK2          0x0400               /* Break assertion for line 2 */
0075 #define DZ_BRK3          0x0800               /* Break assertion for line 3 */
0076
0077 /*
0078  * Definitions for the Line Parameter Register.
0079  */
0080 #define DZ_KEYBOARD      0x0000               /* line 0 = keyboard */
0081 #define DZ_MOUSE         0x0001               /* line 1 = mouse */
0082 #define DZ_MODEM         0x0002               /* line 2 = modem */
0083 #define DZ_PRINTER       0x0003               /* line 3 = printer */
0084
0085 #define DZ_CSIZE         0x0018               /* Number of bits per byte (mask) */
0086 #define DZ_CS5           0x0000               /* 5 bits per byte */
0087 #define DZ_CS6           0x0008               /* 6 bits per byte */
0088 #define DZ_CS7           0x0010               /* 7 bits per byte */
0089 #define DZ_CS8           0x0018               /* 8 bits per byte */
0090
0091 #define DZ_CSTOPB        0x0020               /* 2 stop bits instead of one */
0092
0093 #define DZ_PARENB        0x0040               /* Parity enable */
0094 #define DZ_PARODD        0x0080               /* Odd parity instead of even */
0095
0096 #define DZ_CBAUD         0x0E00               /* Baud Rate (mask) */
0097 #define DZ_B50           0x0000
0098 #define DZ_B75           0x0100
0099 #define DZ_B110          0x0200
0100 #define DZ_B134          0x0300
0101 #define DZ_B150          0x0400
0102 #define DZ_B300          0x0500
0103 #define DZ_B600          0x0600
0104 #define DZ_B1200         0x0700
0105 #define DZ_B1800         0x0800
0106 #define DZ_B2000         0x0900
0107 #define DZ_B2400         0x0A00
0108 #define DZ_B3600         0x0B00
0109 #define DZ_B4800         0x0C00
0110 #define DZ_B7200         0x0D00
0111 #define DZ_B9600         0x0E00
0112
0113 #define DZ_RXENAB        0x1000               /* Receiver Enable */
0114
0115 /*
0116  * Addresses for the DZ registers
0117  */
0118 #define DZ_CSR       0x00            /* Control and Status Register */
0119 #define DZ_RBUF      0x08            /* Receive Buffer */
0120 #define DZ_LPR       0x08            /* Line Parameters Register */
0121 #define DZ_TCR       0x10            /* Transmitter Control Register */
0122 #define DZ_MSR       0x18            /* Modem Status Register */
0123 #define DZ_TDR       0x18            /* Transmit Data Register */
0124
0125 #define DZ_NB_PORT 4
0126
0127 #define DZ_XMIT_SIZE   4096                 /* buffer size */
0128 #define DZ_WAKEUP_CHARS   DZ_XMIT_SIZE/4
0129
0130 #endif /* DZ_SERIAL_H */