0001
0002
0003
0004
0005
0006
0007
0008
0009
0010 #ifndef CPM_UART_H
0011 #define CPM_UART_H
0012
0013 #include <linux/platform_device.h>
0014 #include <linux/fs_uart_pd.h>
0015
0016 struct gpio_desc;
0017
0018 #if defined(CONFIG_CPM2)
0019 #include "cpm_uart_cpm2.h"
0020 #elif defined(CONFIG_CPM1)
0021 #include "cpm_uart_cpm1.h"
0022 #elif defined(CONFIG_COMPILE_TEST)
0023 #include "cpm_uart_cpm2.h"
0024 #endif
0025
0026 #define SERIAL_CPM_MAJOR 204
0027 #define SERIAL_CPM_MINOR 46
0028
0029 #define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
0030 #define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING)
0031 #define FLAG_DISCARDING 0x00000004
0032 #define FLAG_SMC 0x00000002
0033 #define FLAG_CONSOLE 0x00000001
0034
0035 #define UART_SMC1 fsid_smc1_uart
0036 #define UART_SMC2 fsid_smc2_uart
0037 #define UART_SCC1 fsid_scc1_uart
0038 #define UART_SCC2 fsid_scc2_uart
0039 #define UART_SCC3 fsid_scc3_uart
0040 #define UART_SCC4 fsid_scc4_uart
0041
0042 #define UART_NR fs_uart_nr
0043
0044 #define RX_NUM_FIFO 4
0045 #define RX_BUF_SIZE 32
0046 #define TX_NUM_FIFO 4
0047 #define TX_BUF_SIZE 32
0048
0049 #define SCC_WAIT_CLOSING 100
0050
0051 #define GPIO_CTS 0
0052 #define GPIO_RTS 1
0053 #define GPIO_DCD 2
0054 #define GPIO_DSR 3
0055 #define GPIO_DTR 4
0056 #define GPIO_RI 5
0057
0058 #define NUM_GPIOS (GPIO_RI+1)
0059
0060 struct uart_cpm_port {
0061 struct uart_port port;
0062 u16 rx_nrfifos;
0063 u16 rx_fifosize;
0064 u16 tx_nrfifos;
0065 u16 tx_fifosize;
0066 smc_t __iomem *smcp;
0067 smc_uart_t __iomem *smcup;
0068 scc_t __iomem *sccp;
0069 scc_uart_t __iomem *sccup;
0070 cbd_t __iomem *rx_bd_base;
0071 cbd_t __iomem *rx_cur;
0072 cbd_t __iomem *tx_bd_base;
0073 cbd_t __iomem *tx_cur;
0074 unsigned char *tx_buf;
0075 unsigned char *rx_buf;
0076 u32 flags;
0077 struct clk *clk;
0078 u8 brg;
0079 uint dp_addr;
0080 void *mem_addr;
0081 dma_addr_t dma_addr;
0082 u32 mem_size;
0083
0084 int wait_closing;
0085
0086 u32 command;
0087 struct gpio_desc *gpios[NUM_GPIOS];
0088 };
0089
0090 extern int cpm_uart_nr;
0091 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
0092
0093
0094 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
0095 void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
0096 struct device_node *np);
0097 void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
0098 int cpm_uart_init_portdesc(void);
0099 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
0100 void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
0101
0102 void smc1_lineif(struct uart_cpm_port *pinfo);
0103 void smc2_lineif(struct uart_cpm_port *pinfo);
0104 void scc1_lineif(struct uart_cpm_port *pinfo);
0105 void scc2_lineif(struct uart_cpm_port *pinfo);
0106 void scc3_lineif(struct uart_cpm_port *pinfo);
0107 void scc4_lineif(struct uart_cpm_port *pinfo);
0108
0109
0110
0111
0112 static inline unsigned long cpu2cpm_addr(void *addr,
0113 struct uart_cpm_port *pinfo)
0114 {
0115 int offset;
0116 u32 val = (u32)addr;
0117 u32 mem = (u32)pinfo->mem_addr;
0118
0119 if (likely(val >= mem && val < mem + pinfo->mem_size)) {
0120 offset = val - mem;
0121 return pinfo->dma_addr + offset;
0122 }
0123
0124 BUG();
0125 return 0;
0126 }
0127
0128 static inline void *cpm2cpu_addr(unsigned long addr,
0129 struct uart_cpm_port *pinfo)
0130 {
0131 int offset;
0132 u32 val = addr;
0133 u32 dma = (u32)pinfo->dma_addr;
0134
0135 if (likely(val >= dma && val < dma + pinfo->mem_size)) {
0136 offset = val - dma;
0137 return pinfo->mem_addr + offset;
0138 }
0139
0140 BUG();
0141 return NULL;
0142 }
0143
0144
0145 #endif