tty/serial/arc_uart.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ARC On-Chip(fpga) UART Driver
0004  *
0005  * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
0006  *
0007  * vineetg: July 10th 2012
0008  *  -Decoupled the driver from arch/arc
0009  *    +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
0010  *    +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
0011  *
0012  * Vineetg: Aug 21st 2010
0013  *  -Is uart_tx_stopped() not done in tty write path as it has already been
0014  *   taken care of, in serial core
0015  *
0016  * Vineetg: Aug 18th 2010
0017  *  -New Serial Core based ARC UART driver
0018  *  -Derived largely from blackfin driver albiet with some major tweaks
0019  *
0020  * TODO:
0021  *  -check if sysreq works
0022  */
0023
0024 #include <linux/module.h>
0025 #include <linux/serial.h>
0026 #include <linux/console.h>
0027 #include <linux/sysrq.h>
0028 #include <linux/platform_device.h>
0029 #include <linux/tty.h>
0030 #include <linux/tty_flip.h>
0031 #include <linux/serial_core.h>
0032 #include <linux/io.h>
0033 #include <linux/of_irq.h>
0034 #include <linux/of_address.h>
0035
0036 /*************************************
0037  * ARC UART Hardware Specs
0038  ************************************/
0039 #define ARC_UART_TX_FIFO_SIZE  1
0040
0041 /*
0042  * UART Register set (this is not a Standards Compliant IP)
0043  * Also each reg is Word aligned, but only 8 bits wide
0044  */
0045 #define R_ID0   0
0046 #define R_ID1   4
0047 #define R_ID2   8
0048 #define R_ID3   12
0049 #define R_DATA  16
0050 #define R_STS   20
0051 #define R_BAUDL 24
0052 #define R_BAUDH 28
0053
0054 /* Bits for UART Status Reg (R/W) */
0055 #define RXIENB  0x04    /* Receive Interrupt Enable */
0056 #define TXIENB  0x40    /* Transmit Interrupt Enable */
0057
0058 #define RXEMPTY 0x20    /* Receive FIFO Empty: No char receivede */
0059 #define TXEMPTY 0x80    /* Transmit FIFO Empty, thus char can be written into */
0060
0061 #define RXFULL  0x08    /* Receive FIFO full */
0062 #define RXFULL1 0x10    /* Receive FIFO has space for 1 char (tot space=4) */
0063
0064 #define RXFERR  0x01    /* Frame Error: Stop Bit not detected */
0065 #define RXOERR  0x02    /* OverFlow Err: Char recv but RXFULL still set */
0066
0067 /* Uart bit fiddling helpers: lowest level */
0068 #define RBASE(port, reg)      (port->membase + reg)
0069 #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
0070 #define UART_REG_GET(u, r)    readb(RBASE(u, r))
0071
0072 #define UART_REG_OR(u, r, v)  UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
0073 #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
0074
0075 /* Uart bit fiddling helpers: API level */
0076 #define UART_SET_DATA(uart, val)   UART_REG_SET(uart, R_DATA, val)
0077 #define UART_GET_DATA(uart)        UART_REG_GET(uart, R_DATA)
0078
0079 #define UART_SET_BAUDH(uart, val)  UART_REG_SET(uart, R_BAUDH, val)
0080 #define UART_SET_BAUDL(uart, val)  UART_REG_SET(uart, R_BAUDL, val)
0081
0082 #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
0083 #define UART_GET_STATUS(uart)      UART_REG_GET(uart, R_STS)
0084
0085 #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
0086 #define UART_RX_IRQ_DISABLE(uart)  UART_REG_CLR(uart, R_STS, RXIENB)
0087 #define UART_TX_IRQ_DISABLE(uart)  UART_REG_CLR(uart, R_STS, TXIENB)
0088
0089 #define UART_ALL_IRQ_ENABLE(uart)  UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
0090 #define UART_RX_IRQ_ENABLE(uart)   UART_REG_OR(uart, R_STS, RXIENB)
0091 #define UART_TX_IRQ_ENABLE(uart)   UART_REG_OR(uart, R_STS, TXIENB)
0092
0093 #define ARC_SERIAL_DEV_NAME "ttyARC"
0094
0095 struct arc_uart_port {
0096     struct uart_port port;
0097     unsigned long baud;
0098 };
0099
0100 #define to_arc_port(uport)  container_of(uport, struct arc_uart_port, port)
0101
0102 static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
0103
0104 #ifdef CONFIG_SERIAL_ARC_CONSOLE
0105 static struct console arc_console;
0106 #endif
0107
0108 #define DRIVER_NAME "arc-uart"
0109
0110 static struct uart_driver arc_uart_driver = {
0111     .owner      = THIS_MODULE,
0112     .driver_name    = DRIVER_NAME,
0113     .dev_name   = ARC_SERIAL_DEV_NAME,
0114     .major      = 0,
0115     .minor      = 0,
0116     .nr     = CONFIG_SERIAL_ARC_NR_PORTS,
0117 #ifdef CONFIG_SERIAL_ARC_CONSOLE
0118     .cons       = &arc_console,
0119 #endif
0120 };
0121
0122 static void arc_serial_stop_rx(struct uart_port *port)
0123 {
0124     UART_RX_IRQ_DISABLE(port);
0125 }
0126
0127 static void arc_serial_stop_tx(struct uart_port *port)
0128 {
0129     while (!(UART_GET_STATUS(port) & TXEMPTY))
0130         cpu_relax();
0131
0132     UART_TX_IRQ_DISABLE(port);
0133 }
0134
0135 /*
0136  * Return TIOCSER_TEMT when transmitter is not busy.
0137  */
0138 static unsigned int arc_serial_tx_empty(struct uart_port *port)
0139 {
0140     unsigned int stat;
0141
0142     stat = UART_GET_STATUS(port);
0143     if (stat & TXEMPTY)
0144         return TIOCSER_TEMT;
0145
0146     return 0;
0147 }
0148
0149 /*
0150  * Driver internal routine, used by both tty(serial core) as well as tx-isr
0151  *  -Called under spinlock in either cases
0152  *  -also tty->flow.stopped has already been checked
0153  *     = by uart_start( ) before calling us
0154  *     = tx_ist checks that too before calling
0155  */
0156 static void arc_serial_tx_chars(struct uart_port *port)
0157 {
0158     struct circ_buf *xmit = &port->state->xmit;
0159     int sent = 0;
0160     unsigned char ch;
0161
0162     if (unlikely(port->x_char)) {
0163         UART_SET_DATA(port, port->x_char);
0164         port->icount.tx++;
0165         port->x_char = 0;
0166         sent = 1;
0167     } else if (!uart_circ_empty(xmit)) {
0168         ch = xmit->buf[xmit->tail];
0169         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0170         port->icount.tx++;
0171         while (!(UART_GET_STATUS(port) & TXEMPTY))
0172             cpu_relax();
0173         UART_SET_DATA(port, ch);
0174         sent = 1;
0175     }
0176
0177     /*
0178      * If num chars in xmit buffer are too few, ask tty layer for more.
0179      * By Hard ISR to schedule processing in software interrupt part
0180      */
0181     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0182         uart_write_wakeup(port);
0183
0184     if (sent)
0185         UART_TX_IRQ_ENABLE(port);
0186 }
0187
0188 /*
0189  * port is locked and interrupts are disabled
0190  * uart_start( ) calls us under the port spinlock irqsave
0191  */
0192 static void arc_serial_start_tx(struct uart_port *port)
0193 {
0194     arc_serial_tx_chars(port);
0195 }
0196
0197 static void arc_serial_rx_chars(struct uart_port *port, unsigned int status)
0198 {
0199     unsigned int ch, flg = 0;
0200
0201     /*
0202      * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
0203      * is very subtle. Here's how ...
0204      * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
0205      * driver reads the DATA Reg and keeps doing that in a loop, until
0206      * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
0207      * before RX-EMPTY=0, implies some sort of buffering going on in the
0208      * controller, which is indeed the Rx-FIFO.
0209      */
0210     do {
0211         /*
0212          * This could be an Rx Intr for err (no data),
0213          * so check err and clear that Intr first
0214          */
0215         if (unlikely(status & (RXOERR | RXFERR))) {
0216             if (status & RXOERR) {
0217                 port->icount.overrun++;
0218                 flg = TTY_OVERRUN;
0219                 UART_CLR_STATUS(port, RXOERR);
0220             }
0221
0222             if (status & RXFERR) {
0223                 port->icount.frame++;
0224                 flg = TTY_FRAME;
0225                 UART_CLR_STATUS(port, RXFERR);
0226             }
0227         } else
0228             flg = TTY_NORMAL;
0229
0230         if (status & RXEMPTY)
0231             continue;
0232
0233         ch = UART_GET_DATA(port);
0234         port->icount.rx++;
0235
0236         if (!(uart_handle_sysrq_char(port, ch)))
0237             uart_insert_char(port, status, RXOERR, ch, flg);
0238
0239         tty_flip_buffer_push(&port->state->port);
0240     } while (!((status = UART_GET_STATUS(port)) & RXEMPTY));
0241 }
0242
0243 /*
0244  * A note on the Interrupt handling state machine of this driver
0245  *
0246  * kernel printk writes funnel thru the console driver framework and in order
0247  * to keep things simple as well as efficient, it writes to UART in polled
0248  * mode, in one shot, and exits.
0249  *
0250  * OTOH, Userland output (via tty layer), uses interrupt based writes as there
0251  * can be undeterministic delay between char writes.
0252  *
0253  * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
0254  * disabled.
0255  *
0256  * When tty has some data to send out, serial core calls driver's start_tx
0257  * which
0258  *   -checks-if-tty-buffer-has-char-to-send
0259  *   -writes-data-to-uart
0260  *   -enable-tx-intr
0261  *
0262  * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
0263  * The first thing Tx ISR does is disable further Tx interrupts (as this could
0264  * be the last char to send, before settling down into the quiet polled mode).
0265  * It then calls the exact routine used by tty layer write to send out any
0266  * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
0267  * of no data, it remains disabled.
0268  * This is how the transmit state machine is dynamically switched on/off
0269  */
0270
0271 static irqreturn_t arc_serial_isr(int irq, void *dev_id)
0272 {
0273     struct uart_port *port = dev_id;
0274     unsigned int status;
0275
0276     status = UART_GET_STATUS(port);
0277
0278     /*
0279      * Single IRQ for both Rx (data available) Tx (room available) Interrupt
0280      * notifications from the UART Controller.
0281      * To demultiplex between the two, we check the relevant bits
0282      */
0283     if (status & RXIENB) {
0284
0285         /* already in ISR, no need of xx_irqsave */
0286         spin_lock(&port->lock);
0287         arc_serial_rx_chars(port, status);
0288         spin_unlock(&port->lock);
0289     }
0290
0291     if ((status & TXIENB) && (status & TXEMPTY)) {
0292
0293         /* Unconditionally disable further Tx-Interrupts.
0294          * will be enabled by tx_chars() if needed.
0295          */
0296         UART_TX_IRQ_DISABLE(port);
0297
0298         spin_lock(&port->lock);
0299
0300         if (!uart_tx_stopped(port))
0301             arc_serial_tx_chars(port);
0302
0303         spin_unlock(&port->lock);
0304     }
0305
0306     return IRQ_HANDLED;
0307 }
0308
0309 static unsigned int arc_serial_get_mctrl(struct uart_port *port)
0310 {
0311     /*
0312      * Pretend we have a Modem status reg and following bits are
0313      *  always set, to satify the serial core state machine
0314      *  (DSR) Data Set Ready
0315      *  (CTS) Clear To Send
0316      *  (CAR) Carrier Detect
0317      */
0318     return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
0319 }
0320
0321 static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
0322 {
0323     /* MCR not present */
0324 }
0325
0326 static void arc_serial_break_ctl(struct uart_port *port, int break_state)
0327 {
0328     /* ARC UART doesn't support sending Break signal */
0329 }
0330
0331 static int arc_serial_startup(struct uart_port *port)
0332 {
0333     /* Before we hook up the ISR, Disable all UART Interrupts */
0334     UART_ALL_IRQ_DISABLE(port);
0335
0336     if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) {
0337         dev_warn(port->dev, "Unable to attach ARC UART intr\n");
0338         return -EBUSY;
0339     }
0340
0341     UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */
0342
0343     return 0;
0344 }
0345
0346 /* This is not really needed */
0347 static void arc_serial_shutdown(struct uart_port *port)
0348 {
0349     free_irq(port->irq, port);
0350 }
0351
0352 static void
0353 arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
0354                struct ktermios *old)
0355 {
0356     struct arc_uart_port *uart = to_arc_port(port);
0357     unsigned int baud, uartl, uarth, hw_val;
0358     unsigned long flags;
0359
0360     /*
0361      * Use the generic handler so that any specially encoded baud rates
0362      * such as SPD_xx flags or "%B0" can be handled
0363      * Max Baud I suppose will not be more than current 115K * 4
0364      * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
0365      * spread over two 8-bit registers
0366      */
0367     baud = uart_get_baud_rate(port, new, old, 0, 460800);
0368
0369     hw_val = port->uartclk / (uart->baud * 4) - 1;
0370     uartl = hw_val & 0xFF;
0371     uarth = (hw_val >> 8) & 0xFF;
0372
0373     spin_lock_irqsave(&port->lock, flags);
0374
0375     UART_ALL_IRQ_DISABLE(port);
0376
0377     UART_SET_BAUDL(port, uartl);
0378     UART_SET_BAUDH(port, uarth);
0379
0380     UART_RX_IRQ_ENABLE(port);
0381
0382     /*
0383      * UART doesn't support Parity/Hardware Flow Control;
0384      * Only supports 8N1 character size
0385      */
0386     new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
0387     new->c_cflag |= CS8;
0388
0389     if (old)
0390         tty_termios_copy_hw(new, old);
0391
0392     /* Don't rewrite B0 */
0393     if (tty_termios_baud_rate(new))
0394         tty_termios_encode_baud_rate(new, baud, baud);
0395
0396     uart_update_timeout(port, new->c_cflag, baud);
0397
0398     spin_unlock_irqrestore(&port->lock, flags);
0399 }
0400
0401 static const char *arc_serial_type(struct uart_port *port)
0402 {
0403     return port->type == PORT_ARC ? DRIVER_NAME : NULL;
0404 }
0405
0406 static void arc_serial_release_port(struct uart_port *port)
0407 {
0408 }
0409
0410 static int arc_serial_request_port(struct uart_port *port)
0411 {
0412     return 0;
0413 }
0414
0415 /*
0416  * Verify the new serial_struct (for TIOCSSERIAL).
0417  */
0418 static int
0419 arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
0420 {
0421     if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
0422         return -EINVAL;
0423
0424     return 0;
0425 }
0426
0427 /*
0428  * Configure/autoconfigure the port.
0429  */
0430 static void arc_serial_config_port(struct uart_port *port, int flags)
0431 {
0432     if (flags & UART_CONFIG_TYPE)
0433         port->type = PORT_ARC;
0434 }
0435
0436 #ifdef CONFIG_CONSOLE_POLL
0437
0438 static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
0439 {
0440     while (!(UART_GET_STATUS(port) & TXEMPTY))
0441         cpu_relax();
0442
0443     UART_SET_DATA(port, chr);
0444 }
0445
0446 static int arc_serial_poll_getchar(struct uart_port *port)
0447 {
0448     unsigned char chr;
0449
0450     while (!(UART_GET_STATUS(port) & RXEMPTY))
0451         cpu_relax();
0452
0453     chr = UART_GET_DATA(port);
0454     return chr;
0455 }
0456 #endif
0457
0458 static const struct uart_ops arc_serial_pops = {
0459     .tx_empty   = arc_serial_tx_empty,
0460     .set_mctrl  = arc_serial_set_mctrl,
0461     .get_mctrl  = arc_serial_get_mctrl,
0462     .stop_tx    = arc_serial_stop_tx,
0463     .start_tx   = arc_serial_start_tx,
0464     .stop_rx    = arc_serial_stop_rx,
0465     .break_ctl  = arc_serial_break_ctl,
0466     .startup    = arc_serial_startup,
0467     .shutdown   = arc_serial_shutdown,
0468     .set_termios    = arc_serial_set_termios,
0469     .type       = arc_serial_type,
0470     .release_port   = arc_serial_release_port,
0471     .request_port   = arc_serial_request_port,
0472     .config_port    = arc_serial_config_port,
0473     .verify_port    = arc_serial_verify_port,
0474 #ifdef CONFIG_CONSOLE_POLL
0475     .poll_put_char = arc_serial_poll_putchar,
0476     .poll_get_char = arc_serial_poll_getchar,
0477 #endif
0478 };
0479
0480 #ifdef CONFIG_SERIAL_ARC_CONSOLE
0481
0482 static int arc_serial_console_setup(struct console *co, char *options)
0483 {
0484     struct uart_port *port;
0485     int baud = 115200;
0486     int bits = 8;
0487     int parity = 'n';
0488     int flow = 'n';
0489
0490     if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
0491         return -ENODEV;
0492
0493     /*
0494      * The uart port backing the console (e.g. ttyARC1) might not have been
0495      * init yet. If so, defer the console setup to after the port.
0496      */
0497     port = &arc_uart_ports[co->index].port;
0498     if (!port->membase)
0499         return -ENODEV;
0500
0501     if (options)
0502         uart_parse_options(options, &baud, &parity, &bits, &flow);
0503
0504     /*
0505      * Serial core will call port->ops->set_termios( )
0506      * which will set the baud reg
0507      */
0508     return uart_set_options(port, co, baud, parity, bits, flow);
0509 }
0510
0511 static void arc_serial_console_putchar(struct uart_port *port, unsigned char ch)
0512 {
0513     while (!(UART_GET_STATUS(port) & TXEMPTY))
0514         cpu_relax();
0515
0516     UART_SET_DATA(port, (unsigned char)ch);
0517 }
0518
0519 /*
0520  * Interrupts are disabled on entering
0521  */
0522 static void arc_serial_console_write(struct console *co, const char *s,
0523                      unsigned int count)
0524 {
0525     struct uart_port *port = &arc_uart_ports[co->index].port;
0526     unsigned long flags;
0527
0528     spin_lock_irqsave(&port->lock, flags);
0529     uart_console_write(port, s, count, arc_serial_console_putchar);
0530     spin_unlock_irqrestore(&port->lock, flags);
0531 }
0532
0533 static struct console arc_console = {
0534     .name   = ARC_SERIAL_DEV_NAME,
0535     .write  = arc_serial_console_write,
0536     .device = uart_console_device,
0537     .setup  = arc_serial_console_setup,
0538     .flags  = CON_PRINTBUFFER,
0539     .index  = -1,
0540     .data   = &arc_uart_driver
0541 };
0542
0543 static void arc_early_serial_write(struct console *con, const char *s,
0544                    unsigned int n)
0545 {
0546     struct earlycon_device *dev = con->data;
0547
0548     uart_console_write(&dev->port, s, n, arc_serial_console_putchar);
0549 }
0550
0551 static int __init arc_early_console_setup(struct earlycon_device *dev,
0552                       const char *opt)
0553 {
0554     struct uart_port *port = &dev->port;
0555     unsigned int l, h, hw_val;
0556
0557     if (!dev->port.membase)
0558         return -ENODEV;
0559
0560     hw_val = port->uartclk / (dev->baud * 4) - 1;
0561     l = hw_val & 0xFF;
0562     h = (hw_val >> 8) & 0xFF;
0563
0564     UART_SET_BAUDL(port, l);
0565     UART_SET_BAUDH(port, h);
0566
0567     dev->con->write = arc_early_serial_write;
0568     return 0;
0569 }
0570 OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup);
0571
0572 #endif  /* CONFIG_SERIAL_ARC_CONSOLE */
0573
0574 static int arc_serial_probe(struct platform_device *pdev)
0575 {
0576     struct device_node *np = pdev->dev.of_node;
0577     struct arc_uart_port *uart;
0578     struct uart_port *port;
0579     int dev_id;
0580     u32 val;
0581
0582     /* no device tree device */
0583     if (!np)
0584         return -ENODEV;
0585
0586     dev_id = of_alias_get_id(np, "serial");
0587     if (dev_id < 0)
0588         dev_id = 0;
0589
0590     if (dev_id >= ARRAY_SIZE(arc_uart_ports)) {
0591         dev_err(&pdev->dev, "serial%d out of range\n", dev_id);
0592         return -EINVAL;
0593     }
0594
0595     uart = &arc_uart_ports[dev_id];
0596     port = &uart->port;
0597
0598     if (of_property_read_u32(np, "clock-frequency", &val)) {
0599         dev_err(&pdev->dev, "clock-frequency property NOTset\n");
0600         return -EINVAL;
0601     }
0602     port->uartclk = val;
0603
0604     if (of_property_read_u32(np, "current-speed", &val)) {
0605         dev_err(&pdev->dev, "current-speed property NOT set\n");
0606         return -EINVAL;
0607     }
0608     uart->baud = val;
0609
0610     port->membase = of_iomap(np, 0);
0611     if (!port->membase)
0612         /* No point of dev_err since UART itself is hosed here */
0613         return -ENXIO;
0614
0615     port->irq = irq_of_parse_and_map(np, 0);
0616
0617     port->dev = &pdev->dev;
0618     port->iotype = UPIO_MEM;
0619     port->flags = UPF_BOOT_AUTOCONF;
0620     port->line = dev_id;
0621     port->ops = &arc_serial_pops;
0622     port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ARC_CONSOLE);
0623
0624     port->fifosize = ARC_UART_TX_FIFO_SIZE;
0625
0626     /*
0627      * uart_insert_char( ) uses it in decideding whether to ignore a
0628      * char or not. Explicitly setting it here, removes the subtelty
0629      */
0630     port->ignore_status_mask = 0;
0631
0632     return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
0633 }
0634
0635 static int arc_serial_remove(struct platform_device *pdev)
0636 {
0637     /* This will never be called */
0638     return 0;
0639 }
0640
0641 static const struct of_device_id arc_uart_dt_ids[] = {
0642     { .compatible = "snps,arc-uart" },
0643     { /* Sentinel */ }
0644 };
0645 MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
0646
0647 static struct platform_driver arc_platform_driver = {
0648     .probe = arc_serial_probe,
0649     .remove = arc_serial_remove,
0650     .driver = {
0651         .name = DRIVER_NAME,
0652         .of_match_table  = arc_uart_dt_ids,
0653      },
0654 };
0655
0656 static int __init arc_serial_init(void)
0657 {
0658     int ret;
0659
0660     ret = uart_register_driver(&arc_uart_driver);
0661     if (ret)
0662         return ret;
0663
0664     ret = platform_driver_register(&arc_platform_driver);
0665     if (ret)
0666         uart_unregister_driver(&arc_uart_driver);
0667
0668     return ret;
0669 }
0670
0671 static void __exit arc_serial_exit(void)
0672 {
0673     platform_driver_unregister(&arc_platform_driver);
0674     uart_unregister_driver(&arc_uart_driver);
0675 }
0676
0677 module_init(arc_serial_init);
0678 module_exit(arc_serial_exit);
0679
0680 MODULE_LICENSE("GPL");
0681 MODULE_ALIAS("platform:" DRIVER_NAME);
0682 MODULE_AUTHOR("Vineet Gupta");
0683 MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");