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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  *  Atheros AR933X SoC built-in UART driver
0004  *
0005  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
0006  *
0007  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/ioport.h>
0012 #include <linux/init.h>
0013 #include <linux/console.h>
0014 #include <linux/sysrq.h>
0015 #include <linux/delay.h>
0016 #include <linux/gpio/consumer.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/of.h>
0019 #include <linux/of_platform.h>
0020 #include <linux/tty.h>
0021 #include <linux/tty_flip.h>
0022 #include <linux/serial_core.h>
0023 #include <linux/serial.h>
0024 #include <linux/slab.h>
0025 #include <linux/io.h>
0026 #include <linux/irq.h>
0027 #include <linux/clk.h>
0028 
0029 #include <asm/div64.h>
0030 
0031 #include <asm/mach-ath79/ar933x_uart.h>
0032 
0033 #include "serial_mctrl_gpio.h"
0034 
0035 #define DRIVER_NAME "ar933x-uart"
0036 
0037 #define AR933X_UART_MAX_SCALE   0xff
0038 #define AR933X_UART_MAX_STEP    0xffff
0039 
0040 #define AR933X_UART_MIN_BAUD    300
0041 #define AR933X_UART_MAX_BAUD    3000000
0042 
0043 #define AR933X_DUMMY_STATUS_RD  0x01
0044 
0045 static struct uart_driver ar933x_uart_driver;
0046 
0047 struct ar933x_uart_port {
0048     struct uart_port    port;
0049     unsigned int        ier;    /* shadow Interrupt Enable Register */
0050     unsigned int        min_baud;
0051     unsigned int        max_baud;
0052     struct clk      *clk;
0053     struct mctrl_gpios  *gpios;
0054     struct gpio_desc    *rts_gpiod;
0055 };
0056 
0057 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
0058                         int offset)
0059 {
0060     return readl(up->port.membase + offset);
0061 }
0062 
0063 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
0064                      int offset, unsigned int value)
0065 {
0066     writel(value, up->port.membase + offset);
0067 }
0068 
0069 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
0070                   unsigned int offset,
0071                   unsigned int mask,
0072                   unsigned int val)
0073 {
0074     unsigned int t;
0075 
0076     t = ar933x_uart_read(up, offset);
0077     t &= ~mask;
0078     t |= val;
0079     ar933x_uart_write(up, offset, t);
0080 }
0081 
0082 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
0083                        unsigned int offset,
0084                        unsigned int val)
0085 {
0086     ar933x_uart_rmw(up, offset, 0, val);
0087 }
0088 
0089 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
0090                      unsigned int offset,
0091                      unsigned int val)
0092 {
0093     ar933x_uart_rmw(up, offset, val, 0);
0094 }
0095 
0096 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
0097 {
0098     up->ier |= AR933X_UART_INT_TX_EMPTY;
0099     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
0100 }
0101 
0102 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
0103 {
0104     up->ier &= ~AR933X_UART_INT_TX_EMPTY;
0105     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
0106 }
0107 
0108 static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
0109 {
0110     up->ier |= AR933X_UART_INT_RX_VALID;
0111     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
0112 }
0113 
0114 static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
0115 {
0116     up->ier &= ~AR933X_UART_INT_RX_VALID;
0117     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
0118 }
0119 
0120 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
0121 {
0122     unsigned int rdata;
0123 
0124     rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
0125     rdata |= AR933X_UART_DATA_TX_CSR;
0126     ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
0127 }
0128 
0129 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
0130 {
0131     struct ar933x_uart_port *up =
0132         container_of(port, struct ar933x_uart_port, port);
0133     unsigned long flags;
0134     unsigned int rdata;
0135 
0136     spin_lock_irqsave(&up->port.lock, flags);
0137     rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
0138     spin_unlock_irqrestore(&up->port.lock, flags);
0139 
0140     return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
0141 }
0142 
0143 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
0144 {
0145     struct ar933x_uart_port *up =
0146         container_of(port, struct ar933x_uart_port, port);
0147     int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
0148 
0149     mctrl_gpio_get(up->gpios, &ret);
0150 
0151     return ret;
0152 }
0153 
0154 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
0155 {
0156     struct ar933x_uart_port *up =
0157         container_of(port, struct ar933x_uart_port, port);
0158 
0159     mctrl_gpio_set(up->gpios, mctrl);
0160 }
0161 
0162 static void ar933x_uart_start_tx(struct uart_port *port)
0163 {
0164     struct ar933x_uart_port *up =
0165         container_of(port, struct ar933x_uart_port, port);
0166 
0167     ar933x_uart_start_tx_interrupt(up);
0168 }
0169 
0170 static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
0171 {
0172     unsigned int status;
0173     unsigned int timeout = 60000;
0174 
0175     /* Wait up to 60ms for the character(s) to be sent. */
0176     do {
0177         status = ar933x_uart_read(up, AR933X_UART_CS_REG);
0178         if (--timeout == 0)
0179             break;
0180         udelay(1);
0181     } while (status & AR933X_UART_CS_TX_BUSY);
0182 
0183     if (timeout == 0)
0184         dev_err(up->port.dev, "waiting for TX timed out\n");
0185 }
0186 
0187 static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
0188 {
0189     unsigned int status;
0190 
0191     /* clear RX_VALID interrupt */
0192     ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
0193 
0194     /* remove characters from the RX FIFO */
0195     do {
0196         ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
0197         status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
0198     } while (status & AR933X_UART_DATA_RX_CSR);
0199 }
0200 
0201 static void ar933x_uart_stop_tx(struct uart_port *port)
0202 {
0203     struct ar933x_uart_port *up =
0204         container_of(port, struct ar933x_uart_port, port);
0205 
0206     ar933x_uart_stop_tx_interrupt(up);
0207 }
0208 
0209 static void ar933x_uart_stop_rx(struct uart_port *port)
0210 {
0211     struct ar933x_uart_port *up =
0212         container_of(port, struct ar933x_uart_port, port);
0213 
0214     ar933x_uart_stop_rx_interrupt(up);
0215 }
0216 
0217 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
0218 {
0219     struct ar933x_uart_port *up =
0220         container_of(port, struct ar933x_uart_port, port);
0221     unsigned long flags;
0222 
0223     spin_lock_irqsave(&up->port.lock, flags);
0224     if (break_state == -1)
0225         ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
0226                     AR933X_UART_CS_TX_BREAK);
0227     else
0228         ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
0229                       AR933X_UART_CS_TX_BREAK);
0230     spin_unlock_irqrestore(&up->port.lock, flags);
0231 }
0232 
0233 /*
0234  * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
0235  */
0236 static unsigned long ar933x_uart_get_baud(unsigned int clk,
0237                       unsigned int scale,
0238                       unsigned int step)
0239 {
0240     u64 t;
0241     u32 div;
0242 
0243     div = (2 << 16) * (scale + 1);
0244     t = clk;
0245     t *= step;
0246     t += (div / 2);
0247     do_div(t, div);
0248 
0249     return t;
0250 }
0251 
0252 static void ar933x_uart_get_scale_step(unsigned int clk,
0253                        unsigned int baud,
0254                        unsigned int *scale,
0255                        unsigned int *step)
0256 {
0257     unsigned int tscale;
0258     long min_diff;
0259 
0260     *scale = 0;
0261     *step = 0;
0262 
0263     min_diff = baud;
0264     for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
0265         u64 tstep;
0266         int diff;
0267 
0268         tstep = baud * (tscale + 1);
0269         tstep *= (2 << 16);
0270         do_div(tstep, clk);
0271 
0272         if (tstep > AR933X_UART_MAX_STEP)
0273             break;
0274 
0275         diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
0276         if (diff < min_diff) {
0277             min_diff = diff;
0278             *scale = tscale;
0279             *step = tstep;
0280         }
0281     }
0282 }
0283 
0284 static void ar933x_uart_set_termios(struct uart_port *port,
0285                     struct ktermios *new,
0286                     struct ktermios *old)
0287 {
0288     struct ar933x_uart_port *up =
0289         container_of(port, struct ar933x_uart_port, port);
0290     unsigned int cs;
0291     unsigned long flags;
0292     unsigned int baud, scale, step;
0293 
0294     /* Only CS8 is supported */
0295     new->c_cflag &= ~CSIZE;
0296     new->c_cflag |= CS8;
0297 
0298     /* Only one stop bit is supported */
0299     new->c_cflag &= ~CSTOPB;
0300 
0301     cs = 0;
0302     if (new->c_cflag & PARENB) {
0303         if (!(new->c_cflag & PARODD))
0304             cs |= AR933X_UART_CS_PARITY_EVEN;
0305         else
0306             cs |= AR933X_UART_CS_PARITY_ODD;
0307     } else {
0308         cs |= AR933X_UART_CS_PARITY_NONE;
0309     }
0310 
0311     /* Mark/space parity is not supported */
0312     new->c_cflag &= ~CMSPAR;
0313 
0314     baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
0315     ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
0316 
0317     /*
0318      * Ok, we're now changing the port state. Do it with
0319      * interrupts disabled.
0320      */
0321     spin_lock_irqsave(&up->port.lock, flags);
0322 
0323     /* disable the UART */
0324     ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
0325               AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
0326 
0327     /* Update the per-port timeout. */
0328     uart_update_timeout(port, new->c_cflag, baud);
0329 
0330     up->port.ignore_status_mask = 0;
0331 
0332     /* ignore all characters if CREAD is not set */
0333     if ((new->c_cflag & CREAD) == 0)
0334         up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
0335 
0336     ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
0337               scale << AR933X_UART_CLOCK_SCALE_S | step);
0338 
0339     /* setup configuration register */
0340     ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
0341 
0342     /* enable host interrupt */
0343     ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
0344                 AR933X_UART_CS_HOST_INT_EN);
0345 
0346     /* enable RX and TX ready overide */
0347     ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
0348         AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
0349 
0350     /* reenable the UART */
0351     ar933x_uart_rmw(up, AR933X_UART_CS_REG,
0352             AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
0353             AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
0354 
0355     spin_unlock_irqrestore(&up->port.lock, flags);
0356 
0357     if (tty_termios_baud_rate(new))
0358         tty_termios_encode_baud_rate(new, baud, baud);
0359 }
0360 
0361 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
0362 {
0363     struct tty_port *port = &up->port.state->port;
0364     int max_count = 256;
0365 
0366     do {
0367         unsigned int rdata;
0368         unsigned char ch;
0369 
0370         rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
0371         if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
0372             break;
0373 
0374         /* remove the character from the FIFO */
0375         ar933x_uart_write(up, AR933X_UART_DATA_REG,
0376                   AR933X_UART_DATA_RX_CSR);
0377 
0378         up->port.icount.rx++;
0379         ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
0380 
0381         if (uart_handle_sysrq_char(&up->port, ch))
0382             continue;
0383 
0384         if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
0385             tty_insert_flip_char(port, ch, TTY_NORMAL);
0386     } while (max_count-- > 0);
0387 
0388     tty_flip_buffer_push(port);
0389 }
0390 
0391 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
0392 {
0393     struct circ_buf *xmit = &up->port.state->xmit;
0394     struct serial_rs485 *rs485conf = &up->port.rs485;
0395     int count;
0396     bool half_duplex_send = false;
0397 
0398     if (uart_tx_stopped(&up->port))
0399         return;
0400 
0401     if ((rs485conf->flags & SER_RS485_ENABLED) &&
0402         (up->port.x_char || !uart_circ_empty(xmit))) {
0403         ar933x_uart_stop_rx_interrupt(up);
0404         gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
0405         half_duplex_send = true;
0406     }
0407 
0408     count = up->port.fifosize;
0409     do {
0410         unsigned int rdata;
0411 
0412         rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
0413         if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
0414             break;
0415 
0416         if (up->port.x_char) {
0417             ar933x_uart_putc(up, up->port.x_char);
0418             up->port.icount.tx++;
0419             up->port.x_char = 0;
0420             continue;
0421         }
0422 
0423         if (uart_circ_empty(xmit))
0424             break;
0425 
0426         ar933x_uart_putc(up, xmit->buf[xmit->tail]);
0427 
0428         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0429         up->port.icount.tx++;
0430     } while (--count > 0);
0431 
0432     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0433         uart_write_wakeup(&up->port);
0434 
0435     if (!uart_circ_empty(xmit)) {
0436         ar933x_uart_start_tx_interrupt(up);
0437     } else if (half_duplex_send) {
0438         ar933x_uart_wait_tx_complete(up);
0439         ar933x_uart_rx_flush(up);
0440         ar933x_uart_start_rx_interrupt(up);
0441         gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
0442     }
0443 }
0444 
0445 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
0446 {
0447     struct ar933x_uart_port *up = dev_id;
0448     unsigned int status;
0449 
0450     status = ar933x_uart_read(up, AR933X_UART_CS_REG);
0451     if ((status & AR933X_UART_CS_HOST_INT) == 0)
0452         return IRQ_NONE;
0453 
0454     spin_lock(&up->port.lock);
0455 
0456     status = ar933x_uart_read(up, AR933X_UART_INT_REG);
0457     status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
0458 
0459     if (status & AR933X_UART_INT_RX_VALID) {
0460         ar933x_uart_write(up, AR933X_UART_INT_REG,
0461                   AR933X_UART_INT_RX_VALID);
0462         ar933x_uart_rx_chars(up);
0463     }
0464 
0465     if (status & AR933X_UART_INT_TX_EMPTY) {
0466         ar933x_uart_write(up, AR933X_UART_INT_REG,
0467                   AR933X_UART_INT_TX_EMPTY);
0468         ar933x_uart_stop_tx_interrupt(up);
0469         ar933x_uart_tx_chars(up);
0470     }
0471 
0472     spin_unlock(&up->port.lock);
0473 
0474     return IRQ_HANDLED;
0475 }
0476 
0477 static int ar933x_uart_startup(struct uart_port *port)
0478 {
0479     struct ar933x_uart_port *up =
0480         container_of(port, struct ar933x_uart_port, port);
0481     unsigned long flags;
0482     int ret;
0483 
0484     ret = request_irq(up->port.irq, ar933x_uart_interrupt,
0485               up->port.irqflags, dev_name(up->port.dev), up);
0486     if (ret)
0487         return ret;
0488 
0489     spin_lock_irqsave(&up->port.lock, flags);
0490 
0491     /* Enable HOST interrupts */
0492     ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
0493                 AR933X_UART_CS_HOST_INT_EN);
0494 
0495     /* enable RX and TX ready overide */
0496     ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
0497         AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
0498 
0499     /* Enable RX interrupts */
0500     ar933x_uart_start_rx_interrupt(up);
0501 
0502     spin_unlock_irqrestore(&up->port.lock, flags);
0503 
0504     return 0;
0505 }
0506 
0507 static void ar933x_uart_shutdown(struct uart_port *port)
0508 {
0509     struct ar933x_uart_port *up =
0510         container_of(port, struct ar933x_uart_port, port);
0511 
0512     /* Disable all interrupts */
0513     up->ier = 0;
0514     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
0515 
0516     /* Disable break condition */
0517     ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
0518                   AR933X_UART_CS_TX_BREAK);
0519 
0520     free_irq(up->port.irq, up);
0521 }
0522 
0523 static const char *ar933x_uart_type(struct uart_port *port)
0524 {
0525     return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
0526 }
0527 
0528 static void ar933x_uart_release_port(struct uart_port *port)
0529 {
0530     /* Nothing to release ... */
0531 }
0532 
0533 static int ar933x_uart_request_port(struct uart_port *port)
0534 {
0535     /* UARTs always present */
0536     return 0;
0537 }
0538 
0539 static void ar933x_uart_config_port(struct uart_port *port, int flags)
0540 {
0541     if (flags & UART_CONFIG_TYPE)
0542         port->type = PORT_AR933X;
0543 }
0544 
0545 static int ar933x_uart_verify_port(struct uart_port *port,
0546                    struct serial_struct *ser)
0547 {
0548     struct ar933x_uart_port *up =
0549         container_of(port, struct ar933x_uart_port, port);
0550 
0551     if (ser->type != PORT_UNKNOWN &&
0552         ser->type != PORT_AR933X)
0553         return -EINVAL;
0554 
0555     if (ser->irq < 0 || ser->irq >= NR_IRQS)
0556         return -EINVAL;
0557 
0558     if (ser->baud_base < up->min_baud ||
0559         ser->baud_base > up->max_baud)
0560         return -EINVAL;
0561 
0562     return 0;
0563 }
0564 
0565 static const struct uart_ops ar933x_uart_ops = {
0566     .tx_empty   = ar933x_uart_tx_empty,
0567     .set_mctrl  = ar933x_uart_set_mctrl,
0568     .get_mctrl  = ar933x_uart_get_mctrl,
0569     .stop_tx    = ar933x_uart_stop_tx,
0570     .start_tx   = ar933x_uart_start_tx,
0571     .stop_rx    = ar933x_uart_stop_rx,
0572     .break_ctl  = ar933x_uart_break_ctl,
0573     .startup    = ar933x_uart_startup,
0574     .shutdown   = ar933x_uart_shutdown,
0575     .set_termios    = ar933x_uart_set_termios,
0576     .type       = ar933x_uart_type,
0577     .release_port   = ar933x_uart_release_port,
0578     .request_port   = ar933x_uart_request_port,
0579     .config_port    = ar933x_uart_config_port,
0580     .verify_port    = ar933x_uart_verify_port,
0581 };
0582 
0583 static int ar933x_config_rs485(struct uart_port *port, struct ktermios *termios,
0584                 struct serial_rs485 *rs485conf)
0585 {
0586     return 0;
0587 }
0588 
0589 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
0590 static struct ar933x_uart_port *
0591 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
0592 
0593 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
0594 {
0595     unsigned int status;
0596     unsigned int timeout = 60000;
0597 
0598     /* Wait up to 60ms for the character(s) to be sent. */
0599     do {
0600         status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
0601         if (--timeout == 0)
0602             break;
0603         udelay(1);
0604     } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
0605 }
0606 
0607 static void ar933x_uart_console_putchar(struct uart_port *port, unsigned char ch)
0608 {
0609     struct ar933x_uart_port *up =
0610         container_of(port, struct ar933x_uart_port, port);
0611 
0612     ar933x_uart_wait_xmitr(up);
0613     ar933x_uart_putc(up, ch);
0614 }
0615 
0616 static void ar933x_uart_console_write(struct console *co, const char *s,
0617                       unsigned int count)
0618 {
0619     struct ar933x_uart_port *up = ar933x_console_ports[co->index];
0620     unsigned long flags;
0621     unsigned int int_en;
0622     int locked = 1;
0623 
0624     local_irq_save(flags);
0625 
0626     if (up->port.sysrq)
0627         locked = 0;
0628     else if (oops_in_progress)
0629         locked = spin_trylock(&up->port.lock);
0630     else
0631         spin_lock(&up->port.lock);
0632 
0633     /*
0634      * First save the IER then disable the interrupts
0635      */
0636     int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
0637     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
0638 
0639     uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
0640 
0641     /*
0642      * Finally, wait for transmitter to become empty
0643      * and restore the IER
0644      */
0645     ar933x_uart_wait_xmitr(up);
0646     ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
0647 
0648     ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
0649 
0650     if (locked)
0651         spin_unlock(&up->port.lock);
0652 
0653     local_irq_restore(flags);
0654 }
0655 
0656 static int ar933x_uart_console_setup(struct console *co, char *options)
0657 {
0658     struct ar933x_uart_port *up;
0659     int baud = 115200;
0660     int bits = 8;
0661     int parity = 'n';
0662     int flow = 'n';
0663 
0664     if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
0665         return -EINVAL;
0666 
0667     up = ar933x_console_ports[co->index];
0668     if (!up)
0669         return -ENODEV;
0670 
0671     if (options)
0672         uart_parse_options(options, &baud, &parity, &bits, &flow);
0673 
0674     return uart_set_options(&up->port, co, baud, parity, bits, flow);
0675 }
0676 
0677 static struct console ar933x_uart_console = {
0678     .name       = "ttyATH",
0679     .write      = ar933x_uart_console_write,
0680     .device     = uart_console_device,
0681     .setup      = ar933x_uart_console_setup,
0682     .flags      = CON_PRINTBUFFER,
0683     .index      = -1,
0684     .data       = &ar933x_uart_driver,
0685 };
0686 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
0687 
0688 static struct uart_driver ar933x_uart_driver = {
0689     .owner      = THIS_MODULE,
0690     .driver_name    = DRIVER_NAME,
0691     .dev_name   = "ttyATH",
0692     .nr     = CONFIG_SERIAL_AR933X_NR_UARTS,
0693     .cons       = NULL, /* filled in runtime */
0694 };
0695 
0696 static const struct serial_rs485 ar933x_no_rs485 = {};
0697 static const struct serial_rs485 ar933x_rs485_supported = {
0698     .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
0699 };
0700 
0701 static int ar933x_uart_probe(struct platform_device *pdev)
0702 {
0703     struct ar933x_uart_port *up;
0704     struct uart_port *port;
0705     struct resource *mem_res;
0706     struct device_node *np;
0707     unsigned int baud;
0708     int id;
0709     int ret;
0710     int irq;
0711 
0712     np = pdev->dev.of_node;
0713     if (IS_ENABLED(CONFIG_OF) && np) {
0714         id = of_alias_get_id(np, "serial");
0715         if (id < 0) {
0716             dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
0717                 id);
0718             return id;
0719         }
0720     } else {
0721         id = pdev->id;
0722         if (id == -1)
0723             id = 0;
0724     }
0725 
0726     if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
0727         return -EINVAL;
0728 
0729     irq = platform_get_irq(pdev, 0);
0730     if (irq < 0)
0731         return irq;
0732 
0733     up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
0734               GFP_KERNEL);
0735     if (!up)
0736         return -ENOMEM;
0737 
0738     up->clk = devm_clk_get(&pdev->dev, "uart");
0739     if (IS_ERR(up->clk)) {
0740         dev_err(&pdev->dev, "unable to get UART clock\n");
0741         return PTR_ERR(up->clk);
0742     }
0743 
0744     port = &up->port;
0745 
0746     mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0747     port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
0748     if (IS_ERR(port->membase))
0749         return PTR_ERR(port->membase);
0750 
0751     ret = clk_prepare_enable(up->clk);
0752     if (ret)
0753         return ret;
0754 
0755     port->uartclk = clk_get_rate(up->clk);
0756     if (!port->uartclk) {
0757         ret = -EINVAL;
0758         goto err_disable_clk;
0759     }
0760 
0761     port->mapbase = mem_res->start;
0762     port->line = id;
0763     port->irq = irq;
0764     port->dev = &pdev->dev;
0765     port->type = PORT_AR933X;
0766     port->iotype = UPIO_MEM32;
0767 
0768     port->regshift = 2;
0769     port->fifosize = AR933X_UART_FIFO_SIZE;
0770     port->ops = &ar933x_uart_ops;
0771     port->rs485_config = ar933x_config_rs485;
0772     port->rs485_supported = ar933x_rs485_supported;
0773 
0774     baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
0775     up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
0776 
0777     baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
0778     up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
0779 
0780     ret = uart_get_rs485_mode(port);
0781     if (ret)
0782         goto err_disable_clk;
0783 
0784     up->gpios = mctrl_gpio_init(port, 0);
0785     if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
0786         ret = PTR_ERR(up->gpios);
0787         goto err_disable_clk;
0788     }
0789 
0790     up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
0791 
0792     if (!up->rts_gpiod) {
0793         port->rs485_supported = ar933x_no_rs485;
0794         if (port->rs485.flags & SER_RS485_ENABLED) {
0795             dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
0796             port->rs485.flags &= ~SER_RS485_ENABLED;
0797         }
0798     }
0799 
0800 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
0801     ar933x_console_ports[up->port.line] = up;
0802 #endif
0803 
0804     ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
0805     if (ret)
0806         goto err_disable_clk;
0807 
0808     platform_set_drvdata(pdev, up);
0809     return 0;
0810 
0811 err_disable_clk:
0812     clk_disable_unprepare(up->clk);
0813     return ret;
0814 }
0815 
0816 static int ar933x_uart_remove(struct platform_device *pdev)
0817 {
0818     struct ar933x_uart_port *up;
0819 
0820     up = platform_get_drvdata(pdev);
0821 
0822     if (up) {
0823         uart_remove_one_port(&ar933x_uart_driver, &up->port);
0824         clk_disable_unprepare(up->clk);
0825     }
0826 
0827     return 0;
0828 }
0829 
0830 #ifdef CONFIG_OF
0831 static const struct of_device_id ar933x_uart_of_ids[] = {
0832     { .compatible = "qca,ar9330-uart" },
0833     {},
0834 };
0835 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
0836 #endif
0837 
0838 static struct platform_driver ar933x_uart_platform_driver = {
0839     .probe      = ar933x_uart_probe,
0840     .remove     = ar933x_uart_remove,
0841     .driver     = {
0842         .name       = DRIVER_NAME,
0843         .of_match_table = of_match_ptr(ar933x_uart_of_ids),
0844     },
0845 };
0846 
0847 static int __init ar933x_uart_init(void)
0848 {
0849     int ret;
0850 
0851 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
0852     ar933x_uart_driver.cons = &ar933x_uart_console;
0853 #endif
0854 
0855     ret = uart_register_driver(&ar933x_uart_driver);
0856     if (ret)
0857         goto err_out;
0858 
0859     ret = platform_driver_register(&ar933x_uart_platform_driver);
0860     if (ret)
0861         goto err_unregister_uart_driver;
0862 
0863     return 0;
0864 
0865 err_unregister_uart_driver:
0866     uart_unregister_driver(&ar933x_uart_driver);
0867 err_out:
0868     return ret;
0869 }
0870 
0871 static void __exit ar933x_uart_exit(void)
0872 {
0873     platform_driver_unregister(&ar933x_uart_platform_driver);
0874     uart_unregister_driver(&ar933x_uart_driver);
0875 }
0876 
0877 module_init(ar933x_uart_init);
0878 module_exit(ar933x_uart_exit);
0879 
0880 MODULE_DESCRIPTION("Atheros AR933X UART driver");
0881 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
0882 MODULE_LICENSE("GPL v2");
0883 MODULE_ALIAS("platform:" DRIVER_NAME);
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