Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __GRLIB_APBUART_H__
0003 #define __GRLIB_APBUART_H__
0004 
0005 #include <asm/io.h>
0006 
0007 #define UART_NR     8
0008 static int grlib_apbuart_port_nr;
0009 
0010 struct grlib_apbuart_regs_map {
0011     u32 data;
0012     u32 status;
0013     u32 ctrl;
0014     u32 scaler;
0015 };
0016 
0017 struct amba_prom_registers {
0018     unsigned int phys_addr;
0019     unsigned int reg_size;
0020 };
0021 
0022 /*
0023  *  The following defines the bits in the APBUART Status Registers.
0024  */
0025 #define UART_STATUS_DR   0x00000001 /* Data Ready */
0026 #define UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
0027 #define UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
0028 #define UART_STATUS_BR   0x00000008 /* Break Error */
0029 #define UART_STATUS_OE   0x00000010 /* RX Overrun Error */
0030 #define UART_STATUS_PE   0x00000020 /* RX Parity Error */
0031 #define UART_STATUS_FE   0x00000040 /* RX Framing Error */
0032 #define UART_STATUS_ERR  0x00000078 /* Error Mask */
0033 
0034 /*
0035  *  The following defines the bits in the APBUART Ctrl Registers.
0036  */
0037 #define UART_CTRL_RE     0x00000001 /* Receiver enable */
0038 #define UART_CTRL_TE     0x00000002 /* Transmitter enable */
0039 #define UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
0040 #define UART_CTRL_TI     0x00000008 /* Transmitter irq */
0041 #define UART_CTRL_PS     0x00000010 /* Parity select */
0042 #define UART_CTRL_PE     0x00000020 /* Parity enable */
0043 #define UART_CTRL_FL     0x00000040 /* Flow control enable */
0044 #define UART_CTRL_LB     0x00000080 /* Loopback enable */
0045 
0046 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
0047 
0048 #define APBBASE_DATA_P(port)    (&(APBBASE(port)->data))
0049 #define APBBASE_STATUS_P(port)  (&(APBBASE(port)->status))
0050 #define APBBASE_CTRL_P(port)    (&(APBBASE(port)->ctrl))
0051 #define APBBASE_SCALAR_P(port)  (&(APBBASE(port)->scaler))
0052 
0053 #define UART_GET_CHAR(port) (__raw_readl(APBBASE_DATA_P(port)))
0054 #define UART_PUT_CHAR(port, v)  (__raw_writel(v, APBBASE_DATA_P(port)))
0055 #define UART_GET_STATUS(port)   (__raw_readl(APBBASE_STATUS_P(port)))
0056 #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port)))
0057 #define UART_GET_CTRL(port) (__raw_readl(APBBASE_CTRL_P(port)))
0058 #define UART_PUT_CTRL(port, v)  (__raw_writel(v, APBBASE_CTRL_P(port)))
0059 #define UART_GET_SCAL(port) (__raw_readl(APBBASE_SCALAR_P(port)))
0060 #define UART_PUT_SCAL(port, v)  (__raw_writel(v, APBBASE_SCALAR_P(port)))
0061 
0062 #define UART_RX_DATA(s)     (((s) & UART_STATUS_DR) != 0)
0063 #define UART_TX_READY(s)    (((s) & UART_STATUS_THE) != 0)
0064 
0065 #endif /* __GRLIB_APBUART_H__ */