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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * altera_uart.c -- Altera UART driver
0004  *
0005  * Based on mcf.c -- Freescale ColdFire UART driver
0006  *
0007  * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
0008  * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
0009  * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
0010  */
0011 
0012 #include <linux/kernel.h>
0013 #include <linux/init.h>
0014 #include <linux/timer.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/module.h>
0017 #include <linux/console.h>
0018 #include <linux/tty.h>
0019 #include <linux/tty_flip.h>
0020 #include <linux/serial.h>
0021 #include <linux/serial_core.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/of.h>
0024 #include <linux/io.h>
0025 #include <linux/altera_uart.h>
0026 
0027 #define DRV_NAME "altera_uart"
0028 #define SERIAL_ALTERA_MAJOR 204
0029 #define SERIAL_ALTERA_MINOR 213
0030 
0031 /*
0032  * Altera UART register definitions according to the Nios UART datasheet:
0033  * http://www.altera.com/literature/ds/ds_nios_uart.pdf
0034  */
0035 
0036 #define ALTERA_UART_SIZE        32
0037 
0038 #define ALTERA_UART_RXDATA_REG      0
0039 #define ALTERA_UART_TXDATA_REG      4
0040 #define ALTERA_UART_STATUS_REG      8
0041 #define ALTERA_UART_CONTROL_REG     12
0042 #define ALTERA_UART_DIVISOR_REG     16
0043 #define ALTERA_UART_EOP_REG     20
0044 
0045 #define ALTERA_UART_STATUS_PE_MSK   0x0001  /* parity error */
0046 #define ALTERA_UART_STATUS_FE_MSK   0x0002  /* framing error */
0047 #define ALTERA_UART_STATUS_BRK_MSK  0x0004  /* break */
0048 #define ALTERA_UART_STATUS_ROE_MSK  0x0008  /* RX overrun error */
0049 #define ALTERA_UART_STATUS_TOE_MSK  0x0010  /* TX overrun error */
0050 #define ALTERA_UART_STATUS_TMT_MSK  0x0020  /* TX shift register state */
0051 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040  /* TX ready */
0052 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080  /* RX ready */
0053 #define ALTERA_UART_STATUS_E_MSK    0x0100  /* exception condition */
0054 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400  /* CTS logic-level change */
0055 #define ALTERA_UART_STATUS_CTS_MSK  0x0800  /* CTS logic state */
0056 #define ALTERA_UART_STATUS_EOP_MSK  0x1000  /* EOP written/read */
0057 
0058                         /* Enable interrupt on... */
0059 #define ALTERA_UART_CONTROL_PE_MSK  0x0001  /* ...parity error */
0060 #define ALTERA_UART_CONTROL_FE_MSK  0x0002  /* ...framing error */
0061 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004  /* ...break */
0062 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008  /* ...RX overrun */
0063 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010  /* ...TX overrun */
0064 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020  /* ...TX shift register empty */
0065 #define ALTERA_UART_CONTROL_TRDY_MSK    0x0040  /* ...TX ready */
0066 #define ALTERA_UART_CONTROL_RRDY_MSK    0x0080  /* ...RX ready */
0067 #define ALTERA_UART_CONTROL_E_MSK   0x0100  /* ...exception*/
0068 
0069 #define ALTERA_UART_CONTROL_TRBK_MSK    0x0200  /* TX break */
0070 #define ALTERA_UART_CONTROL_DCTS_MSK    0x0400  /* Interrupt on CTS change */
0071 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800  /* RTS signal */
0072 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000  /* Interrupt on EOP */
0073 
0074 /*
0075  * Local per-uart structure.
0076  */
0077 struct altera_uart {
0078     struct uart_port port;
0079     struct timer_list tmr;
0080     unsigned int sigs;  /* Local copy of line sigs */
0081     unsigned short imr; /* Local IMR mirror */
0082 };
0083 
0084 static u32 altera_uart_readl(struct uart_port *port, int reg)
0085 {
0086     return readl(port->membase + (reg << port->regshift));
0087 }
0088 
0089 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
0090 {
0091     writel(dat, port->membase + (reg << port->regshift));
0092 }
0093 
0094 static unsigned int altera_uart_tx_empty(struct uart_port *port)
0095 {
0096     return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0097         ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
0098 }
0099 
0100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
0101 {
0102     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0103     unsigned int sigs;
0104 
0105     sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0106          ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
0107     sigs |= (pp->sigs & TIOCM_RTS);
0108 
0109     return sigs;
0110 }
0111 
0112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
0113 {
0114     unsigned short imr = pp->imr;
0115 
0116     /*
0117      * If the device doesn't have an irq, ensure that the irq bits are
0118      * masked out to keep the irq line inactive.
0119      */
0120     if (!pp->port.irq)
0121         imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
0122 
0123     altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
0124 }
0125 
0126 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
0127 {
0128     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0129 
0130     pp->sigs = sigs;
0131     if (sigs & TIOCM_RTS)
0132         pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
0133     else
0134         pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
0135     altera_uart_update_ctrl_reg(pp);
0136 }
0137 
0138 static void altera_uart_start_tx(struct uart_port *port)
0139 {
0140     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0141 
0142     pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
0143     altera_uart_update_ctrl_reg(pp);
0144 }
0145 
0146 static void altera_uart_stop_tx(struct uart_port *port)
0147 {
0148     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0149 
0150     pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0151     altera_uart_update_ctrl_reg(pp);
0152 }
0153 
0154 static void altera_uart_stop_rx(struct uart_port *port)
0155 {
0156     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0157 
0158     pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
0159     altera_uart_update_ctrl_reg(pp);
0160 }
0161 
0162 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
0163 {
0164     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0165     unsigned long flags;
0166 
0167     spin_lock_irqsave(&port->lock, flags);
0168     if (break_state == -1)
0169         pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
0170     else
0171         pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
0172     altera_uart_update_ctrl_reg(pp);
0173     spin_unlock_irqrestore(&port->lock, flags);
0174 }
0175 
0176 static void altera_uart_set_termios(struct uart_port *port,
0177                     struct ktermios *termios,
0178                     struct ktermios *old)
0179 {
0180     unsigned long flags;
0181     unsigned int baud, baudclk;
0182 
0183     baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
0184     baudclk = port->uartclk / baud;
0185 
0186     if (old)
0187         tty_termios_copy_hw(termios, old);
0188     tty_termios_encode_baud_rate(termios, baud, baud);
0189 
0190     spin_lock_irqsave(&port->lock, flags);
0191     uart_update_timeout(port, termios->c_cflag, baud);
0192     altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
0193     spin_unlock_irqrestore(&port->lock, flags);
0194 
0195     /*
0196      * FIXME: port->read_status_mask and port->ignore_status_mask
0197      * need to be initialized based on termios settings for
0198      * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
0199      */
0200 }
0201 
0202 static void altera_uart_rx_chars(struct altera_uart *pp)
0203 {
0204     struct uart_port *port = &pp->port;
0205     unsigned char ch, flag;
0206     unsigned short status;
0207 
0208     while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
0209            ALTERA_UART_STATUS_RRDY_MSK) {
0210         ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
0211         flag = TTY_NORMAL;
0212         port->icount.rx++;
0213 
0214         if (status & ALTERA_UART_STATUS_E_MSK) {
0215             altera_uart_writel(port, status,
0216                        ALTERA_UART_STATUS_REG);
0217 
0218             if (status & ALTERA_UART_STATUS_BRK_MSK) {
0219                 port->icount.brk++;
0220                 if (uart_handle_break(port))
0221                     continue;
0222             } else if (status & ALTERA_UART_STATUS_PE_MSK) {
0223                 port->icount.parity++;
0224             } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
0225                 port->icount.overrun++;
0226             } else if (status & ALTERA_UART_STATUS_FE_MSK) {
0227                 port->icount.frame++;
0228             }
0229 
0230             status &= port->read_status_mask;
0231 
0232             if (status & ALTERA_UART_STATUS_BRK_MSK)
0233                 flag = TTY_BREAK;
0234             else if (status & ALTERA_UART_STATUS_PE_MSK)
0235                 flag = TTY_PARITY;
0236             else if (status & ALTERA_UART_STATUS_FE_MSK)
0237                 flag = TTY_FRAME;
0238         }
0239 
0240         if (uart_handle_sysrq_char(port, ch))
0241             continue;
0242         uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
0243                  flag);
0244     }
0245 
0246     tty_flip_buffer_push(&port->state->port);
0247 }
0248 
0249 static void altera_uart_tx_chars(struct altera_uart *pp)
0250 {
0251     struct uart_port *port = &pp->port;
0252     struct circ_buf *xmit = &port->state->xmit;
0253 
0254     if (port->x_char) {
0255         /* Send special char - probably flow control */
0256         altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
0257         port->x_char = 0;
0258         port->icount.tx++;
0259         return;
0260     }
0261 
0262     while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0263            ALTERA_UART_STATUS_TRDY_MSK) {
0264         if (xmit->head == xmit->tail)
0265             break;
0266         altera_uart_writel(port, xmit->buf[xmit->tail],
0267                ALTERA_UART_TXDATA_REG);
0268         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
0269         port->icount.tx++;
0270     }
0271 
0272     if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
0273         uart_write_wakeup(port);
0274 
0275     if (xmit->head == xmit->tail) {
0276         pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0277         altera_uart_update_ctrl_reg(pp);
0278     }
0279 }
0280 
0281 static irqreturn_t altera_uart_interrupt(int irq, void *data)
0282 {
0283     struct uart_port *port = data;
0284     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0285     unsigned int isr;
0286 
0287     isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
0288 
0289     spin_lock(&port->lock);
0290     if (isr & ALTERA_UART_STATUS_RRDY_MSK)
0291         altera_uart_rx_chars(pp);
0292     if (isr & ALTERA_UART_STATUS_TRDY_MSK)
0293         altera_uart_tx_chars(pp);
0294     spin_unlock(&port->lock);
0295 
0296     return IRQ_RETVAL(isr);
0297 }
0298 
0299 static void altera_uart_timer(struct timer_list *t)
0300 {
0301     struct altera_uart *pp = from_timer(pp, t, tmr);
0302     struct uart_port *port = &pp->port;
0303 
0304     altera_uart_interrupt(0, port);
0305     mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
0306 }
0307 
0308 static void altera_uart_config_port(struct uart_port *port, int flags)
0309 {
0310     port->type = PORT_ALTERA_UART;
0311 
0312     /* Clear mask, so no surprise interrupts. */
0313     altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
0314     /* Clear status register */
0315     altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
0316 }
0317 
0318 static int altera_uart_startup(struct uart_port *port)
0319 {
0320     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0321     unsigned long flags;
0322 
0323     if (!port->irq) {
0324         timer_setup(&pp->tmr, altera_uart_timer, 0);
0325         mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
0326     } else {
0327         int ret;
0328 
0329         ret = request_irq(port->irq, altera_uart_interrupt, 0,
0330                 DRV_NAME, port);
0331         if (ret) {
0332             pr_err(DRV_NAME ": unable to attach Altera UART %d "
0333                    "interrupt vector=%d\n", port->line, port->irq);
0334             return ret;
0335         }
0336     }
0337 
0338     spin_lock_irqsave(&port->lock, flags);
0339 
0340     /* Enable RX interrupts now */
0341     pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
0342     altera_uart_update_ctrl_reg(pp);
0343 
0344     spin_unlock_irqrestore(&port->lock, flags);
0345 
0346     return 0;
0347 }
0348 
0349 static void altera_uart_shutdown(struct uart_port *port)
0350 {
0351     struct altera_uart *pp = container_of(port, struct altera_uart, port);
0352     unsigned long flags;
0353 
0354     spin_lock_irqsave(&port->lock, flags);
0355 
0356     /* Disable all interrupts now */
0357     pp->imr = 0;
0358     altera_uart_update_ctrl_reg(pp);
0359 
0360     spin_unlock_irqrestore(&port->lock, flags);
0361 
0362     if (port->irq)
0363         free_irq(port->irq, port);
0364     else
0365         del_timer_sync(&pp->tmr);
0366 }
0367 
0368 static const char *altera_uart_type(struct uart_port *port)
0369 {
0370     return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
0371 }
0372 
0373 static int altera_uart_request_port(struct uart_port *port)
0374 {
0375     /* UARTs always present */
0376     return 0;
0377 }
0378 
0379 static void altera_uart_release_port(struct uart_port *port)
0380 {
0381     /* Nothing to release... */
0382 }
0383 
0384 static int altera_uart_verify_port(struct uart_port *port,
0385                    struct serial_struct *ser)
0386 {
0387     if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
0388         return -EINVAL;
0389     return 0;
0390 }
0391 
0392 #ifdef CONFIG_CONSOLE_POLL
0393 static int altera_uart_poll_get_char(struct uart_port *port)
0394 {
0395     while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0396          ALTERA_UART_STATUS_RRDY_MSK))
0397         cpu_relax();
0398 
0399     return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
0400 }
0401 
0402 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
0403 {
0404     while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0405          ALTERA_UART_STATUS_TRDY_MSK))
0406         cpu_relax();
0407 
0408     altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
0409 }
0410 #endif
0411 
0412 /*
0413  *  Define the basic serial functions we support.
0414  */
0415 static const struct uart_ops altera_uart_ops = {
0416     .tx_empty   = altera_uart_tx_empty,
0417     .get_mctrl  = altera_uart_get_mctrl,
0418     .set_mctrl  = altera_uart_set_mctrl,
0419     .start_tx   = altera_uart_start_tx,
0420     .stop_tx    = altera_uart_stop_tx,
0421     .stop_rx    = altera_uart_stop_rx,
0422     .break_ctl  = altera_uart_break_ctl,
0423     .startup    = altera_uart_startup,
0424     .shutdown   = altera_uart_shutdown,
0425     .set_termios    = altera_uart_set_termios,
0426     .type       = altera_uart_type,
0427     .request_port   = altera_uart_request_port,
0428     .release_port   = altera_uart_release_port,
0429     .config_port    = altera_uart_config_port,
0430     .verify_port    = altera_uart_verify_port,
0431 #ifdef CONFIG_CONSOLE_POLL
0432     .poll_get_char  = altera_uart_poll_get_char,
0433     .poll_put_char  = altera_uart_poll_put_char,
0434 #endif
0435 };
0436 
0437 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
0438 
0439 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
0440 
0441 static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
0442 {
0443     while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
0444          ALTERA_UART_STATUS_TRDY_MSK))
0445         cpu_relax();
0446 
0447     altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
0448 }
0449 
0450 static void altera_uart_console_write(struct console *co, const char *s,
0451                       unsigned int count)
0452 {
0453     struct uart_port *port = &(altera_uart_ports + co->index)->port;
0454 
0455     uart_console_write(port, s, count, altera_uart_console_putc);
0456 }
0457 
0458 static int __init altera_uart_console_setup(struct console *co, char *options)
0459 {
0460     struct uart_port *port;
0461     int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
0462     int bits = 8;
0463     int parity = 'n';
0464     int flow = 'n';
0465 
0466     if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
0467         return -EINVAL;
0468     port = &altera_uart_ports[co->index].port;
0469     if (!port->membase)
0470         return -ENODEV;
0471 
0472     if (options)
0473         uart_parse_options(options, &baud, &parity, &bits, &flow);
0474 
0475     return uart_set_options(port, co, baud, parity, bits, flow);
0476 }
0477 
0478 static struct uart_driver altera_uart_driver;
0479 
0480 static struct console altera_uart_console = {
0481     .name   = "ttyAL",
0482     .write  = altera_uart_console_write,
0483     .device = uart_console_device,
0484     .setup  = altera_uart_console_setup,
0485     .flags  = CON_PRINTBUFFER,
0486     .index  = -1,
0487     .data   = &altera_uart_driver,
0488 };
0489 
0490 static int __init altera_uart_console_init(void)
0491 {
0492     register_console(&altera_uart_console);
0493     return 0;
0494 }
0495 
0496 console_initcall(altera_uart_console_init);
0497 
0498 #define ALTERA_UART_CONSOLE (&altera_uart_console)
0499 
0500 static void altera_uart_earlycon_write(struct console *co, const char *s,
0501                        unsigned int count)
0502 {
0503     struct earlycon_device *dev = co->data;
0504 
0505     uart_console_write(&dev->port, s, count, altera_uart_console_putc);
0506 }
0507 
0508 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
0509                          const char *options)
0510 {
0511     struct uart_port *port = &dev->port;
0512 
0513     if (!port->membase)
0514         return -ENODEV;
0515 
0516     /* Enable RX interrupts now */
0517     altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
0518                ALTERA_UART_CONTROL_REG);
0519 
0520     if (dev->baud) {
0521         unsigned int baudclk = port->uartclk / dev->baud;
0522 
0523         altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
0524     }
0525 
0526     dev->con->write = altera_uart_earlycon_write;
0527     return 0;
0528 }
0529 
0530 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
0531 
0532 #else
0533 
0534 #define ALTERA_UART_CONSOLE NULL
0535 
0536 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
0537 
0538 /*
0539  *  Define the altera_uart UART driver structure.
0540  */
0541 static struct uart_driver altera_uart_driver = {
0542     .owner      = THIS_MODULE,
0543     .driver_name    = DRV_NAME,
0544     .dev_name   = "ttyAL",
0545     .major      = SERIAL_ALTERA_MAJOR,
0546     .minor      = SERIAL_ALTERA_MINOR,
0547     .nr     = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
0548     .cons       = ALTERA_UART_CONSOLE,
0549 };
0550 
0551 static int altera_uart_probe(struct platform_device *pdev)
0552 {
0553     struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
0554     struct uart_port *port;
0555     struct resource *res_mem;
0556     int i = pdev->id;
0557     int ret;
0558 
0559     /* if id is -1 scan for a free id and use that one */
0560     if (i == -1) {
0561         for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
0562             if (altera_uart_ports[i].port.mapbase == 0)
0563                 break;
0564     }
0565 
0566     if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
0567         return -EINVAL;
0568 
0569     port = &altera_uart_ports[i].port;
0570 
0571     res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0572     if (res_mem)
0573         port->mapbase = res_mem->start;
0574     else if (platp)
0575         port->mapbase = platp->mapbase;
0576     else
0577         return -EINVAL;
0578 
0579     ret = platform_get_irq_optional(pdev, 0);
0580     if (ret < 0 && ret != -ENXIO)
0581         return ret;
0582     if (ret > 0)
0583         port->irq = ret;
0584     else if (platp)
0585         port->irq = platp->irq;
0586 
0587     /* Check platform data first so we can override device node data */
0588     if (platp)
0589         port->uartclk = platp->uartclk;
0590     else {
0591         ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
0592                        &port->uartclk);
0593         if (ret)
0594             return ret;
0595     }
0596 
0597     port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
0598     if (!port->membase)
0599         return -ENOMEM;
0600 
0601     if (platp)
0602         port->regshift = platp->bus_shift;
0603     else
0604         port->regshift = 0;
0605 
0606     port->line = i;
0607     port->type = PORT_ALTERA_UART;
0608     port->iotype = SERIAL_IO_MEM;
0609     port->ops = &altera_uart_ops;
0610     port->flags = UPF_BOOT_AUTOCONF;
0611     port->dev = &pdev->dev;
0612 
0613     platform_set_drvdata(pdev, port);
0614 
0615     uart_add_one_port(&altera_uart_driver, port);
0616 
0617     return 0;
0618 }
0619 
0620 static int altera_uart_remove(struct platform_device *pdev)
0621 {
0622     struct uart_port *port = platform_get_drvdata(pdev);
0623 
0624     if (port) {
0625         uart_remove_one_port(&altera_uart_driver, port);
0626         port->mapbase = 0;
0627         iounmap(port->membase);
0628     }
0629 
0630     return 0;
0631 }
0632 
0633 #ifdef CONFIG_OF
0634 static const struct of_device_id altera_uart_match[] = {
0635     { .compatible = "ALTR,uart-1.0", },
0636     { .compatible = "altr,uart-1.0", },
0637     {},
0638 };
0639 MODULE_DEVICE_TABLE(of, altera_uart_match);
0640 #endif /* CONFIG_OF */
0641 
0642 static struct platform_driver altera_uart_platform_driver = {
0643     .probe  = altera_uart_probe,
0644     .remove = altera_uart_remove,
0645     .driver = {
0646         .name       = DRV_NAME,
0647         .of_match_table = of_match_ptr(altera_uart_match),
0648     },
0649 };
0650 
0651 static int __init altera_uart_init(void)
0652 {
0653     int rc;
0654 
0655     rc = uart_register_driver(&altera_uart_driver);
0656     if (rc)
0657         return rc;
0658     rc = platform_driver_register(&altera_uart_platform_driver);
0659     if (rc)
0660         uart_unregister_driver(&altera_uart_driver);
0661     return rc;
0662 }
0663 
0664 static void __exit altera_uart_exit(void)
0665 {
0666     platform_driver_unregister(&altera_uart_platform_driver);
0667     uart_unregister_driver(&altera_uart_driver);
0668 }
0669 
0670 module_init(altera_uart_init);
0671 module_exit(altera_uart_exit);
0672 
0673 MODULE_DESCRIPTION("Altera UART driver");
0674 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
0675 MODULE_LICENSE("GPL");
0676 MODULE_ALIAS("platform:" DRV_NAME);
0677 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
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