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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Mediatek 8250 driver.
0004  *
0005  * Copyright (c) 2014 MundoReader S.L.
0006  * Author: Matthias Brugger <matthias.bgg@gmail.com>
0007  */
0008 #include <linux/clk.h>
0009 #include <linux/io.h>
0010 #include <linux/module.h>
0011 #include <linux/of_irq.h>
0012 #include <linux/of_platform.h>
0013 #include <linux/pinctrl/consumer.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/pm_runtime.h>
0016 #include <linux/serial_8250.h>
0017 #include <linux/serial_reg.h>
0018 #include <linux/console.h>
0019 #include <linux/dma-mapping.h>
0020 #include <linux/tty.h>
0021 #include <linux/tty_flip.h>
0022 
0023 #include "8250.h"
0024 
0025 #define MTK_UART_HIGHS      0x09    /* Highspeed register */
0026 #define MTK_UART_SAMPLE_COUNT   0x0a    /* Sample count register */
0027 #define MTK_UART_SAMPLE_POINT   0x0b    /* Sample point register */
0028 #define MTK_UART_RATE_FIX   0x0d    /* UART Rate Fix Register */
0029 #define MTK_UART_ESCAPE_DAT 0x10    /* Escape Character register */
0030 #define MTK_UART_ESCAPE_EN  0x11    /* Escape Enable register */
0031 #define MTK_UART_DMA_EN     0x13    /* DMA Enable register */
0032 #define MTK_UART_RXTRI_AD   0x14    /* RX Trigger address */
0033 #define MTK_UART_FRACDIV_L  0x15    /* Fractional divider LSB address */
0034 #define MTK_UART_FRACDIV_M  0x16    /* Fractional divider MSB address */
0035 #define MTK_UART_DEBUG0 0x18
0036 #define MTK_UART_IER_XOFFI  0x20    /* Enable XOFF character interrupt */
0037 #define MTK_UART_IER_RTSI   0x40    /* Enable RTS Modem status interrupt */
0038 #define MTK_UART_IER_CTSI   0x80    /* Enable CTS Modem status interrupt */
0039 
0040 #define MTK_UART_EFR        38  /* I/O: Extended Features Register */
0041 #define MTK_UART_EFR_EN     0x10    /* Enable enhancement feature */
0042 #define MTK_UART_EFR_RTS    0x40    /* Enable hardware rx flow control */
0043 #define MTK_UART_EFR_CTS    0x80    /* Enable hardware tx flow control */
0044 #define MTK_UART_EFR_NO_SW_FC   0x0 /* no sw flow control */
0045 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
0046 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
0047 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
0048 #define MTK_UART_EFR_HW_FC  (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
0049 #define MTK_UART_DMA_EN_TX  0x2
0050 #define MTK_UART_DMA_EN_RX  0x5
0051 
0052 #define MTK_UART_ESCAPE_CHAR    0x77    /* Escape char added under sw fc */
0053 #define MTK_UART_RX_SIZE    0x8000
0054 #define MTK_UART_TX_TRIGGER 1
0055 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
0056 
0057 #define MTK_UART_XON1       40  /* I/O: Xon character 1 */
0058 #define MTK_UART_XOFF1      42  /* I/O: Xoff character 1 */
0059 
0060 #ifdef CONFIG_SERIAL_8250_DMA
0061 enum dma_rx_status {
0062     DMA_RX_START = 0,
0063     DMA_RX_RUNNING = 1,
0064     DMA_RX_SHUTDOWN = 2,
0065 };
0066 #endif
0067 
0068 struct mtk8250_data {
0069     int         line;
0070     unsigned int        rx_pos;
0071     unsigned int        clk_count;
0072     struct clk      *uart_clk;
0073     struct clk      *bus_clk;
0074     struct uart_8250_dma    *dma;
0075 #ifdef CONFIG_SERIAL_8250_DMA
0076     enum dma_rx_status  rx_status;
0077 #endif
0078     int         rx_wakeup_irq;
0079 };
0080 
0081 /* flow control mode */
0082 enum {
0083     MTK_UART_FC_NONE,
0084     MTK_UART_FC_SW,
0085     MTK_UART_FC_HW,
0086 };
0087 
0088 #ifdef CONFIG_SERIAL_8250_DMA
0089 static void mtk8250_rx_dma(struct uart_8250_port *up);
0090 
0091 static void mtk8250_dma_rx_complete(void *param)
0092 {
0093     struct uart_8250_port *up = param;
0094     struct uart_8250_dma *dma = up->dma;
0095     struct mtk8250_data *data = up->port.private_data;
0096     struct tty_port *tty_port = &up->port.state->port;
0097     struct dma_tx_state state;
0098     int copied, total, cnt;
0099     unsigned char *ptr;
0100     unsigned long flags;
0101 
0102     if (data->rx_status == DMA_RX_SHUTDOWN)
0103         return;
0104 
0105     spin_lock_irqsave(&up->port.lock, flags);
0106 
0107     dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
0108     total = dma->rx_size - state.residue;
0109     cnt = total;
0110 
0111     if ((data->rx_pos + cnt) > dma->rx_size)
0112         cnt = dma->rx_size - data->rx_pos;
0113 
0114     ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
0115     copied = tty_insert_flip_string(tty_port, ptr, cnt);
0116     data->rx_pos += cnt;
0117 
0118     if (total > cnt) {
0119         ptr = (unsigned char *)(dma->rx_buf);
0120         cnt = total - cnt;
0121         copied += tty_insert_flip_string(tty_port, ptr, cnt);
0122         data->rx_pos = cnt;
0123     }
0124 
0125     up->port.icount.rx += copied;
0126 
0127     tty_flip_buffer_push(tty_port);
0128 
0129     mtk8250_rx_dma(up);
0130 
0131     spin_unlock_irqrestore(&up->port.lock, flags);
0132 }
0133 
0134 static void mtk8250_rx_dma(struct uart_8250_port *up)
0135 {
0136     struct uart_8250_dma *dma = up->dma;
0137     struct dma_async_tx_descriptor  *desc;
0138 
0139     desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
0140                        dma->rx_size, DMA_DEV_TO_MEM,
0141                        DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
0142     if (!desc) {
0143         pr_err("failed to prepare rx slave single\n");
0144         return;
0145     }
0146 
0147     desc->callback = mtk8250_dma_rx_complete;
0148     desc->callback_param = up;
0149 
0150     dma->rx_cookie = dmaengine_submit(desc);
0151 
0152     dma_async_issue_pending(dma->rxchan);
0153 }
0154 
0155 static void mtk8250_dma_enable(struct uart_8250_port *up)
0156 {
0157     struct uart_8250_dma *dma = up->dma;
0158     struct mtk8250_data *data = up->port.private_data;
0159     int lcr = serial_in(up, UART_LCR);
0160 
0161     if (data->rx_status != DMA_RX_START)
0162         return;
0163 
0164     dma->rxconf.src_port_window_size    = dma->rx_size;
0165     dma->rxconf.src_addr                = dma->rx_addr;
0166 
0167     dma->txconf.dst_port_window_size    = UART_XMIT_SIZE;
0168     dma->txconf.dst_addr                = dma->tx_addr;
0169 
0170     serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
0171         UART_FCR_CLEAR_XMIT);
0172     serial_out(up, MTK_UART_DMA_EN,
0173            MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
0174 
0175     serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
0176     serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
0177     serial_out(up, UART_LCR, lcr);
0178 
0179     if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
0180         pr_err("failed to configure rx dma channel\n");
0181     if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
0182         pr_err("failed to configure tx dma channel\n");
0183 
0184     data->rx_status = DMA_RX_RUNNING;
0185     data->rx_pos = 0;
0186     mtk8250_rx_dma(up);
0187 }
0188 #endif
0189 
0190 static int mtk8250_startup(struct uart_port *port)
0191 {
0192 #ifdef CONFIG_SERIAL_8250_DMA
0193     struct uart_8250_port *up = up_to_u8250p(port);
0194     struct mtk8250_data *data = port->private_data;
0195 
0196     /* disable DMA for console */
0197     if (uart_console(port))
0198         up->dma = NULL;
0199 
0200     if (up->dma) {
0201         data->rx_status = DMA_RX_START;
0202         uart_circ_clear(&port->state->xmit);
0203     }
0204 #endif
0205     memset(&port->icount, 0, sizeof(port->icount));
0206 
0207     return serial8250_do_startup(port);
0208 }
0209 
0210 static void mtk8250_shutdown(struct uart_port *port)
0211 {
0212 #ifdef CONFIG_SERIAL_8250_DMA
0213     struct uart_8250_port *up = up_to_u8250p(port);
0214     struct mtk8250_data *data = port->private_data;
0215 
0216     if (up->dma)
0217         data->rx_status = DMA_RX_SHUTDOWN;
0218 #endif
0219 
0220     return serial8250_do_shutdown(port);
0221 }
0222 
0223 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
0224 {
0225     serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
0226 }
0227 
0228 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
0229 {
0230     serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
0231 }
0232 
0233 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
0234 {
0235     struct uart_port *port = &up->port;
0236     int lcr = serial_in(up, UART_LCR);
0237 
0238     serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
0239     serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
0240     serial_out(up, UART_LCR, lcr);
0241     lcr = serial_in(up, UART_LCR);
0242 
0243     switch (mode) {
0244     case MTK_UART_FC_NONE:
0245         serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
0246         serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
0247         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
0248         serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &
0249             (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
0250         serial_out(up, UART_LCR, lcr);
0251         mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
0252             MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
0253         break;
0254 
0255     case MTK_UART_FC_HW:
0256         serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
0257         serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
0258         serial_out(up, UART_MCR, UART_MCR_RTS);
0259         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
0260 
0261         /*enable hw flow control*/
0262         serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |
0263             (serial_in(up, MTK_UART_EFR) &
0264             (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
0265 
0266         serial_out(up, UART_LCR, lcr);
0267         mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
0268         mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
0269         break;
0270 
0271     case MTK_UART_FC_SW:    /*MTK software flow control */
0272         serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
0273         serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
0274         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
0275 
0276         /*enable sw flow control */
0277         serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
0278             (serial_in(up, MTK_UART_EFR) &
0279             (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
0280 
0281         serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));
0282         serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));
0283         serial_out(up, UART_LCR, lcr);
0284         mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
0285         mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
0286         break;
0287     default:
0288         break;
0289     }
0290 }
0291 
0292 static void
0293 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
0294             struct ktermios *old)
0295 {
0296     static const unsigned short fraction_L_mapping[] = {
0297         0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
0298     };
0299     static const unsigned short fraction_M_mapping[] = {
0300         0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
0301     };
0302     struct uart_8250_port *up = up_to_u8250p(port);
0303     unsigned int baud, quot, fraction;
0304     unsigned long flags;
0305     int mode;
0306 
0307 #ifdef CONFIG_SERIAL_8250_DMA
0308     if (up->dma) {
0309         if (uart_console(port)) {
0310             devm_kfree(up->port.dev, up->dma);
0311             up->dma = NULL;
0312         } else {
0313             mtk8250_dma_enable(up);
0314         }
0315     }
0316 #endif
0317 
0318     /*
0319      * Store the requested baud rate before calling the generic 8250
0320      * set_termios method. Standard 8250 port expects bauds to be
0321      * no higher than (uartclk / 16) so the baud will be clamped if it
0322      * gets out of that bound. Mediatek 8250 port supports speed
0323      * higher than that, therefore we'll get original baud rate back
0324      * after calling the generic set_termios method and recalculate
0325      * the speed later in this method.
0326      */
0327     baud = tty_termios_baud_rate(termios);
0328 
0329     serial8250_do_set_termios(port, termios, NULL);
0330 
0331     tty_termios_encode_baud_rate(termios, baud, baud);
0332 
0333     /*
0334      * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
0335      *
0336      * We need to recalcualte the quot register, as the claculation depends
0337      * on the vaule in the highspeed register.
0338      *
0339      * Some baudrates are not supported by the chip, so we use the next
0340      * lower rate supported and update termios c_flag.
0341      *
0342      * If highspeed register is set to 3, we need to specify sample count
0343      * and sample point to increase accuracy. If not, we reset the
0344      * registers to their default values.
0345      */
0346     baud = uart_get_baud_rate(port, termios, old,
0347                   port->uartclk / 16 / UART_DIV_MAX,
0348                   port->uartclk);
0349 
0350     if (baud < 115200) {
0351         serial_port_out(port, MTK_UART_HIGHS, 0x0);
0352         quot = uart_get_divisor(port, baud);
0353     } else {
0354         serial_port_out(port, MTK_UART_HIGHS, 0x3);
0355         quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
0356     }
0357 
0358     /*
0359      * Ok, we're now changing the port state.  Do it with
0360      * interrupts disabled.
0361      */
0362     spin_lock_irqsave(&port->lock, flags);
0363 
0364     /*
0365      * Update the per-port timeout.
0366      */
0367     uart_update_timeout(port, termios->c_cflag, baud);
0368 
0369     /* set DLAB we have cval saved in up->lcr from the call to the core */
0370     serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
0371     serial_dl_write(up, quot);
0372 
0373     /* reset DLAB */
0374     serial_port_out(port, UART_LCR, up->lcr);
0375 
0376     if (baud >= 115200) {
0377         unsigned int tmp;
0378 
0379         tmp = (port->uartclk / (baud *  quot)) - 1;
0380         serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
0381         serial_port_out(port, MTK_UART_SAMPLE_POINT,
0382                     (tmp >> 1) - 1);
0383 
0384         /*count fraction to set fractoin register */
0385         fraction = ((port->uartclk  * 100) / baud / quot) % 100;
0386         fraction = DIV_ROUND_CLOSEST(fraction, 10);
0387         serial_port_out(port, MTK_UART_FRACDIV_L,
0388                         fraction_L_mapping[fraction]);
0389         serial_port_out(port, MTK_UART_FRACDIV_M,
0390                         fraction_M_mapping[fraction]);
0391     } else {
0392         serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
0393         serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
0394         serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
0395         serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
0396     }
0397 
0398     if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
0399         mode = MTK_UART_FC_HW;
0400     else if (termios->c_iflag & CRTSCTS)
0401         mode = MTK_UART_FC_SW;
0402     else
0403         mode = MTK_UART_FC_NONE;
0404 
0405     mtk8250_set_flow_ctrl(up, mode);
0406 
0407     if (uart_console(port))
0408         up->port.cons->cflag = termios->c_cflag;
0409 
0410     spin_unlock_irqrestore(&port->lock, flags);
0411     /* Don't rewrite B0 */
0412     if (tty_termios_baud_rate(termios))
0413         tty_termios_encode_baud_rate(termios, baud, baud);
0414 }
0415 
0416 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
0417 {
0418     struct mtk8250_data *data = dev_get_drvdata(dev);
0419     struct uart_8250_port *up = serial8250_get_port(data->line);
0420 
0421     /* wait until UART in idle status */
0422     while
0423         (serial_in(up, MTK_UART_DEBUG0));
0424 
0425     if (data->clk_count == 0U) {
0426         dev_dbg(dev, "%s clock count is 0\n", __func__);
0427     } else {
0428         clk_disable_unprepare(data->bus_clk);
0429         data->clk_count--;
0430     }
0431 
0432     return 0;
0433 }
0434 
0435 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
0436 {
0437     struct mtk8250_data *data = dev_get_drvdata(dev);
0438     int err;
0439 
0440     if (data->clk_count > 0U) {
0441         dev_dbg(dev, "%s clock count is %d\n", __func__,
0442             data->clk_count);
0443     } else {
0444         err = clk_prepare_enable(data->bus_clk);
0445         if (err) {
0446             dev_warn(dev, "Can't enable bus clock\n");
0447             return err;
0448         }
0449         data->clk_count++;
0450     }
0451 
0452     return 0;
0453 }
0454 
0455 static void
0456 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
0457 {
0458     if (!state)
0459         if (!mtk8250_runtime_resume(port->dev))
0460             pm_runtime_get_sync(port->dev);
0461 
0462     serial8250_do_pm(port, state, old);
0463 
0464     if (state)
0465         if (!pm_runtime_put_sync_suspend(port->dev))
0466             mtk8250_runtime_suspend(port->dev);
0467 }
0468 
0469 #ifdef CONFIG_SERIAL_8250_DMA
0470 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
0471 {
0472     return false;
0473 }
0474 #endif
0475 
0476 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
0477                struct mtk8250_data *data)
0478 {
0479 #ifdef CONFIG_SERIAL_8250_DMA
0480     int dmacnt;
0481 #endif
0482 
0483     data->uart_clk = devm_clk_get(&pdev->dev, "baud");
0484     if (IS_ERR(data->uart_clk)) {
0485         /*
0486          * For compatibility with older device trees try unnamed
0487          * clk when no baud clk can be found.
0488          */
0489         data->uart_clk = devm_clk_get(&pdev->dev, NULL);
0490         if (IS_ERR(data->uart_clk)) {
0491             dev_warn(&pdev->dev, "Can't get uart clock\n");
0492             return PTR_ERR(data->uart_clk);
0493         }
0494 
0495         return 0;
0496     }
0497 
0498     data->bus_clk = devm_clk_get(&pdev->dev, "bus");
0499     if (IS_ERR(data->bus_clk))
0500         return PTR_ERR(data->bus_clk);
0501 
0502     data->dma = NULL;
0503 #ifdef CONFIG_SERIAL_8250_DMA
0504     dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
0505     if (dmacnt == 2) {
0506         data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
0507                      GFP_KERNEL);
0508         if (!data->dma)
0509             return -ENOMEM;
0510 
0511         data->dma->fn = mtk8250_dma_filter;
0512         data->dma->rx_size = MTK_UART_RX_SIZE;
0513         data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
0514         data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
0515     }
0516 #endif
0517 
0518     return 0;
0519 }
0520 
0521 static int mtk8250_probe(struct platform_device *pdev)
0522 {
0523     struct uart_8250_port uart = {};
0524     struct mtk8250_data *data;
0525     struct resource *regs;
0526     int irq, err;
0527 
0528     irq = platform_get_irq(pdev, 0);
0529     if (irq < 0)
0530         return irq;
0531 
0532     regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0533     if (!regs) {
0534         dev_err(&pdev->dev, "no registers defined\n");
0535         return -EINVAL;
0536     }
0537 
0538     uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
0539                      resource_size(regs));
0540     if (!uart.port.membase)
0541         return -ENOMEM;
0542 
0543     data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
0544     if (!data)
0545         return -ENOMEM;
0546 
0547     data->clk_count = 0;
0548 
0549     if (pdev->dev.of_node) {
0550         err = mtk8250_probe_of(pdev, &uart.port, data);
0551         if (err)
0552             return err;
0553     } else
0554         return -ENODEV;
0555 
0556     spin_lock_init(&uart.port.lock);
0557     uart.port.mapbase = regs->start;
0558     uart.port.irq = irq;
0559     uart.port.pm = mtk8250_do_pm;
0560     uart.port.type = PORT_16550;
0561     uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
0562     uart.port.dev = &pdev->dev;
0563     uart.port.iotype = UPIO_MEM32;
0564     uart.port.regshift = 2;
0565     uart.port.private_data = data;
0566     uart.port.shutdown = mtk8250_shutdown;
0567     uart.port.startup = mtk8250_startup;
0568     uart.port.set_termios = mtk8250_set_termios;
0569     uart.port.uartclk = clk_get_rate(data->uart_clk);
0570 #ifdef CONFIG_SERIAL_8250_DMA
0571     if (data->dma)
0572         uart.dma = data->dma;
0573 #endif
0574 
0575     /* Disable Rate Fix function */
0576     writel(0x0, uart.port.membase +
0577             (MTK_UART_RATE_FIX << uart.port.regshift));
0578 
0579     platform_set_drvdata(pdev, data);
0580 
0581     pm_runtime_enable(&pdev->dev);
0582     err = mtk8250_runtime_resume(&pdev->dev);
0583     if (err)
0584         goto err_pm_disable;
0585 
0586     data->line = serial8250_register_8250_port(&uart);
0587     if (data->line < 0) {
0588         err = data->line;
0589         goto err_pm_disable;
0590     }
0591 
0592     data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
0593 
0594     return 0;
0595 
0596 err_pm_disable:
0597     pm_runtime_disable(&pdev->dev);
0598 
0599     return err;
0600 }
0601 
0602 static int mtk8250_remove(struct platform_device *pdev)
0603 {
0604     struct mtk8250_data *data = platform_get_drvdata(pdev);
0605 
0606     pm_runtime_get_sync(&pdev->dev);
0607 
0608     serial8250_unregister_port(data->line);
0609 
0610     pm_runtime_disable(&pdev->dev);
0611     pm_runtime_put_noidle(&pdev->dev);
0612 
0613     if (!pm_runtime_status_suspended(&pdev->dev))
0614         mtk8250_runtime_suspend(&pdev->dev);
0615 
0616     return 0;
0617 }
0618 
0619 static int __maybe_unused mtk8250_suspend(struct device *dev)
0620 {
0621     struct mtk8250_data *data = dev_get_drvdata(dev);
0622     int irq = data->rx_wakeup_irq;
0623     int err;
0624 
0625     serial8250_suspend_port(data->line);
0626 
0627     pinctrl_pm_select_sleep_state(dev);
0628     if (irq >= 0) {
0629         err = enable_irq_wake(irq);
0630         if (err) {
0631             dev_err(dev,
0632                 "failed to enable irq wake on IRQ %d: %d\n",
0633                 irq, err);
0634             pinctrl_pm_select_default_state(dev);
0635             serial8250_resume_port(data->line);
0636             return err;
0637         }
0638     }
0639 
0640     return 0;
0641 }
0642 
0643 static int __maybe_unused mtk8250_resume(struct device *dev)
0644 {
0645     struct mtk8250_data *data = dev_get_drvdata(dev);
0646     int irq = data->rx_wakeup_irq;
0647 
0648     if (irq >= 0)
0649         disable_irq_wake(irq);
0650     pinctrl_pm_select_default_state(dev);
0651 
0652     serial8250_resume_port(data->line);
0653 
0654     return 0;
0655 }
0656 
0657 static const struct dev_pm_ops mtk8250_pm_ops = {
0658     SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
0659     SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
0660                 NULL)
0661 };
0662 
0663 static const struct of_device_id mtk8250_of_match[] = {
0664     { .compatible = "mediatek,mt6577-uart" },
0665     { /* Sentinel */ }
0666 };
0667 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
0668 
0669 static struct platform_driver mtk8250_platform_driver = {
0670     .driver = {
0671         .name       = "mt6577-uart",
0672         .pm     = &mtk8250_pm_ops,
0673         .of_match_table = mtk8250_of_match,
0674     },
0675     .probe          = mtk8250_probe,
0676     .remove         = mtk8250_remove,
0677 };
0678 module_platform_driver(mtk8250_platform_driver);
0679 
0680 #ifdef CONFIG_SERIAL_8250_CONSOLE
0681 static int __init early_mtk8250_setup(struct earlycon_device *device,
0682                     const char *options)
0683 {
0684     if (!device->port.membase)
0685         return -ENODEV;
0686 
0687     device->port.iotype = UPIO_MEM32;
0688     device->port.regshift = 2;
0689 
0690     return early_serial8250_setup(device, NULL);
0691 }
0692 
0693 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
0694 #endif
0695 
0696 MODULE_AUTHOR("Matthias Brugger");
0697 MODULE_LICENSE("GPL");
0698 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
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