serial/8250/8250_mid.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
0004  *
0005  * Copyright (C) 2015 Intel Corporation
0006  * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
0007  */
0008
0009 #include <linux/bitops.h>
0010 #include <linux/module.h>
0011 #include <linux/pci.h>
0012 #include <linux/rational.h>
0013
0014 #include <linux/dma/hsu.h>
0015 #include <linux/8250_pci.h>
0016
0017 #include "8250.h"
0018
0019 #define PCI_DEVICE_ID_INTEL_PNW_UART1   0x081b
0020 #define PCI_DEVICE_ID_INTEL_PNW_UART2   0x081c
0021 #define PCI_DEVICE_ID_INTEL_PNW_UART3   0x081d
0022 #define PCI_DEVICE_ID_INTEL_TNG_UART    0x1191
0023 #define PCI_DEVICE_ID_INTEL_CDF_UART    0x18d8
0024 #define PCI_DEVICE_ID_INTEL_DNV_UART    0x19d8
0025
0026 /* Intel MID Specific registers */
0027 #define INTEL_MID_UART_FISR     0x08
0028 #define INTEL_MID_UART_PS       0x30
0029 #define INTEL_MID_UART_MUL      0x34
0030 #define INTEL_MID_UART_DIV      0x38
0031
0032 struct mid8250;
0033
0034 struct mid8250_board {
0035     unsigned int flags;
0036     unsigned long freq;
0037     unsigned int base_baud;
0038     int (*setup)(struct mid8250 *, struct uart_port *p);
0039     void (*exit)(struct mid8250 *);
0040 };
0041
0042 struct mid8250 {
0043     int line;
0044     int dma_index;
0045     struct pci_dev *dma_dev;
0046     struct uart_8250_dma dma;
0047     struct mid8250_board *board;
0048     struct hsu_dma_chip dma_chip;
0049 };
0050
0051 /*****************************************************************************/
0052
0053 static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
0054 {
0055     struct pci_dev *pdev = to_pci_dev(p->dev);
0056
0057     switch (pdev->device) {
0058     case PCI_DEVICE_ID_INTEL_PNW_UART1:
0059         mid->dma_index = 0;
0060         break;
0061     case PCI_DEVICE_ID_INTEL_PNW_UART2:
0062         mid->dma_index = 1;
0063         break;
0064     case PCI_DEVICE_ID_INTEL_PNW_UART3:
0065         mid->dma_index = 2;
0066         break;
0067     default:
0068         return -EINVAL;
0069     }
0070
0071     mid->dma_dev = pci_get_slot(pdev->bus,
0072                     PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
0073     return 0;
0074 }
0075
0076 static void pnw_exit(struct mid8250 *mid)
0077 {
0078     pci_dev_put(mid->dma_dev);
0079 }
0080
0081 static int tng_handle_irq(struct uart_port *p)
0082 {
0083     struct mid8250 *mid = p->private_data;
0084     struct uart_8250_port *up = up_to_u8250p(p);
0085     struct hsu_dma_chip *chip;
0086     u32 status;
0087     int ret = 0;
0088     int err;
0089
0090     chip = pci_get_drvdata(mid->dma_dev);
0091
0092     /* Rx DMA */
0093     err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
0094     if (err > 0) {
0095         serial8250_rx_dma_flush(up);
0096         ret |= 1;
0097     } else if (err == 0)
0098         ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
0099
0100     /* Tx DMA */
0101     err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
0102     if (err > 0)
0103         ret |= 1;
0104     else if (err == 0)
0105         ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
0106
0107     /* UART */
0108     ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
0109     return IRQ_RETVAL(ret);
0110 }
0111
0112 static int tng_setup(struct mid8250 *mid, struct uart_port *p)
0113 {
0114     struct pci_dev *pdev = to_pci_dev(p->dev);
0115     int index = PCI_FUNC(pdev->devfn);
0116
0117     /*
0118      * Device 0000:00:04.0 is not a real HSU port. It provides a global
0119      * register set for all HSU ports, although it has the same PCI ID.
0120      * Skip it here.
0121      */
0122     if (index-- == 0)
0123         return -ENODEV;
0124
0125     mid->dma_index = index;
0126     mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
0127
0128     p->handle_irq = tng_handle_irq;
0129     return 0;
0130 }
0131
0132 static void tng_exit(struct mid8250 *mid)
0133 {
0134     pci_dev_put(mid->dma_dev);
0135 }
0136
0137 static int dnv_handle_irq(struct uart_port *p)
0138 {
0139     struct mid8250 *mid = p->private_data;
0140     struct uart_8250_port *up = up_to_u8250p(p);
0141     unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
0142     u32 status;
0143     int ret = 0;
0144     int err;
0145
0146     if (fisr & BIT(2)) {
0147         err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
0148         if (err > 0) {
0149             serial8250_rx_dma_flush(up);
0150             ret |= 1;
0151         } else if (err == 0)
0152             ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
0153     }
0154     if (fisr & BIT(1)) {
0155         err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
0156         if (err > 0)
0157             ret |= 1;
0158         else if (err == 0)
0159             ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
0160     }
0161     if (fisr & BIT(0))
0162         ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
0163     return IRQ_RETVAL(ret);
0164 }
0165
0166 #define DNV_DMA_CHAN_OFFSET 0x80
0167
0168 static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
0169 {
0170     struct hsu_dma_chip *chip = &mid->dma_chip;
0171     struct pci_dev *pdev = to_pci_dev(p->dev);
0172     unsigned int bar = FL_GET_BASE(mid->board->flags);
0173     int ret;
0174
0175     pci_set_master(pdev);
0176
0177     ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
0178     if (ret < 0)
0179         return ret;
0180
0181     p->irq = pci_irq_vector(pdev, 0);
0182
0183     chip->dev = &pdev->dev;
0184     chip->irq = pci_irq_vector(pdev, 0);
0185     chip->regs = p->membase;
0186     chip->length = pci_resource_len(pdev, bar);
0187     chip->offset = DNV_DMA_CHAN_OFFSET;
0188
0189     /* Falling back to PIO mode if DMA probing fails */
0190     ret = hsu_dma_probe(chip);
0191     if (ret)
0192         return 0;
0193
0194     mid->dma_dev = pdev;
0195
0196     p->handle_irq = dnv_handle_irq;
0197     return 0;
0198 }
0199
0200 static void dnv_exit(struct mid8250 *mid)
0201 {
0202     if (!mid->dma_dev)
0203         return;
0204     hsu_dma_remove(&mid->dma_chip);
0205 }
0206
0207 /*****************************************************************************/
0208
0209 static void mid8250_set_termios(struct uart_port *p,
0210                 struct ktermios *termios,
0211                 struct ktermios *old)
0212 {
0213     unsigned int baud = tty_termios_baud_rate(termios);
0214     struct mid8250 *mid = p->private_data;
0215     unsigned short ps = 16;
0216     unsigned long fuart = baud * ps;
0217     unsigned long w = BIT(24) - 1;
0218     unsigned long mul, div;
0219
0220     /* Gracefully handle the B0 case: fall back to B9600 */
0221     fuart = fuart ? fuart : 9600 * 16;
0222
0223     if (mid->board->freq < fuart) {
0224         /* Find prescaler value that satisfies Fuart < Fref */
0225         if (mid->board->freq > baud)
0226             ps = mid->board->freq / baud;   /* baud rate too high */
0227         else
0228             ps = 1;             /* PLL case */
0229         fuart = baud * ps;
0230     } else {
0231         /* Get Fuart closer to Fref */
0232         fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
0233     }
0234
0235     rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
0236     p->uartclk = fuart * 16 / ps;       /* core uses ps = 16 always */
0237
0238     writel(ps, p->membase + INTEL_MID_UART_PS);     /* set PS */
0239     writel(mul, p->membase + INTEL_MID_UART_MUL);       /* set MUL */
0240     writel(div, p->membase + INTEL_MID_UART_DIV);
0241
0242     serial8250_do_set_termios(p, termios, old);
0243 }
0244
0245 static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
0246 {
0247     struct hsu_dma_slave *s = param;
0248
0249     if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
0250         return false;
0251
0252     chan->private = s;
0253     return true;
0254 }
0255
0256 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
0257 {
0258     struct uart_8250_dma *dma = &mid->dma;
0259     struct device *dev = port->port.dev;
0260     struct hsu_dma_slave *rx_param;
0261     struct hsu_dma_slave *tx_param;
0262
0263     if (!mid->dma_dev)
0264         return 0;
0265
0266     rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
0267     if (!rx_param)
0268         return -ENOMEM;
0269
0270     tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
0271     if (!tx_param)
0272         return -ENOMEM;
0273
0274     rx_param->chan_id = mid->dma_index * 2 + 1;
0275     tx_param->chan_id = mid->dma_index * 2;
0276
0277     dma->rxconf.src_maxburst = 64;
0278     dma->txconf.dst_maxburst = 64;
0279
0280     rx_param->dma_dev = &mid->dma_dev->dev;
0281     tx_param->dma_dev = &mid->dma_dev->dev;
0282
0283     dma->fn = mid8250_dma_filter;
0284     dma->rx_param = rx_param;
0285     dma->tx_param = tx_param;
0286
0287     port->dma = dma;
0288     return 0;
0289 }
0290
0291 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0292 {
0293     struct uart_8250_port uart;
0294     struct mid8250 *mid;
0295     unsigned int bar;
0296     int ret;
0297
0298     ret = pcim_enable_device(pdev);
0299     if (ret)
0300         return ret;
0301
0302     mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
0303     if (!mid)
0304         return -ENOMEM;
0305
0306     mid->board = (struct mid8250_board *)id->driver_data;
0307     bar = FL_GET_BASE(mid->board->flags);
0308
0309     memset(&uart, 0, sizeof(struct uart_8250_port));
0310
0311     uart.port.dev = &pdev->dev;
0312     uart.port.irq = pdev->irq;
0313     uart.port.private_data = mid;
0314     uart.port.type = PORT_16750;
0315     uart.port.iotype = UPIO_MEM;
0316     uart.port.uartclk = mid->board->base_baud * 16;
0317     uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
0318     uart.port.set_termios = mid8250_set_termios;
0319
0320     uart.port.mapbase = pci_resource_start(pdev, bar);
0321     uart.port.membase = pcim_iomap(pdev, bar, 0);
0322     if (!uart.port.membase)
0323         return -ENOMEM;
0324
0325     ret = mid->board->setup(mid, &uart.port);
0326     if (ret)
0327         return ret;
0328
0329     ret = mid8250_dma_setup(mid, &uart);
0330     if (ret)
0331         goto err;
0332
0333     ret = serial8250_register_8250_port(&uart);
0334     if (ret < 0)
0335         goto err;
0336
0337     mid->line = ret;
0338
0339     pci_set_drvdata(pdev, mid);
0340     return 0;
0341
0342 err:
0343     mid->board->exit(mid);
0344     return ret;
0345 }
0346
0347 static void mid8250_remove(struct pci_dev *pdev)
0348 {
0349     struct mid8250 *mid = pci_get_drvdata(pdev);
0350
0351     serial8250_unregister_port(mid->line);
0352
0353     mid->board->exit(mid);
0354 }
0355
0356 static const struct mid8250_board pnw_board = {
0357     .flags = FL_BASE0,
0358     .freq = 50000000,
0359     .base_baud = 115200,
0360     .setup = pnw_setup,
0361     .exit = pnw_exit,
0362 };
0363
0364 static const struct mid8250_board tng_board = {
0365     .flags = FL_BASE0,
0366     .freq = 38400000,
0367     .base_baud = 1843200,
0368     .setup = tng_setup,
0369     .exit = tng_exit,
0370 };
0371
0372 static const struct mid8250_board dnv_board = {
0373     .flags = FL_BASE1,
0374     .freq = 133333333,
0375     .base_baud = 115200,
0376     .setup = dnv_setup,
0377     .exit = dnv_exit,
0378 };
0379
0380 static const struct pci_device_id pci_ids[] = {
0381     { PCI_DEVICE_DATA(INTEL, PNW_UART1, &pnw_board) },
0382     { PCI_DEVICE_DATA(INTEL, PNW_UART2, &pnw_board) },
0383     { PCI_DEVICE_DATA(INTEL, PNW_UART3, &pnw_board) },
0384     { PCI_DEVICE_DATA(INTEL, TNG_UART, &tng_board) },
0385     { PCI_DEVICE_DATA(INTEL, CDF_UART, &dnv_board) },
0386     { PCI_DEVICE_DATA(INTEL, DNV_UART, &dnv_board) },
0387     { }
0388 };
0389 MODULE_DEVICE_TABLE(pci, pci_ids);
0390
0391 static struct pci_driver mid8250_pci_driver = {
0392     .name           = "8250_mid",
0393     .id_table       = pci_ids,
0394     .probe          = mid8250_probe,
0395     .remove         = mid8250_remove,
0396 };
0397
0398 module_pci_driver(mid8250_pci_driver);
0399
0400 MODULE_AUTHOR("Intel Corporation");
0401 MODULE_LICENSE("GPL v2");
0402 MODULE_DESCRIPTION("Intel MID UART driver");