serial/8250/8250_lpss.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
0004  *
0005  * Copyright (C) 2016 Intel Corporation
0006  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
0007  */
0008
0009 #include <linux/bitops.h>
0010 #include <linux/module.h>
0011 #include <linux/pci.h>
0012 #include <linux/rational.h>
0013
0014 #include <linux/dmaengine.h>
0015 #include <linux/dma/dw.h>
0016
0017 #include "8250_dwlib.h"
0018
0019 #define PCI_DEVICE_ID_INTEL_QRK_UARTx   0x0936
0020
0021 #define PCI_DEVICE_ID_INTEL_BYT_UART1   0x0f0a
0022 #define PCI_DEVICE_ID_INTEL_BYT_UART2   0x0f0c
0023
0024 #define PCI_DEVICE_ID_INTEL_BSW_UART1   0x228a
0025 #define PCI_DEVICE_ID_INTEL_BSW_UART2   0x228c
0026
0027 #define PCI_DEVICE_ID_INTEL_EHL_UART0   0x4b96
0028 #define PCI_DEVICE_ID_INTEL_EHL_UART1   0x4b97
0029 #define PCI_DEVICE_ID_INTEL_EHL_UART2   0x4b98
0030 #define PCI_DEVICE_ID_INTEL_EHL_UART3   0x4b99
0031 #define PCI_DEVICE_ID_INTEL_EHL_UART4   0x4b9a
0032 #define PCI_DEVICE_ID_INTEL_EHL_UART5   0x4b9b
0033
0034 #define PCI_DEVICE_ID_INTEL_BDW_UART1   0x9ce3
0035 #define PCI_DEVICE_ID_INTEL_BDW_UART2   0x9ce4
0036
0037 /* Intel LPSS specific registers */
0038
0039 #define BYT_PRV_CLK         0x800
0040 #define BYT_PRV_CLK_EN          BIT(0)
0041 #define BYT_PRV_CLK_M_VAL_SHIFT     1
0042 #define BYT_PRV_CLK_N_VAL_SHIFT     16
0043 #define BYT_PRV_CLK_UPDATE      BIT(31)
0044
0045 #define BYT_TX_OVF_INT          0x820
0046 #define BYT_TX_OVF_INT_MASK     BIT(1)
0047
0048 struct lpss8250;
0049
0050 struct lpss8250_board {
0051     unsigned long freq;
0052     unsigned int base_baud;
0053     int (*setup)(struct lpss8250 *, struct uart_port *p);
0054     void (*exit)(struct lpss8250 *);
0055 };
0056
0057 struct lpss8250 {
0058     struct dw8250_port_data data;
0059     struct lpss8250_board *board;
0060
0061     /* DMA parameters */
0062     struct dw_dma_chip dma_chip;
0063     struct dw_dma_slave dma_param;
0064     u8 dma_maxburst;
0065 };
0066
0067 static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data)
0068 {
0069     return container_of(data, struct lpss8250, data);
0070 }
0071
0072 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
0073                 struct ktermios *old)
0074 {
0075     unsigned int baud = tty_termios_baud_rate(termios);
0076     struct lpss8250 *lpss = to_lpss8250(p->private_data);
0077     unsigned long fref = lpss->board->freq, fuart = baud * 16;
0078     unsigned long w = BIT(15) - 1;
0079     unsigned long m, n;
0080     u32 reg;
0081
0082     /* Gracefully handle the B0 case: fall back to B9600 */
0083     fuart = fuart ? fuart : 9600 * 16;
0084
0085     /* Get Fuart closer to Fref */
0086     fuart *= rounddown_pow_of_two(fref / fuart);
0087
0088     /*
0089      * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
0090      * dividers must be adjusted.
0091      *
0092      * uartclk = (m / n) * 100 MHz, where m <= n
0093      */
0094     rational_best_approximation(fuart, fref, w, w, &m, &n);
0095     p->uartclk = fuart;
0096
0097     /* Reset the clock */
0098     reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
0099     writel(reg, p->membase + BYT_PRV_CLK);
0100     reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
0101     writel(reg, p->membase + BYT_PRV_CLK);
0102
0103     dw8250_do_set_termios(p, termios, old);
0104 }
0105
0106 static unsigned int byt_get_mctrl(struct uart_port *port)
0107 {
0108     unsigned int ret = serial8250_do_get_mctrl(port);
0109
0110     /* Force DCD and DSR signals to permanently be reported as active */
0111     ret |= TIOCM_CAR | TIOCM_DSR;
0112
0113     return ret;
0114 }
0115
0116 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
0117 {
0118     struct dw_dma_slave *param = &lpss->dma_param;
0119     struct pci_dev *pdev = to_pci_dev(port->dev);
0120     struct pci_dev *dma_dev;
0121
0122     switch (pdev->device) {
0123     case PCI_DEVICE_ID_INTEL_BYT_UART1:
0124     case PCI_DEVICE_ID_INTEL_BSW_UART1:
0125     case PCI_DEVICE_ID_INTEL_BDW_UART1:
0126         param->src_id = 3;
0127         param->dst_id = 2;
0128         break;
0129     case PCI_DEVICE_ID_INTEL_BYT_UART2:
0130     case PCI_DEVICE_ID_INTEL_BSW_UART2:
0131     case PCI_DEVICE_ID_INTEL_BDW_UART2:
0132         param->src_id = 5;
0133         param->dst_id = 4;
0134         break;
0135     default:
0136         return -EINVAL;
0137     }
0138
0139     dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
0140
0141     param->dma_dev = &dma_dev->dev;
0142     param->m_master = 0;
0143     param->p_master = 1;
0144
0145     lpss->dma_maxburst = 16;
0146
0147     port->set_termios = byt_set_termios;
0148     port->get_mctrl = byt_get_mctrl;
0149
0150     /* Disable TX counter interrupts */
0151     writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
0152
0153     return 0;
0154 }
0155
0156 static void byt_serial_exit(struct lpss8250 *lpss)
0157 {
0158     struct dw_dma_slave *param = &lpss->dma_param;
0159
0160     /* Paired with pci_get_slot() in the byt_serial_setup() above */
0161     put_device(param->dma_dev);
0162 }
0163
0164 static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
0165 {
0166     struct uart_8250_dma *dma = &lpss->data.dma;
0167     struct uart_8250_port *up = up_to_u8250p(port);
0168
0169     /*
0170      * This simply makes the checks in the 8250_port to try the DMA
0171      * channel request which in turn uses the magic of ACPI tables
0172      * parsing (see drivers/dma/acpi-dma.c for the details) and
0173      * matching with the registered General Purpose DMA controllers.
0174      */
0175     up->dma = dma;
0176
0177     port->set_termios = dw8250_do_set_termios;
0178
0179     return 0;
0180 }
0181
0182 static void ehl_serial_exit(struct lpss8250 *lpss)
0183 {
0184     struct uart_8250_port *up = serial8250_get_port(lpss->data.line);
0185
0186     up->dma = NULL;
0187 }
0188
0189 #ifdef CONFIG_SERIAL_8250_DMA
0190 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
0191     .nr_channels = 2,
0192     .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
0193     .chan_priority = CHAN_PRIORITY_ASCENDING,
0194     .block_size = 4095,
0195     .nr_masters = 1,
0196     .data_width = {4},
0197     .multi_block = {0},
0198 };
0199
0200 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
0201 {
0202     struct uart_8250_dma *dma = &lpss->data.dma;
0203     struct dw_dma_chip *chip = &lpss->dma_chip;
0204     struct dw_dma_slave *param = &lpss->dma_param;
0205     struct pci_dev *pdev = to_pci_dev(port->dev);
0206     int ret;
0207
0208     chip->pdata = &qrk_serial_dma_pdata;
0209     chip->dev = &pdev->dev;
0210     chip->id = pdev->devfn;
0211     chip->irq = pci_irq_vector(pdev, 0);
0212     chip->regs = pci_ioremap_bar(pdev, 1);
0213     if (!chip->regs)
0214         return;
0215
0216     /* Falling back to PIO mode if DMA probing fails */
0217     ret = dw_dma_probe(chip);
0218     if (ret)
0219         return;
0220
0221     pci_try_set_mwi(pdev);
0222
0223     /* Special DMA address for UART */
0224     dma->rx_dma_addr = 0xfffff000;
0225     dma->tx_dma_addr = 0xfffff000;
0226
0227     param->dma_dev = &pdev->dev;
0228     param->src_id = 0;
0229     param->dst_id = 1;
0230     param->hs_polarity = true;
0231
0232     lpss->dma_maxburst = 8;
0233 }
0234
0235 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
0236 {
0237     struct dw_dma_chip *chip = &lpss->dma_chip;
0238     struct dw_dma_slave *param = &lpss->dma_param;
0239
0240     if (!param->dma_dev)
0241         return;
0242
0243     dw_dma_remove(chip);
0244
0245     pci_iounmap(to_pci_dev(chip->dev), chip->regs);
0246 }
0247 #else   /* CONFIG_SERIAL_8250_DMA */
0248 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
0249 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
0250 #endif  /* !CONFIG_SERIAL_8250_DMA */
0251
0252 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
0253 {
0254     qrk_serial_setup_dma(lpss, port);
0255     return 0;
0256 }
0257
0258 static void qrk_serial_exit(struct lpss8250 *lpss)
0259 {
0260     qrk_serial_exit_dma(lpss);
0261 }
0262
0263 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
0264 {
0265     struct dw_dma_slave *dws = param;
0266
0267     if (dws->dma_dev != chan->device->dev)
0268         return false;
0269
0270     chan->private = dws;
0271     return true;
0272 }
0273
0274 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
0275 {
0276     struct uart_8250_dma *dma = &lpss->data.dma;
0277     struct dw_dma_slave *rx_param, *tx_param;
0278     struct device *dev = port->port.dev;
0279
0280     if (!lpss->dma_param.dma_dev)
0281         return 0;
0282
0283     rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
0284     if (!rx_param)
0285         return -ENOMEM;
0286
0287     tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
0288     if (!tx_param)
0289         return -ENOMEM;
0290
0291     *rx_param = lpss->dma_param;
0292     dma->rxconf.src_maxburst = lpss->dma_maxburst;
0293
0294     *tx_param = lpss->dma_param;
0295     dma->txconf.dst_maxburst = lpss->dma_maxburst;
0296
0297     dma->fn = lpss8250_dma_filter;
0298     dma->rx_param = rx_param;
0299     dma->tx_param = tx_param;
0300
0301     port->dma = dma;
0302     return 0;
0303 }
0304
0305 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0306 {
0307     struct uart_8250_port uart;
0308     struct lpss8250 *lpss;
0309     int ret;
0310
0311     ret = pcim_enable_device(pdev);
0312     if (ret)
0313         return ret;
0314
0315     pci_set_master(pdev);
0316
0317     lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
0318     if (!lpss)
0319         return -ENOMEM;
0320
0321     ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
0322     if (ret < 0)
0323         return ret;
0324
0325     lpss->board = (struct lpss8250_board *)id->driver_data;
0326
0327     memset(&uart, 0, sizeof(struct uart_8250_port));
0328
0329     uart.port.dev = &pdev->dev;
0330     uart.port.irq = pci_irq_vector(pdev, 0);
0331     uart.port.private_data = &lpss->data;
0332     uart.port.type = PORT_16550A;
0333     uart.port.iotype = UPIO_MEM32;
0334     uart.port.regshift = 2;
0335     uart.port.uartclk = lpss->board->base_baud * 16;
0336     uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
0337     uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
0338     uart.port.mapbase = pci_resource_start(pdev, 0);
0339     uart.port.membase = pcim_iomap(pdev, 0, 0);
0340     if (!uart.port.membase)
0341         return -ENOMEM;
0342
0343     ret = lpss->board->setup(lpss, &uart.port);
0344     if (ret)
0345         return ret;
0346
0347     dw8250_setup_port(&uart.port);
0348
0349     ret = lpss8250_dma_setup(lpss, &uart);
0350     if (ret)
0351         goto err_exit;
0352
0353     ret = serial8250_register_8250_port(&uart);
0354     if (ret < 0)
0355         goto err_exit;
0356
0357     lpss->data.line = ret;
0358
0359     pci_set_drvdata(pdev, lpss);
0360     return 0;
0361
0362 err_exit:
0363     lpss->board->exit(lpss);
0364     pci_free_irq_vectors(pdev);
0365     return ret;
0366 }
0367
0368 static void lpss8250_remove(struct pci_dev *pdev)
0369 {
0370     struct lpss8250 *lpss = pci_get_drvdata(pdev);
0371
0372     serial8250_unregister_port(lpss->data.line);
0373
0374     lpss->board->exit(lpss);
0375     pci_free_irq_vectors(pdev);
0376 }
0377
0378 static const struct lpss8250_board byt_board = {
0379     .freq = 100000000,
0380     .base_baud = 2764800,
0381     .setup = byt_serial_setup,
0382     .exit = byt_serial_exit,
0383 };
0384
0385 static const struct lpss8250_board ehl_board = {
0386     .freq = 200000000,
0387     .base_baud = 12500000,
0388     .setup = ehl_serial_setup,
0389     .exit = ehl_serial_exit,
0390 };
0391
0392 static const struct lpss8250_board qrk_board = {
0393     .freq = 44236800,
0394     .base_baud = 2764800,
0395     .setup = qrk_serial_setup,
0396     .exit = qrk_serial_exit,
0397 };
0398
0399 static const struct pci_device_id pci_ids[] = {
0400     { PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
0401     { PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
0402     { PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
0403     { PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
0404     { PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
0405     { PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
0406     { PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
0407     { PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
0408     { PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
0409     { PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },
0410     { PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) },
0411     { PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) },
0412     { PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) },
0413     { }
0414 };
0415 MODULE_DEVICE_TABLE(pci, pci_ids);
0416
0417 static struct pci_driver lpss8250_pci_driver = {
0418     .name           = "8250_lpss",
0419     .id_table       = pci_ids,
0420     .probe          = lpss8250_probe,
0421     .remove         = lpss8250_remove,
0422 };
0423
0424 module_pci_driver(lpss8250_pci_driver);
0425
0426 MODULE_AUTHOR("Intel Corporation");
0427 MODULE_LICENSE("GPL v2");
0428 MODULE_DESCRIPTION("Intel LPSS UART driver");