Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Early serial console for 8250/16550 devices
0004  *
0005  * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
0006  *  Bjorn Helgaas <bjorn.helgaas@hp.com>
0007  *
0008  * Based on the 8250.c serial driver, Copyright (C) 2001 Russell King,
0009  * and on early_printk.c by Andi Kleen.
0010  *
0011  * This is for use before the serial driver has initialized, in
0012  * particular, before the UARTs have been discovered and named.
0013  * Instead of specifying the console device as, e.g., "ttyS0",
0014  * we locate the device directly by its MMIO or I/O port address.
0015  *
0016  * The user can specify the device directly, e.g.,
0017  *  earlycon=uart8250,io,0x3f8,9600n8
0018  *  earlycon=uart8250,mmio,0xff5e0000,115200n8
0019  *  earlycon=uart8250,mmio32,0xff5e0000,115200n8
0020  * or
0021  *  console=uart8250,io,0x3f8,9600n8
0022  *  console=uart8250,mmio,0xff5e0000,115200n8
0023  *  console=uart8250,mmio32,0xff5e0000,115200n8
0024  */
0025 
0026 #include <linux/tty.h>
0027 #include <linux/init.h>
0028 #include <linux/console.h>
0029 #include <linux/of.h>
0030 #include <linux/of_device.h>
0031 #include <linux/serial_reg.h>
0032 #include <linux/serial.h>
0033 #include <linux/serial_8250.h>
0034 #include <asm/io.h>
0035 #include <asm/serial.h>
0036 
0037 static unsigned int serial8250_early_in(struct uart_port *port, int offset)
0038 {
0039     int reg_offset = offset;
0040     offset <<= port->regshift;
0041 
0042     switch (port->iotype) {
0043     case UPIO_MEM:
0044         return readb(port->membase + offset);
0045     case UPIO_MEM16:
0046         return readw(port->membase + offset);
0047     case UPIO_MEM32:
0048         return readl(port->membase + offset);
0049     case UPIO_MEM32BE:
0050         return ioread32be(port->membase + offset);
0051     case UPIO_PORT:
0052         return inb(port->iobase + offset);
0053     case UPIO_AU:
0054         return port->serial_in(port, reg_offset);
0055     default:
0056         return 0;
0057     }
0058 }
0059 
0060 static void serial8250_early_out(struct uart_port *port, int offset, int value)
0061 {
0062     int reg_offset = offset;
0063     offset <<= port->regshift;
0064 
0065     switch (port->iotype) {
0066     case UPIO_MEM:
0067         writeb(value, port->membase + offset);
0068         break;
0069     case UPIO_MEM16:
0070         writew(value, port->membase + offset);
0071         break;
0072     case UPIO_MEM32:
0073         writel(value, port->membase + offset);
0074         break;
0075     case UPIO_MEM32BE:
0076         iowrite32be(value, port->membase + offset);
0077         break;
0078     case UPIO_PORT:
0079         outb(value, port->iobase + offset);
0080         break;
0081     case UPIO_AU:
0082         port->serial_out(port, reg_offset, value);
0083         break;
0084     }
0085 }
0086 
0087 static void serial_putc(struct uart_port *port, unsigned char c)
0088 {
0089     unsigned int status;
0090 
0091     serial8250_early_out(port, UART_TX, c);
0092 
0093     for (;;) {
0094         status = serial8250_early_in(port, UART_LSR);
0095         if (uart_lsr_tx_empty(status))
0096             break;
0097         cpu_relax();
0098     }
0099 }
0100 
0101 static void early_serial8250_write(struct console *console,
0102                     const char *s, unsigned int count)
0103 {
0104     struct earlycon_device *device = console->data;
0105     struct uart_port *port = &device->port;
0106 
0107     uart_console_write(port, s, count, serial_putc);
0108 }
0109 
0110 #ifdef CONFIG_CONSOLE_POLL
0111 static int early_serial8250_read(struct console *console,
0112                  char *s, unsigned int count)
0113 {
0114     struct earlycon_device *device = console->data;
0115     struct uart_port *port = &device->port;
0116     unsigned int status;
0117     int num_read = 0;
0118 
0119     while (num_read < count) {
0120         status = serial8250_early_in(port, UART_LSR);
0121         if (!(status & UART_LSR_DR))
0122             break;
0123         s[num_read++] = serial8250_early_in(port, UART_RX);
0124     }
0125 
0126     return num_read;
0127 }
0128 #else
0129 #define early_serial8250_read NULL
0130 #endif
0131 
0132 static void __init init_port(struct earlycon_device *device)
0133 {
0134     struct uart_port *port = &device->port;
0135     unsigned int divisor;
0136     unsigned char c;
0137     unsigned int ier;
0138 
0139     serial8250_early_out(port, UART_LCR, 0x3);  /* 8n1 */
0140     ier = serial8250_early_in(port, UART_IER);
0141     serial8250_early_out(port, UART_IER, ier & UART_IER_UUE); /* no interrupt */
0142     serial8250_early_out(port, UART_FCR, 0);    /* no fifo */
0143     serial8250_early_out(port, UART_MCR, 0x3);  /* DTR + RTS */
0144 
0145     if (port->uartclk) {
0146         divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
0147         c = serial8250_early_in(port, UART_LCR);
0148         serial8250_early_out(port, UART_LCR, c | UART_LCR_DLAB);
0149         serial8250_early_out(port, UART_DLL, divisor & 0xff);
0150         serial8250_early_out(port, UART_DLM, (divisor >> 8) & 0xff);
0151         serial8250_early_out(port, UART_LCR, c & ~UART_LCR_DLAB);
0152     }
0153 }
0154 
0155 int __init early_serial8250_setup(struct earlycon_device *device,
0156                      const char *options)
0157 {
0158     if (!(device->port.membase || device->port.iobase))
0159         return -ENODEV;
0160 
0161     if (!device->baud) {
0162         struct uart_port *port = &device->port;
0163         unsigned int ier;
0164 
0165         /* assume the device was initialized, only mask interrupts */
0166         ier = serial8250_early_in(port, UART_IER);
0167         serial8250_early_out(port, UART_IER, ier & UART_IER_UUE);
0168     } else
0169         init_port(device);
0170 
0171     device->con->write = early_serial8250_write;
0172     device->con->read = early_serial8250_read;
0173     return 0;
0174 }
0175 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
0176 EARLYCON_DECLARE(uart, early_serial8250_setup);
0177 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
0178 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
0179 OF_EARLYCON_DECLARE(uart, "nvidia,tegra20-uart", early_serial8250_setup);
0180 OF_EARLYCON_DECLARE(uart, "snps,dw-apb-uart", early_serial8250_setup);
0181 
0182 #ifdef CONFIG_SERIAL_8250_OMAP
0183 
0184 static int __init early_omap8250_setup(struct earlycon_device *device,
0185                        const char *options)
0186 {
0187     struct uart_port *port = &device->port;
0188 
0189     if (!(device->port.membase || device->port.iobase))
0190         return -ENODEV;
0191 
0192     port->regshift = 2;
0193     device->con->write = early_serial8250_write;
0194     return 0;
0195 }
0196 
0197 OF_EARLYCON_DECLARE(omap8250, "ti,omap2-uart", early_omap8250_setup);
0198 OF_EARLYCON_DECLARE(omap8250, "ti,omap3-uart", early_omap8250_setup);
0199 OF_EARLYCON_DECLARE(omap8250, "ti,omap4-uart", early_omap8250_setup);
0200 
0201 #endif
0202 
0203 #ifdef CONFIG_SERIAL_8250_RT288X
0204 
0205 static int __init early_au_setup(struct earlycon_device *dev, const char *opt)
0206 {
0207     dev->port.serial_in = au_serial_in;
0208     dev->port.serial_out = au_serial_out;
0209     dev->port.iotype = UPIO_AU;
0210     dev->con->write = early_serial8250_write;
0211     return 0;
0212 }
0213 OF_EARLYCON_DECLARE(palmchip, "ralink,rt2880-uart", early_au_setup);
0214 
0215 #endif