Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /* Synopsys DesignWare 8250 library header file. */
0003 
0004 #include <linux/io.h>
0005 #include <linux/notifier.h>
0006 #include <linux/types.h>
0007 #include <linux/workqueue.h>
0008 
0009 #include "8250.h"
0010 
0011 struct clk;
0012 struct reset_control;
0013 
0014 struct dw8250_port_data {
0015     /* Port properties */
0016     int         line;
0017 
0018     /* DMA operations */
0019     struct uart_8250_dma    dma;
0020 
0021     /* Hardware configuration */
0022     u8          dlf_size;
0023 
0024     /* RS485 variables */
0025     bool            hw_rs485_support;
0026 };
0027 
0028 struct dw8250_platform_data {
0029     u8 usr_reg;
0030     u32 cpr_val;
0031     unsigned int quirks;
0032 };
0033 
0034 struct dw8250_data {
0035     struct dw8250_port_data data;
0036     const struct dw8250_platform_data *pdata;
0037 
0038     int         msr_mask_on;
0039     int         msr_mask_off;
0040     struct clk      *clk;
0041     struct clk      *pclk;
0042     struct notifier_block   clk_notifier;
0043     struct work_struct  clk_work;
0044     struct reset_control    *rst;
0045 
0046     unsigned int        skip_autocfg:1;
0047     unsigned int        uart_16550_compatible:1;
0048 };
0049 
0050 void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old);
0051 void dw8250_setup_port(struct uart_port *p);
0052 
0053 static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data)
0054 {
0055     return container_of(data, struct dw8250_data, data);
0056 }
0057 
0058 static inline u32 dw8250_readl_ext(struct uart_port *p, int offset)
0059 {
0060     if (p->iotype == UPIO_MEM32BE)
0061         return ioread32be(p->membase + offset);
0062     return readl(p->membase + offset);
0063 }
0064 
0065 static inline void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg)
0066 {
0067     if (p->iotype == UPIO_MEM32BE)
0068         iowrite32be(reg, p->membase + offset);
0069     else
0070         writel(reg, p->membase + offset);
0071 }