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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP4xxx bandgap registers, bitfields and temperature definitions
0004  *
0005  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
0006  * Contact:
0007  *   Eduardo Valentin <eduardo.valentin@ti.com>
0008  */
0009 #ifndef __OMAP4XXX_BANDGAP_H
0010 #define __OMAP4XXX_BANDGAP_H
0011 
0012 /**
0013  * *** OMAP4430 ***
0014  *
0015  * Below, in sequence, are the Register definitions,
0016  * the bitfields and the temperature definitions for OMAP4430.
0017  */
0018 
0019 /**
0020  * OMAP4430 register definitions
0021  *
0022  * Registers are defined as offsets. The offsets are
0023  * relative to FUSE_OPP_BGAP on 4430.
0024  */
0025 
0026 /* OMAP4430.FUSE_OPP_BGAP */
0027 #define OMAP4430_FUSE_OPP_BGAP              0x0
0028 
0029 /* OMAP4430.TEMP_SENSOR  */
0030 #define OMAP4430_TEMP_SENSOR_CTRL_OFFSET        0xCC
0031 
0032 /**
0033  * Register and bit definitions for OMAP4430
0034  *
0035  * All the macros bellow define the required bits for
0036  * controlling temperature on OMAP4430. Bit defines are
0037  * grouped by register.
0038  */
0039 
0040 /* OMAP4430.TEMP_SENSOR bits */
0041 #define OMAP4430_BGAP_TEMPSOFF_MASK         BIT(12)
0042 #define OMAP4430_BGAP_TSHUT_MASK            BIT(11)
0043 #define OMAP4430_CONTINUOUS_MODE_MASK           BIT(10)
0044 #define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK      BIT(9)
0045 #define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK     BIT(8)
0046 #define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK        (0xff << 0)
0047 
0048 /**
0049  * Temperature limits and thresholds for OMAP4430
0050  *
0051  * All the macros bellow are definitions for handling the
0052  * ADC conversions and representation of temperature limits
0053  * and thresholds for OMAP4430.
0054  */
0055 
0056 /*
0057  * ADC conversion table limits. Ignore values outside the TRM listed
0058  * range to avoid bogus thermal shutdowns. See omap4430 TRM chapter
0059  * "18.4.10.2.3 ADC Codes Versus Temperature".
0060  */
0061 #define OMAP4430_ADC_START_VALUE            13
0062 #define OMAP4430_ADC_END_VALUE              107
0063 /* bandgap clock limits (no control on 4430) */
0064 #define OMAP4430_MAX_FREQ               32768
0065 #define OMAP4430_MIN_FREQ               32768
0066 
0067 /**
0068  * *** OMAP4460 *** Applicable for OMAP4470
0069  *
0070  * Below, in sequence, are the Register definitions,
0071  * the bitfields and the temperature definitions for OMAP4460.
0072  */
0073 
0074 /**
0075  * OMAP4460 register definitions
0076  *
0077  * Registers are defined as offsets. The offsets are
0078  * relative to FUSE_OPP_BGAP on 4460.
0079  */
0080 
0081 /* OMAP4460.FUSE_OPP_BGAP */
0082 #define OMAP4460_FUSE_OPP_BGAP              0x0
0083 
0084 /* OMAP4460.TEMP_SENSOR */
0085 #define OMAP4460_TEMP_SENSOR_CTRL_OFFSET        0xCC
0086 
0087 /* OMAP4460.BANDGAP_CTRL */
0088 #define OMAP4460_BGAP_CTRL_OFFSET           0x118
0089 
0090 /* OMAP4460.BANDGAP_COUNTER */
0091 #define OMAP4460_BGAP_COUNTER_OFFSET            0x11C
0092 
0093 /* OMAP4460.BANDGAP_THRESHOLD */
0094 #define OMAP4460_BGAP_THRESHOLD_OFFSET          0x120
0095 
0096 /* OMAP4460.TSHUT_THRESHOLD */
0097 #define OMAP4460_BGAP_TSHUT_OFFSET          0x124
0098 
0099 /* OMAP4460.BANDGAP_STATUS */
0100 #define OMAP4460_BGAP_STATUS_OFFSET         0x128
0101 
0102 /**
0103  * Register bitfields for OMAP4460
0104  *
0105  * All the macros bellow define the required bits for
0106  * controlling temperature on OMAP4460. Bit defines are
0107  * grouped by register.
0108  */
0109 /* OMAP4460.TEMP_SENSOR bits */
0110 #define OMAP4460_BGAP_TEMPSOFF_MASK         BIT(13)
0111 #define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK      BIT(11)
0112 #define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK     BIT(10)
0113 #define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK        (0x3ff << 0)
0114 
0115 /* OMAP4460.BANDGAP_CTRL bits */
0116 #define OMAP4460_CONTINUOUS_MODE_MASK           BIT(31)
0117 #define OMAP4460_MASK_HOT_MASK              BIT(1)
0118 #define OMAP4460_MASK_COLD_MASK             BIT(0)
0119 
0120 /* OMAP4460.BANDGAP_COUNTER bits */
0121 #define OMAP4460_COUNTER_MASK               (0xffffff << 0)
0122 
0123 /* OMAP4460.BANDGAP_THRESHOLD bits */
0124 #define OMAP4460_T_HOT_MASK             (0x3ff << 16)
0125 #define OMAP4460_T_COLD_MASK                (0x3ff << 0)
0126 
0127 /* OMAP4460.TSHUT_THRESHOLD bits */
0128 #define OMAP4460_TSHUT_HOT_MASK             (0x3ff << 16)
0129 #define OMAP4460_TSHUT_COLD_MASK            (0x3ff << 0)
0130 
0131 /* OMAP4460.BANDGAP_STATUS bits */
0132 #define OMAP4460_HOT_FLAG_MASK              BIT(1)
0133 #define OMAP4460_COLD_FLAG_MASK             BIT(0)
0134 
0135 /**
0136  * Temperature limits and thresholds for OMAP4460
0137  *
0138  * All the macros bellow are definitions for handling the
0139  * ADC conversions and representation of temperature limits
0140  * and thresholds for OMAP4460.
0141  */
0142 
0143 /* ADC conversion table limits */
0144 #define OMAP4460_ADC_START_VALUE            530
0145 #define OMAP4460_ADC_END_VALUE              932
0146 /* bandgap clock limits */
0147 #define OMAP4460_MAX_FREQ               1500000
0148 #define OMAP4460_MIN_FREQ               1000000
0149 /* interrupts thresholds */
0150 #define OMAP4460_TSHUT_HOT              900 /* 122 deg C */
0151 #define OMAP4460_TSHUT_COLD             895 /* 100 deg C */
0152 #define OMAP4460_T_HOT                  800 /* 73 deg C */
0153 #define OMAP4460_T_COLD                 795 /* 71 deg C */
0154 
0155 #endif /* __OMAP4XXX_BANDGAP_H */