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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  *  R-Car Gen3 THS thermal sensor driver
0004  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
0005  *
0006  * Copyright (C) 2016 Renesas Electronics Corporation.
0007  * Copyright (C) 2016 Sang Engineering
0008  */
0009 #include <linux/delay.h>
0010 #include <linux/err.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/io.h>
0013 #include <linux/module.h>
0014 #include <linux/of_device.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/sys_soc.h>
0018 #include <linux/thermal.h>
0019 
0020 #include "thermal_core.h"
0021 #include "thermal_hwmon.h"
0022 
0023 /* Register offsets */
0024 #define REG_GEN3_IRQSTR     0x04
0025 #define REG_GEN3_IRQMSK     0x08
0026 #define REG_GEN3_IRQCTL     0x0C
0027 #define REG_GEN3_IRQEN      0x10
0028 #define REG_GEN3_IRQTEMP1   0x14
0029 #define REG_GEN3_IRQTEMP2   0x18
0030 #define REG_GEN3_IRQTEMP3   0x1C
0031 #define REG_GEN3_CTSR       0x20
0032 #define REG_GEN3_THCTR      0x20
0033 #define REG_GEN3_TEMP       0x28
0034 #define REG_GEN3_THCODE1    0x50
0035 #define REG_GEN3_THCODE2    0x54
0036 #define REG_GEN3_THCODE3    0x58
0037 #define REG_GEN3_PTAT1      0x5c
0038 #define REG_GEN3_PTAT2      0x60
0039 #define REG_GEN3_PTAT3      0x64
0040 #define REG_GEN3_THSCP      0x68
0041 
0042 /* IRQ{STR,MSK,EN} bits */
0043 #define IRQ_TEMP1       BIT(0)
0044 #define IRQ_TEMP2       BIT(1)
0045 #define IRQ_TEMP3       BIT(2)
0046 #define IRQ_TEMPD1      BIT(3)
0047 #define IRQ_TEMPD2      BIT(4)
0048 #define IRQ_TEMPD3      BIT(5)
0049 
0050 /* CTSR bits */
0051 #define CTSR_PONM   BIT(8)
0052 #define CTSR_AOUT   BIT(7)
0053 #define CTSR_THBGR  BIT(5)
0054 #define CTSR_VMEN   BIT(4)
0055 #define CTSR_VMST   BIT(1)
0056 #define CTSR_THSST  BIT(0)
0057 
0058 /* THCTR bits */
0059 #define THCTR_PONM  BIT(6)
0060 #define THCTR_THSST BIT(0)
0061 
0062 /* THSCP bits */
0063 #define THSCP_COR_PARA_VLD  (BIT(15) | BIT(14))
0064 
0065 #define CTEMP_MASK  0xFFF
0066 
0067 #define MCELSIUS(temp)  ((temp) * 1000)
0068 #define GEN3_FUSE_MASK  0xFFF
0069 
0070 #define TSC_MAX_NUM 5
0071 
0072 /* Structure for thermal temperature calculation */
0073 struct equation_coefs {
0074     int a1;
0075     int b1;
0076     int a2;
0077     int b2;
0078 };
0079 
0080 struct rcar_gen3_thermal_tsc {
0081     void __iomem *base;
0082     struct thermal_zone_device *zone;
0083     struct equation_coefs coef;
0084     int tj_t;
0085     int thcode[3];
0086 };
0087 
0088 struct rcar_gen3_thermal_priv {
0089     struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
0090     unsigned int num_tscs;
0091     void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
0092     int ptat[3];
0093 };
0094 
0095 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
0096                      u32 reg)
0097 {
0098     return ioread32(tsc->base + reg);
0099 }
0100 
0101 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
0102                        u32 reg, u32 data)
0103 {
0104     iowrite32(data, tsc->base + reg);
0105 }
0106 
0107 /*
0108  * Linear approximation for temperature
0109  *
0110  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
0111  *
0112  * The constants a and b are calculated using two triplets of int values PTAT
0113  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
0114  * coded values from driver. The formula to calculate a and b are taken from
0115  * BSP and sparsely documented and understood.
0116  *
0117  * Examining the linear formula and the formula used to calculate constants a
0118  * and b while knowing that the span for PTAT and THCODE values are between
0119  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
0120  * Integer also needs to be signed so that leaves 7 bits for binary
0121  * fixed point scaling.
0122  */
0123 
0124 #define FIXPT_SHIFT 7
0125 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
0126 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
0127 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
0128 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
0129 
0130 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
0131 
0132 /* no idea where these constants come from */
0133 #define TJ_3 -41
0134 
0135 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
0136                      struct rcar_gen3_thermal_tsc *tsc,
0137                      int ths_tj_1)
0138 {
0139     /* TODO: Find documentation and document constant calculation formula */
0140 
0141     /*
0142      * Division is not scaled in BSP and if scaled it might overflow
0143      * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
0144      */
0145     tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
0146              / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
0147 
0148     tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
0149                  tsc->tj_t - FIXPT_INT(TJ_3));
0150     tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
0151 
0152     tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
0153                  tsc->tj_t - FIXPT_INT(ths_tj_1));
0154     tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
0155 }
0156 
0157 static int rcar_gen3_thermal_round(int temp)
0158 {
0159     int result, round_offs;
0160 
0161     round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
0162         -RCAR3_THERMAL_GRAN / 2;
0163     result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
0164     return result * RCAR3_THERMAL_GRAN;
0165 }
0166 
0167 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
0168 {
0169     struct rcar_gen3_thermal_tsc *tsc = devdata;
0170     int mcelsius, val;
0171     int reg;
0172 
0173     /* Read register and convert to mili Celsius */
0174     reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
0175 
0176     if (reg <= tsc->thcode[1])
0177         val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
0178                 tsc->coef.a1);
0179     else
0180         val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
0181                 tsc->coef.a2);
0182     mcelsius = FIXPT_TO_MCELSIUS(val);
0183 
0184     /* Guaranteed operating range is -40C to 125C. */
0185 
0186     /* Round value to device granularity setting */
0187     *temp = rcar_gen3_thermal_round(mcelsius);
0188 
0189     return 0;
0190 }
0191 
0192 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
0193                           int mcelsius)
0194 {
0195     int celsius, val;
0196 
0197     celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
0198     if (celsius <= INT_FIXPT(tsc->tj_t))
0199         val = celsius * tsc->coef.a1 + tsc->coef.b1;
0200     else
0201         val = celsius * tsc->coef.a2 + tsc->coef.b2;
0202 
0203     return INT_FIXPT(val);
0204 }
0205 
0206 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
0207 {
0208     struct rcar_gen3_thermal_tsc *tsc = devdata;
0209     u32 irqmsk = 0;
0210 
0211     if (low != -INT_MAX) {
0212         irqmsk |= IRQ_TEMPD1;
0213         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
0214                     rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
0215     }
0216 
0217     if (high != INT_MAX) {
0218         irqmsk |= IRQ_TEMP2;
0219         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
0220                     rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
0221     }
0222 
0223     rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
0224 
0225     return 0;
0226 }
0227 
0228 static struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
0229     .get_temp   = rcar_gen3_thermal_get_temp,
0230     .set_trips  = rcar_gen3_thermal_set_trips,
0231 };
0232 
0233 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
0234 {
0235     struct rcar_gen3_thermal_priv *priv = data;
0236     unsigned int i;
0237     u32 status;
0238 
0239     for (i = 0; i < priv->num_tscs; i++) {
0240         status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
0241         rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
0242         if (status)
0243             thermal_zone_device_update(priv->tscs[i]->zone,
0244                            THERMAL_EVENT_UNSPECIFIED);
0245     }
0246 
0247     return IRQ_HANDLED;
0248 }
0249 
0250 static const struct soc_device_attribute r8a7795es1[] = {
0251     { .soc_id = "r8a7795", .revision = "ES1.*" },
0252     { /* sentinel */ }
0253 };
0254 
0255 static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
0256 {
0257     unsigned int i;
0258     u32 thscp;
0259 
0260     /* If fuses are not set, fallback to pseudo values. */
0261     thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
0262     if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
0263         /* Default THCODE values in case FUSEs are not set. */
0264         static const int thcodes[TSC_MAX_NUM][3] = {
0265             { 3397, 2800, 2221 },
0266             { 3393, 2795, 2216 },
0267             { 3389, 2805, 2237 },
0268             { 3415, 2694, 2195 },
0269             { 3356, 2724, 2244 },
0270         };
0271 
0272         priv->ptat[0] = 2631;
0273         priv->ptat[1] = 1509;
0274         priv->ptat[2] = 435;
0275 
0276         for (i = 0; i < priv->num_tscs; i++) {
0277             struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
0278 
0279             tsc->thcode[0] = thcodes[i][0];
0280             tsc->thcode[1] = thcodes[i][1];
0281             tsc->thcode[2] = thcodes[i][2];
0282         }
0283 
0284         return false;
0285     }
0286 
0287     /*
0288      * Set the pseudo calibration points with fused values.
0289      * PTAT is shared between all TSCs but only fused for the first
0290      * TSC while THCODEs are fused for each TSC.
0291      */
0292     priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
0293         GEN3_FUSE_MASK;
0294     priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
0295         GEN3_FUSE_MASK;
0296     priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
0297         GEN3_FUSE_MASK;
0298 
0299     for (i = 0; i < priv->num_tscs; i++) {
0300         struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
0301 
0302         tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
0303             GEN3_FUSE_MASK;
0304         tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
0305             GEN3_FUSE_MASK;
0306         tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
0307             GEN3_FUSE_MASK;
0308     }
0309 
0310     return true;
0311 }
0312 
0313 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
0314 {
0315     rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
0316     rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
0317 
0318     usleep_range(1000, 2000);
0319 
0320     rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
0321 
0322     rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
0323     rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
0324     if (tsc->zone->ops->set_trips)
0325         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
0326                     IRQ_TEMPD1 | IRQ_TEMP2);
0327 
0328     rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
0329                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
0330 
0331     usleep_range(100, 200);
0332 
0333     rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
0334                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
0335                 CTSR_VMST | CTSR_THSST);
0336 
0337     usleep_range(1000, 2000);
0338 }
0339 
0340 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
0341 {
0342     u32 reg_val;
0343 
0344     reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
0345     reg_val &= ~THCTR_PONM;
0346     rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
0347 
0348     usleep_range(1000, 2000);
0349 
0350     rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
0351     rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
0352     if (tsc->zone->ops->set_trips)
0353         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
0354                     IRQ_TEMPD1 | IRQ_TEMP2);
0355 
0356     reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
0357     reg_val |= THCTR_THSST;
0358     rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
0359 
0360     usleep_range(1000, 2000);
0361 }
0362 
0363 static const int rcar_gen3_ths_tj_1 = 126;
0364 static const int rcar_gen3_ths_tj_1_m3_w = 116;
0365 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
0366     {
0367         .compatible = "renesas,r8a774a1-thermal",
0368         .data = &rcar_gen3_ths_tj_1_m3_w,
0369     },
0370     {
0371         .compatible = "renesas,r8a774b1-thermal",
0372         .data = &rcar_gen3_ths_tj_1,
0373     },
0374     {
0375         .compatible = "renesas,r8a774e1-thermal",
0376         .data = &rcar_gen3_ths_tj_1,
0377     },
0378     {
0379         .compatible = "renesas,r8a7795-thermal",
0380         .data = &rcar_gen3_ths_tj_1,
0381     },
0382     {
0383         .compatible = "renesas,r8a7796-thermal",
0384         .data = &rcar_gen3_ths_tj_1_m3_w,
0385     },
0386     {
0387         .compatible = "renesas,r8a77961-thermal",
0388         .data = &rcar_gen3_ths_tj_1_m3_w,
0389     },
0390     {
0391         .compatible = "renesas,r8a77965-thermal",
0392         .data = &rcar_gen3_ths_tj_1,
0393     },
0394     {
0395         .compatible = "renesas,r8a77980-thermal",
0396         .data = &rcar_gen3_ths_tj_1,
0397     },
0398     {
0399         .compatible = "renesas,r8a779a0-thermal",
0400         .data = &rcar_gen3_ths_tj_1,
0401     },
0402     {
0403         .compatible = "renesas,r8a779f0-thermal",
0404         .data = &rcar_gen3_ths_tj_1,
0405     },
0406     {},
0407 };
0408 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
0409 
0410 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
0411 {
0412     struct device *dev = &pdev->dev;
0413 
0414     pm_runtime_put(dev);
0415     pm_runtime_disable(dev);
0416 
0417     return 0;
0418 }
0419 
0420 static void rcar_gen3_hwmon_action(void *data)
0421 {
0422     struct thermal_zone_device *zone = data;
0423 
0424     thermal_remove_hwmon_sysfs(zone);
0425 }
0426 
0427 static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
0428                       struct platform_device *pdev)
0429 {
0430     struct device *dev = &pdev->dev;
0431     unsigned int i;
0432     char *irqname;
0433     int ret, irq;
0434 
0435     for (i = 0; i < 2; i++) {
0436         irq = platform_get_irq_optional(pdev, i);
0437         if (irq < 0)
0438             return irq;
0439 
0440         irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
0441                      dev_name(dev), i);
0442         if (!irqname)
0443             return -ENOMEM;
0444 
0445         ret = devm_request_threaded_irq(dev, irq, NULL,
0446                         rcar_gen3_thermal_irq,
0447                         IRQF_ONESHOT, irqname, priv);
0448         if (ret)
0449             return ret;
0450     }
0451 
0452     return 0;
0453 }
0454 
0455 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
0456 {
0457     struct rcar_gen3_thermal_priv *priv;
0458     struct device *dev = &pdev->dev;
0459     const int *ths_tj_1 = of_device_get_match_data(dev);
0460     struct resource *res;
0461     struct thermal_zone_device *zone;
0462     unsigned int i;
0463     int ret;
0464 
0465     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0466     if (!priv)
0467         return -ENOMEM;
0468 
0469     priv->thermal_init = rcar_gen3_thermal_init;
0470     if (soc_device_match(r8a7795es1))
0471         priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
0472 
0473     platform_set_drvdata(pdev, priv);
0474 
0475     if (rcar_gen3_thermal_request_irqs(priv, pdev))
0476         rcar_gen3_tz_of_ops.set_trips = NULL;
0477 
0478     pm_runtime_enable(dev);
0479     pm_runtime_get_sync(dev);
0480 
0481     for (i = 0; i < TSC_MAX_NUM; i++) {
0482         struct rcar_gen3_thermal_tsc *tsc;
0483 
0484         res = platform_get_resource(pdev, IORESOURCE_MEM, i);
0485         if (!res)
0486             break;
0487 
0488         tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
0489         if (!tsc) {
0490             ret = -ENOMEM;
0491             goto error_unregister;
0492         }
0493 
0494         tsc->base = devm_ioremap_resource(dev, res);
0495         if (IS_ERR(tsc->base)) {
0496             ret = PTR_ERR(tsc->base);
0497             goto error_unregister;
0498         }
0499 
0500         priv->tscs[i] = tsc;
0501     }
0502 
0503     priv->num_tscs = i;
0504 
0505     if (!rcar_gen3_thermal_read_fuses(priv))
0506         dev_info(dev, "No calibration values fused, fallback to driver values\n");
0507 
0508     for (i = 0; i < priv->num_tscs; i++) {
0509         struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
0510 
0511         zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
0512                                 &rcar_gen3_tz_of_ops);
0513         if (IS_ERR(zone)) {
0514             dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
0515             ret = PTR_ERR(zone);
0516             goto error_unregister;
0517         }
0518         tsc->zone = zone;
0519 
0520         priv->thermal_init(tsc);
0521         rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
0522 
0523         tsc->zone->tzp->no_hwmon = false;
0524         ret = thermal_add_hwmon_sysfs(tsc->zone);
0525         if (ret)
0526             goto error_unregister;
0527 
0528         ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
0529         if (ret)
0530             goto error_unregister;
0531 
0532         ret = of_thermal_get_ntrips(tsc->zone);
0533         if (ret < 0)
0534             goto error_unregister;
0535 
0536         dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
0537     }
0538 
0539     if (!priv->num_tscs) {
0540         ret = -ENODEV;
0541         goto error_unregister;
0542     }
0543 
0544     return 0;
0545 
0546 error_unregister:
0547     rcar_gen3_thermal_remove(pdev);
0548 
0549     return ret;
0550 }
0551 
0552 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
0553 {
0554     struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
0555     unsigned int i;
0556 
0557     for (i = 0; i < priv->num_tscs; i++) {
0558         struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
0559         struct thermal_zone_device *zone = tsc->zone;
0560 
0561         priv->thermal_init(tsc);
0562         if (zone->ops->set_trips)
0563             rcar_gen3_thermal_set_trips(tsc, zone->prev_low_trip,
0564                             zone->prev_high_trip);
0565     }
0566 
0567     return 0;
0568 }
0569 
0570 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
0571              rcar_gen3_thermal_resume);
0572 
0573 static struct platform_driver rcar_gen3_thermal_driver = {
0574     .driver = {
0575         .name   = "rcar_gen3_thermal",
0576         .pm = &rcar_gen3_thermal_pm_ops,
0577         .of_match_table = rcar_gen3_thermal_dt_ids,
0578     },
0579     .probe      = rcar_gen3_thermal_probe,
0580     .remove     = rcar_gen3_thermal_remove,
0581 };
0582 module_platform_driver(rcar_gen3_thermal_driver);
0583 
0584 MODULE_LICENSE("GPL v2");
0585 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
0586 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
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