thermal/qcom/tsens-v2.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2018, Linaro Limited
0005  */
0006
0007 #include <linux/bitops.h>
0008 #include <linux/regmap.h>
0009 #include "tsens.h"
0010
0011 /* ----- SROT ------ */
0012 #define SROT_HW_VER_OFF 0x0000
0013 #define SROT_CTRL_OFF       0x0004
0014
0015 /* ----- TM ------ */
0016 #define TM_INT_EN_OFF           0x0004
0017 #define TM_UPPER_LOWER_INT_STATUS_OFF   0x0008
0018 #define TM_UPPER_LOWER_INT_CLEAR_OFF    0x000c
0019 #define TM_UPPER_LOWER_INT_MASK_OFF 0x0010
0020 #define TM_CRITICAL_INT_STATUS_OFF  0x0014
0021 #define TM_CRITICAL_INT_CLEAR_OFF   0x0018
0022 #define TM_CRITICAL_INT_MASK_OFF    0x001c
0023 #define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020
0024 #define TM_Sn_CRITICAL_THRESHOLD_OFF    0x0060
0025 #define TM_Sn_STATUS_OFF        0x00a0
0026 #define TM_TRDY_OFF         0x00e4
0027 #define TM_WDOG_LOG_OFF     0x013c
0028
0029 /* v2.x: 8996, 8998, sdm845 */
0030
0031 static struct tsens_features tsens_v2_feat = {
0032     .ver_major  = VER_2_X,
0033     .crit_int   = 1,
0034     .adc        = 0,
0035     .srot_split = 1,
0036     .max_sensors    = 16,
0037 };
0038
0039 static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
0040     /* ----- SROT ------ */
0041     /* VERSION */
0042     [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
0043     [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
0044     [VER_STEP]  = REG_FIELD(SROT_HW_VER_OFF,  0, 15),
0045     /* CTRL_OFF */
0046     [TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF,    0,  0),
0047     [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF,    1,  1),
0048
0049     /* ----- TM ------ */
0050     /* INTERRUPT ENABLE */
0051     /* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */
0052     [INT_EN]  = REG_FIELD(TM_INT_EN_OFF, 0, 2),
0053
0054     /* TEMPERATURE THRESHOLDS */
0055     REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH,  TM_Sn_UPPER_LOWER_THRESHOLD_OFF,  0,  11),
0056     REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH,   TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12,  23),
0057     REG_FIELD_FOR_EACH_SENSOR16(CRIT_THRESH, TM_Sn_CRITICAL_THRESHOLD_OFF,     0,  11),
0058
0059     /* INTERRUPTS [CLEAR/STATUS/MASK] */
0060     REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
0061     REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
0062     REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
0063     REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
0064     REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
0065     REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
0066     REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_STATUS, TM_CRITICAL_INT_STATUS_OFF),
0067     REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR,  TM_CRITICAL_INT_CLEAR_OFF),
0068     REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK,   TM_CRITICAL_INT_MASK_OFF),
0069
0070     /* WATCHDOG on v2.3 or later */
0071     [WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31),
0072     [WDOG_BARK_CLEAR]  = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  31, 31),
0073     [WDOG_BARK_MASK]   = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   31, 31),
0074     [CC_MON_STATUS]    = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30),
0075     [CC_MON_CLEAR]     = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  30, 30),
0076     [CC_MON_MASK]      = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   30, 30),
0077     [WDOG_BARK_COUNT]  = REG_FIELD(TM_WDOG_LOG_OFF,             0,  7),
0078
0079     /* Sn_STATUS */
0080     REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF,  0,  11),
0081     REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, 21,  21),
0082     /* xxx_STATUS bits: 1 == threshold violated */
0083     REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, 16,  16),
0084     REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, 17,  17),
0085     REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS,    TM_Sn_STATUS_OFF, 18,  18),
0086     REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19,  19),
0087     REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS,      TM_Sn_STATUS_OFF, 20,  20),
0088
0089     /* TRDY: 1=ready, 0=in progress */
0090     [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
0091 };
0092
0093 static const struct tsens_ops ops_generic_v2 = {
0094     .init       = init_common,
0095     .get_temp   = get_temp_tsens_valid,
0096 };
0097
0098 struct tsens_plat_data data_tsens_v2 = {
0099     .ops        = &ops_generic_v2,
0100     .feat       = &tsens_v2_feat,
0101     .fields = tsens_v2_regfields,
0102 };
0103
0104 /* Kept around for backward compatibility with old msm8996.dtsi */
0105 struct tsens_plat_data data_8996 = {
0106     .num_sensors    = 13,
0107     .ops        = &ops_generic_v2,
0108     .feat       = &tsens_v2_feat,
0109     .fields = tsens_v2_regfields,
0110 };