thermal/qcom/lmh.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002
0003 /*
0004  * Copyright (C) 2021, Linaro Limited. All rights reserved.
0005  */
0006 #include <linux/module.h>
0007 #include <linux/interrupt.h>
0008 #include <linux/irqdomain.h>
0009 #include <linux/err.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/of_platform.h>
0012 #include <linux/slab.h>
0013 #include <linux/qcom_scm.h>
0014
0015 #define LMH_NODE_DCVS           0x44435653
0016 #define LMH_CLUSTER0_NODE_ID        0x6370302D
0017 #define LMH_CLUSTER1_NODE_ID        0x6370312D
0018
0019 #define LMH_SUB_FN_THERMAL      0x54484D4C
0020 #define LMH_SUB_FN_CRNT         0x43524E54
0021 #define LMH_SUB_FN_REL          0x52454C00
0022 #define LMH_SUB_FN_BCL          0x42434C00
0023
0024 #define LMH_ALGO_MODE_ENABLE        0x454E424C
0025 #define LMH_TH_HI_THRESHOLD     0x48494748
0026 #define LMH_TH_LOW_THRESHOLD        0x4C4F5700
0027 #define LMH_TH_ARM_THRESHOLD        0x41524D00
0028
0029 #define LMH_REG_DCVS_INTR_CLR       0x8
0030
0031 #define LMH_ENABLE_ALGOS        1
0032
0033 struct lmh_hw_data {
0034     void __iomem *base;
0035     struct irq_domain *domain;
0036     int irq;
0037 };
0038
0039 static irqreturn_t lmh_handle_irq(int hw_irq, void *data)
0040 {
0041     struct lmh_hw_data *lmh_data = data;
0042     int irq = irq_find_mapping(lmh_data->domain, 0);
0043
0044     /* Call the cpufreq driver to handle the interrupt */
0045     if (irq)
0046         generic_handle_irq(irq);
0047
0048     return 0;
0049 }
0050
0051 static void lmh_enable_interrupt(struct irq_data *d)
0052 {
0053     struct lmh_hw_data *lmh_data = irq_data_get_irq_chip_data(d);
0054
0055     /* Clear the existing interrupt */
0056     writel(0xff, lmh_data->base + LMH_REG_DCVS_INTR_CLR);
0057     enable_irq(lmh_data->irq);
0058 }
0059
0060 static void lmh_disable_interrupt(struct irq_data *d)
0061 {
0062     struct lmh_hw_data *lmh_data = irq_data_get_irq_chip_data(d);
0063
0064     disable_irq_nosync(lmh_data->irq);
0065 }
0066
0067 static struct irq_chip lmh_irq_chip = {
0068     .name           = "lmh",
0069     .irq_enable = lmh_enable_interrupt,
0070     .irq_disable    = lmh_disable_interrupt
0071 };
0072
0073 static int lmh_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
0074 {
0075     struct lmh_hw_data *lmh_data = d->host_data;
0076
0077     irq_set_chip_and_handler(irq, &lmh_irq_chip, handle_simple_irq);
0078     irq_set_chip_data(irq, lmh_data);
0079
0080     return 0;
0081 }
0082
0083 static const struct irq_domain_ops lmh_irq_ops = {
0084     .map = lmh_irq_map,
0085     .xlate = irq_domain_xlate_onecell,
0086 };
0087
0088 static int lmh_probe(struct platform_device *pdev)
0089 {
0090     struct device *dev = &pdev->dev;
0091     struct device_node *np = dev->of_node;
0092     struct device_node *cpu_node;
0093     struct lmh_hw_data *lmh_data;
0094     int temp_low, temp_high, temp_arm, cpu_id, ret;
0095     unsigned int enable_alg;
0096     u32 node_id;
0097
0098     lmh_data = devm_kzalloc(dev, sizeof(*lmh_data), GFP_KERNEL);
0099     if (!lmh_data)
0100         return -ENOMEM;
0101
0102     lmh_data->base = devm_platform_ioremap_resource(pdev, 0);
0103     if (IS_ERR(lmh_data->base))
0104         return PTR_ERR(lmh_data->base);
0105
0106     cpu_node = of_parse_phandle(np, "cpus", 0);
0107     if (!cpu_node)
0108         return -EINVAL;
0109     cpu_id = of_cpu_node_to_id(cpu_node);
0110     of_node_put(cpu_node);
0111
0112     ret = of_property_read_u32(np, "qcom,lmh-temp-high-millicelsius", &temp_high);
0113     if (ret) {
0114         dev_err(dev, "missing qcom,lmh-temp-high-millicelsius property\n");
0115         return ret;
0116     }
0117
0118     ret = of_property_read_u32(np, "qcom,lmh-temp-low-millicelsius", &temp_low);
0119     if (ret) {
0120         dev_err(dev, "missing qcom,lmh-temp-low-millicelsius property\n");
0121         return ret;
0122     }
0123
0124     ret = of_property_read_u32(np, "qcom,lmh-temp-arm-millicelsius", &temp_arm);
0125     if (ret) {
0126         dev_err(dev, "missing qcom,lmh-temp-arm-millicelsius property\n");
0127         return ret;
0128     }
0129
0130     /*
0131      * Only sdm845 has lmh hardware currently enabled from hlos. If this is needed
0132      * for other platforms, revisit this to check if the <cpu-id, node-id> should be part
0133      * of a dt match table.
0134      */
0135     if (cpu_id == 0) {
0136         node_id = LMH_CLUSTER0_NODE_ID;
0137     } else if (cpu_id == 4) {
0138         node_id = LMH_CLUSTER1_NODE_ID;
0139     } else {
0140         dev_err(dev, "Wrong CPU id associated with LMh node\n");
0141         return -EINVAL;
0142     }
0143
0144     if (!qcom_scm_lmh_dcvsh_available())
0145         return -EINVAL;
0146
0147     enable_alg = (uintptr_t)of_device_get_match_data(dev);
0148
0149     if (enable_alg) {
0150         ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1,
0151                      LMH_NODE_DCVS, node_id, 0);
0152         if (ret)
0153             dev_err(dev, "Error %d enabling current subfunction\n", ret);
0154
0155         ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1,
0156                      LMH_NODE_DCVS, node_id, 0);
0157         if (ret)
0158             dev_err(dev, "Error %d enabling reliability subfunction\n", ret);
0159
0160         ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1,
0161                      LMH_NODE_DCVS, node_id, 0);
0162         if (ret)
0163             dev_err(dev, "Error %d enabling BCL subfunction\n", ret);
0164
0165         ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1,
0166                      LMH_NODE_DCVS, node_id, 0);
0167         if (ret) {
0168             dev_err(dev, "Error %d enabling thermal subfunction\n", ret);
0169             return ret;
0170         }
0171
0172         ret = qcom_scm_lmh_profile_change(0x1);
0173         if (ret) {
0174             dev_err(dev, "Error %d changing profile\n", ret);
0175             return ret;
0176         }
0177     }
0178
0179     /* Set default thermal trips */
0180     ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_ARM_THRESHOLD, temp_arm,
0181                  LMH_NODE_DCVS, node_id, 0);
0182     if (ret) {
0183         dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
0184         return ret;
0185     }
0186
0187     ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_HI_THRESHOLD, temp_high,
0188                  LMH_NODE_DCVS, node_id, 0);
0189     if (ret) {
0190         dev_err(dev, "Error setting thermal HI threshold%d\n", ret);
0191         return ret;
0192     }
0193
0194     ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_LOW_THRESHOLD, temp_low,
0195                  LMH_NODE_DCVS, node_id, 0);
0196     if (ret) {
0197         dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
0198         return ret;
0199     }
0200
0201     lmh_data->irq = platform_get_irq(pdev, 0);
0202     lmh_data->domain = irq_domain_add_linear(np, 1, &lmh_irq_ops, lmh_data);
0203     if (!lmh_data->domain) {
0204         dev_err(dev, "Error adding irq_domain\n");
0205         return -EINVAL;
0206     }
0207
0208     /* Disable the irq and let cpufreq enable it when ready to handle the interrupt */
0209     irq_set_status_flags(lmh_data->irq, IRQ_NOAUTOEN);
0210     ret = devm_request_irq(dev, lmh_data->irq, lmh_handle_irq,
0211                    IRQF_ONESHOT | IRQF_NO_SUSPEND,
0212                    "lmh-irq", lmh_data);
0213     if (ret) {
0214         dev_err(dev, "Error %d registering irq %x\n", ret, lmh_data->irq);
0215         irq_domain_remove(lmh_data->domain);
0216         return ret;
0217     }
0218
0219     return 0;
0220 }
0221
0222 static const struct of_device_id lmh_table[] = {
0223     { .compatible = "qcom,sc8180x-lmh", },
0224     { .compatible = "qcom,sdm845-lmh", .data = (void *)LMH_ENABLE_ALGOS},
0225     { .compatible = "qcom,sm8150-lmh", },
0226     {}
0227 };
0228 MODULE_DEVICE_TABLE(of, lmh_table);
0229
0230 static struct platform_driver lmh_driver = {
0231     .probe = lmh_probe,
0232     .driver = {
0233         .name = "qcom-lmh",
0234         .of_match_table = lmh_table,
0235         .suppress_bind_attrs = true,
0236     },
0237 };
0238 module_platform_driver(lmh_driver);
0239
0240 MODULE_LICENSE("GPL v2");
0241 MODULE_DESCRIPTION("QCOM LMh driver");