staging/vt6655/desc.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
0004  * All rights reserved.
0005  *
0006  * Purpose:The header file of descriptor
0007  *
0008  * Revision History:
0009  *
0010  * Author: Tevin Chen
0011  *
0012  * Date: May 21, 1996
0013  *
0014  */
0015
0016 #ifndef __DESC_H__
0017 #define __DESC_H__
0018
0019 #include <linux/types.h>
0020 #include <linux/mm.h>
0021 #include "linux/ieee80211.h"
0022
0023 #define B_OWNED_BY_CHIP     1
0024 #define B_OWNED_BY_HOST     0
0025
0026 /* Bits in the RSR register */
0027 #define RSR_ADDRBROAD       0x80
0028 #define RSR_ADDRMULTI       0x40
0029 #define RSR_ADDRUNI         0x00
0030 #define RSR_IVLDTYP         0x20
0031 #define RSR_IVLDLEN         0x10        /* invalid len (> 2312 byte) */
0032 #define RSR_BSSIDOK         0x08
0033 #define RSR_CRCOK           0x04
0034 #define RSR_BCNSSIDOK       0x02
0035 #define RSR_ADDROK          0x01
0036
0037 /* Bits in the new RSR register */
0038 #define NEWRSR_DECRYPTOK    0x10
0039 #define NEWRSR_CFPIND       0x08
0040 #define NEWRSR_HWUTSF       0x04
0041 #define NEWRSR_BCNHITAID    0x02
0042 #define NEWRSR_BCNHITAID0   0x01
0043
0044 /* Bits in the TSR0 register */
0045 #define TSR0_PWRSTS1_2      0xC0
0046 #define TSR0_PWRSTS7        0x20
0047 #define TSR0_NCR            0x1F
0048
0049 /* Bits in the TSR1 register */
0050 #define TSR1_TERR           0x80
0051 #define TSR1_PWRSTS4_6      0x70
0052 #define TSR1_RETRYTMO       0x08
0053 #define TSR1_TMO            0x04
0054 #define TSR1_PWRSTS3        0x02
0055 #define ACK_DATA            0x01
0056
0057 /* Bits in the TCR register */
0058 #define EDMSDU              0x04        /* end of sdu */
0059 #define TCR_EDP             0x02        /* end of packet */
0060 #define TCR_STP             0x01        /* start of packet */
0061
0062 /* max transmit or receive buffer size */
0063 #define CB_MAX_BUF_SIZE     2900U
0064                     /* NOTE: must be multiple of 4 */
0065 #define CB_MAX_TX_BUF_SIZE          CB_MAX_BUF_SIZE
0066 #define CB_MAX_RX_BUF_SIZE_NORMAL   CB_MAX_BUF_SIZE
0067
0068 #define CB_BEACON_BUF_SIZE  512U
0069
0070 #define CB_MAX_RX_DESC      128
0071 #define CB_MIN_RX_DESC      16
0072 #define CB_MAX_TX_DESC      64
0073 #define CB_MIN_TX_DESC      16
0074
0075 #define CB_MAX_RECEIVED_PACKETS     16
0076                 /*
0077                  * limit our receive routine to indicating
0078                  * this many at a time for 2 reasons:
0079                  * 1. driver flow control to protocol layer
0080                  * 2. limit the time used in ISR routine
0081                  */
0082
0083 #define CB_EXTRA_RD_NUM     32
0084 #define CB_RD_NUM           32
0085 #define CB_TD_NUM           32
0086
0087 /*
0088  * max number of physical segments in a single NDIS packet. Above this
0089  * threshold, the packet is copied into a single physically contiguous buffer
0090  */
0091 #define CB_MAX_SEGMENT      4
0092
0093 #define CB_MIN_MAP_REG_NUM  4
0094 #define CB_MAX_MAP_REG_NUM  CB_MAX_TX_DESC
0095
0096 #define CB_PROTOCOL_RESERVED_SECTION    16
0097
0098 /*
0099  * if retrys excess 15 times , tx will abort, and if tx fifo underflow,
0100  * tx will fail, we should try to resend it
0101  */
0102 #define CB_MAX_TX_ABORT_RETRY   3
0103
0104 /* WMAC definition FIFO Control */
0105 #define FIFOCTL_AUTO_FB_1   0x1000
0106 #define FIFOCTL_AUTO_FB_0   0x0800
0107 #define FIFOCTL_GRPACK      0x0400
0108 #define FIFOCTL_11GA        0x0300
0109 #define FIFOCTL_11GB        0x0200
0110 #define FIFOCTL_11B         0x0100
0111 #define FIFOCTL_11A         0x0000
0112 #define FIFOCTL_RTS         0x0080
0113 #define FIFOCTL_ISDMA0      0x0040
0114 #define FIFOCTL_GENINT      0x0020
0115 #define FIFOCTL_TMOEN       0x0010
0116 #define FIFOCTL_LRETRY      0x0008
0117 #define FIFOCTL_CRCDIS      0x0004
0118 #define FIFOCTL_NEEDACK     0x0002
0119 #define FIFOCTL_LHEAD       0x0001
0120
0121 /* WMAC definition Frag Control */
0122 #define FRAGCTL_AES         0x0300
0123 #define FRAGCTL_TKIP        0x0200
0124 #define FRAGCTL_LEGACY      0x0100
0125 #define FRAGCTL_NONENCRYPT  0x0000
0126 #define FRAGCTL_ENDFRAG     0x0003
0127 #define FRAGCTL_MIDFRAG     0x0002
0128 #define FRAGCTL_STAFRAG     0x0001
0129 #define FRAGCTL_NONFRAG     0x0000
0130
0131 #define TYPE_TXDMA0     0
0132 #define TYPE_AC0DMA     1
0133 #define TYPE_ATIMDMA    2
0134 #define TYPE_SYNCDMA    3
0135 #define TYPE_MAXTD      2
0136
0137 #define TYPE_BEACONDMA  4
0138
0139 #define TYPE_RXDMA0     0
0140 #define TYPE_RXDMA1     1
0141 #define TYPE_MAXRD      2
0142
0143 /* TD_INFO flags control bit */
0144 #define TD_FLAGS_NETIF_SKB      0x01    /* check if need release skb */
0145 /* check if called from private skb (hostap) */
0146 #define TD_FLAGS_PRIV_SKB       0x02
0147 #define TD_FLAGS_PS_RETRY       0x04    /* check if PS STA frame re-transmit */
0148
0149 /*
0150  * ref_sk_buff is used for mapping the skb structure between pre-built
0151  * driver-obj & running kernel. Since different kernel version (2.4x) may
0152  * change skb structure, i.e. pre-built driver-obj may link to older skb that
0153  * leads error.
0154  */
0155
0156 struct vnt_rd_info {
0157     struct sk_buff *skb;
0158     dma_addr_t  skb_dma;
0159 };
0160
0161 struct vnt_rdes0 {
0162     volatile __le16 res_count;
0163 #ifdef __BIG_ENDIAN
0164     union {
0165         volatile u16 f15_reserved;
0166         struct {
0167             volatile u8 f8_reserved1;
0168             volatile u8 owner:1;
0169             volatile u8 f7_reserved:7;
0170         } __packed;
0171     } __packed;
0172 #else
0173     u16 f15_reserved:15;
0174     u16 owner:1;
0175 #endif
0176 } __packed;
0177
0178 struct vnt_rdes1 {
0179     __le16 req_count;
0180     u16 reserved;
0181 } __packed;
0182
0183 /* Rx descriptor*/
0184 struct vnt_rx_desc {
0185     volatile struct vnt_rdes0 rd0;
0186     volatile struct vnt_rdes1 rd1;
0187     volatile __le32 buff_addr;
0188     volatile __le32 next_desc;
0189     struct vnt_rx_desc *next __aligned(8);
0190     struct vnt_rd_info *rd_info __aligned(8);
0191 } __packed;
0192
0193 struct vnt_tdes0 {
0194     volatile u8 tsr0;
0195     volatile u8 tsr1;
0196 #ifdef __BIG_ENDIAN
0197     union {
0198         volatile u16 f15_txtime;
0199         struct {
0200             volatile u8 f8_reserved;
0201             volatile u8 owner:1;
0202             volatile u8 f7_reserved:7;
0203         } __packed;
0204     } __packed;
0205 #else
0206     volatile u16 f15_txtime:15;
0207     volatile u16 owner:1;
0208 #endif
0209 } __packed;
0210
0211 struct vnt_tdes1 {
0212     volatile __le16 req_count;
0213     volatile u8 tcr;
0214     volatile u8 reserved;
0215 } __packed;
0216
0217 struct vnt_td_info {
0218     void *mic_hdr;
0219     struct sk_buff *skb;
0220     unsigned char *buf;
0221     dma_addr_t buf_dma;
0222     u16 req_count;
0223     u8 flags;
0224 };
0225
0226 /* transmit descriptor */
0227 struct vnt_tx_desc {
0228     volatile struct vnt_tdes0 td0;
0229     volatile struct vnt_tdes1 td1;
0230     volatile __le32 buff_addr;
0231     volatile __le32 next_desc;
0232     struct vnt_tx_desc *next __aligned(8);
0233     struct vnt_td_info *td_info __aligned(8);
0234 } __packed;
0235
0236 /* Length, Service, and Signal fields of Phy for Tx */
0237 struct vnt_phy_field {
0238     u8 signal;
0239     u8 service;
0240     __le16 len;
0241 } __packed;
0242
0243 union vnt_phy_field_swap {
0244     struct vnt_phy_field field_read;
0245     u16 swap[2];
0246     u32 field_write;
0247 };
0248
0249 #endif /* __DESC_H__ */